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Searched refs:XCHAL_TIMER2_INTERRUPT (Results 1 – 24 of 24) sorted by relevance

/openbmc/linux/arch/xtensa/include/asm/
H A Dtimex.h23 XTENSA_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL
25 # define LINUX_TIMER_INT XCHAL_TIMER2_INTERRUPT
/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_timer.S56 #if INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1
59 #define TIMER2_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT))
203 movi a2, 1 << XCHAL_TIMER2_INTERRUPT
205 rsil a2, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) - 1
211 #if INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h259 #define XCHAL_TIMER2_INTERRUPT 12 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h261 #define XCHAL_TIMER2_INTERRUPT 12 /* CCOMPARE2 */ macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h269 #define XCHAL_TIMER2_INTERRUPT XTHAL_TIMER_UNCONFIGURED macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h278 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h277 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h276 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h329 #define XCHAL_TIMER2_INTERRUPT XTHAL_TIMER_UNCONFIGURED macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h343 #define XCHAL_TIMER2_INTERRUPT XTHAL_TIMER_UNCONFIGURED macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h324 #define XCHAL_TIMER2_INTERRUPT XTHAL_TIMER_UNCONFIGURED macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h326 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h325 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h304 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h351 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h394 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h412 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h393 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h393 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h390 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h426 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h447 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h516 #define XCHAL_TIMER2_INTERRUPT 13 /* CCOMPARE2 */ macro
/openbmc/qemu/target/xtensa/
H A Doverlay_tool.h289 [2] = XCHAL_TIMER2_INTERRUPT, \