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Searched refs:XCHAL_HAVE_RELEASE_SYNC (Results 1 – 23 of 23) sorted by relevance

/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_load_store.S175 #if XCHAL_HAVE_RELEASE_SYNC
193 #if XCHAL_HAVE_RELEASE_SYNC
201 #if XCHAL_HAVE_RELEASE_SYNC
216 #if XCHAL_HAVE_RELEASE_SYNC
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h54 #define XCHAL_HAVE_RELEASE_SYNC 0 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h53 #define XCHAL_HAVE_RELEASE_SYNC 0 /* L32AI/S32RI instructions */ macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h54 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h55 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h54 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h53 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h76 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h75 #define XCHAL_HAVE_RELEASE_SYNC 0 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h74 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h75 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h74 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h53 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h76 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h77 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h77 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h77 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h76 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h55 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h77 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h77 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h77 #define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI instructions */ macro
/openbmc/qemu/target/xtensa/
H A Doverlay_tool.h125 XCHAL_OPTION(XCHAL_HAVE_RELEASE_SYNC, XTENSA_OPTION_MP_SYNCHRO) | \