| /openbmc/linux/Documentation/gpu/amdgpu/display/ |
| H A D | dc-glossary.rst | 36 * SOCCLK: GPU Engine Clock
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 810 double SOCCLK,
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| H A D | display_mode_vba_util_32.c | 4266 double SOCCLK, in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport() argument
4364 + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4377 + mmSOCParameters.WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4379 + mmSOCParameters.WritebackLatency + v->WritebackChunkSize * 1024 / 32 / SOCCLK; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
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| H A D | display_mode_vba_32.c | 1197 v->SOCCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3735 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel]; in dml32_ModeSupportAndSystemConfigurationFull()
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| H A D | dcn32_fpu.c | 1362 context->bw_ctx.bw.dcn.clk.socclk_khz = context->bw_ctx.dml.vba.SOCCLK * 1000; in dcn32_calculate_dlg_params()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_5_ppt.c | 112 FEA_MAP_REVERSE(SOCCLK),
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| H A D | smu_v13_0_4_ppt.c | 117 FEA_MAP_REVERSE(SOCCLK),
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| H A D | yellow_carp_ppt.c | 112 FEA_MAP_REVERSE(SOCCLK),
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| H A D | aldebaran_ppt.c | 160 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
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| H A D | smu_v13_0_6_ppt.c | 139 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
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| H A D | smu_v13_0_7_ppt.c | 142 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
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| H A D | smu_v13_0_0_ppt.c | 171 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 381 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
1094 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz; in ModeSupportAndSystemConfiguration()
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| H A D | display_mode_vba.h | 437 double SOCCLK; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_mode_vba_21.c | 305 double SOCCLK,
2437 mode_lib->vba.SOCCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5226 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel]; in dml21_ModeSupportAndSystemConfigurationFull()
5262 double SOCCLK, in CalculateWatermarksAndDRAMSpeedChangeSupport() argument
5351 + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5358 + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in CalculateWatermarksAndDRAMSpeedChangeSupport()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.c | 312 double SOCCLK,
2759 v->SOCCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5180 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel]; in dml30_ModeSupportAndSystemConfigurationFull()
5204 double SOCCLK, in CalculateWatermarksAndDRAMSpeedChangeSupport() argument
5287 *WritebackUrgentWatermark = WritebackLatency + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5293 …atermark = DRAMClockChangeLatency + WritebackLatency + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in CalculateWatermarksAndDRAMSpeedChangeSupport()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 118 CLK_MAP(SOCCLK, CLOCK_SOCCLK),
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.c | 299 double SOCCLK,
2953 v->SOCCLK,
5549 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel];
5562 double SOCCLK, argument
5624 …v->WritebackUrgentWatermark = v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
5630 …= v->DRAMClockChangeLatency + v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.c | 311 double SOCCLK,
2974 v->SOCCLK,
5644 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel];
5657 double SOCCLK, argument
5719 …v->WritebackUrgentWatermark = v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
5725 …= v->DRAMClockChangeLatency + v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_mode_vba_20.c | 1502 / mode_lib->vba.SOCCLK; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1514 DTRACE(" socclk frequency %f Mhz", mode_lib->vba.SOCCLK); in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1525 / mode_lib->vba.SOCCLK; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5103 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel]; in dml20_ModeSupportAndSystemConfigurationFull()
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| H A D | display_mode_vba_20v2.c | 1538 / mode_lib->vba.SOCCLK; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1550 DTRACE(" socclk frequency %f Mhz", mode_lib->vba.SOCCLK); in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1561 / mode_lib->vba.SOCCLK; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5219 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel]; in dml20v2_ModeSupportAndSystemConfigurationFull()
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| H A D | dcn20_fpu.c | 1149 context->bw_ctx.bw.dcn.clk.socclk_khz = context->bw_ctx.dml.vba.SOCCLK * 1000; in dcn20_calculate_dlg_params()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | vangogh_ppt.c | 188 FEA_MAP_REVERSE(SOCCLK),
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| H A D | arcturus_ppt.c | 167 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
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| H A D | navi10_ppt.c | 152 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
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