Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42 |
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#
026a71ba |
| 24-Jul-2023 |
Leo Chen <sancchen@amd.com> |
drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN31
[Why & How] HDMI TMDS does not have ODM support. Filtering 420 modes that exceed the 4096 FMT limitation on DCN31 will resolve inte
drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN31
[Why & How] HDMI TMDS does not have ODM support. Filtering 420 modes that exceed the 4096 FMT limitation on DCN31 will resolve intermittent corruptions issues.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Leo Chen <sancchen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36 |
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3999edf8 |
| 27-Jun-2023 |
Meera Patel <meera.patel@amd.com> |
drm/amd/display: Initialize necessary uninitialized variables
This commit initializes uninitialized variables. For some compilers uninitialized variable warnings are treated as Error.
Reviewed-by:
drm/amd/display: Initialize necessary uninitialized variables
This commit initializes uninitialized variables. For some compilers uninitialized variable warnings are treated as Error.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Meera Patel <meera.patel@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.4, v6.1.35, v6.1.34, v6.1.33 |
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caf0f98d |
| 05-Jun-2023 |
Hamza Mahfooz <hamza.mahfooz@amd.com> |
drm/amd/display: mark dml31's UseMinimumDCFCLK() as noinline_for_stack
clang reports: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3797:6: error: stack frame size (2632)
drm/amd/display: mark dml31's UseMinimumDCFCLK() as noinline_for_stack
clang reports: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3797:6: error: stack frame size (2632) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] 3797 | void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ 1 error generated.
So, since UseMinimumDCFCLK() consumes a lot of stack space, mark it as noinline_for_stack to prevent it from blowing up dml31_ModeSupportAndSystemConfigurationFull()'s stack size.
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1 |
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#
9ba90d76 |
| 09-Dec-2022 |
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> |
drm/amd/display: add pixel rate based CRB allocation support
This feature is meant to unblock PSTATE for certain high end display configs on dcn315. This is achieved by allocating CRB to detile buff
drm/amd/display: add pixel rate based CRB allocation support
This feature is meant to unblock PSTATE for certain high end display configs on dcn315. This is achieved by allocating CRB to detile buffer based on display requirements to meet pstate latency hiding needs.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1 |
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05ffbdf4 |
| 09-Oct-2022 |
Sherry Wang <Yao.Wang1@amd.com> |
drm/amd/display: correct DML calc error
[Why] DML calculation is different from HW formula.
[How] Correct the bug to keep it same as HW formula.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd
drm/amd/display: correct DML calc error
[Why] DML calculation is different from HW formula.
[How] Correct the bug to keep it same as HW formula.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Sherry Wang <Yao.Wang1@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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385c3e4c |
| 22-Mar-2023 |
Paul Hsieh <Paul.Hsieh@amd.com> |
drm/amd/display: Correct DML calculation to follow HW SPEC
[Why] In 2560x1600@240p eDP panel, driver use lowest voltage level to play 1080p video cause underflow. According to HW SPEC, the senario s
drm/amd/display: Correct DML calculation to follow HW SPEC
[Why] In 2560x1600@240p eDP panel, driver use lowest voltage level to play 1080p video cause underflow. According to HW SPEC, the senario should use high voltage level.
[How] ChromaPre value is zero when bandwidth validation. Correct ChromaPre calculation.
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Paul Hsieh <Paul.Hsieh@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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26a9f531 |
| 09-Feb-2023 |
Paul Hsieh <Paul.Hsieh@amd.com> |
drm/amd/display: Correct DML calculation to align HW formula
[Why] In 2560x1440@240p eDP panel, some use cases will enable MPC combine with RGB MPO then underflow happened. This case is not allowed
drm/amd/display: Correct DML calculation to align HW formula
[Why] In 2560x1440@240p eDP panel, some use cases will enable MPC combine with RGB MPO then underflow happened. This case is not allowed from HW formula.
[How] Correct eDP, DP and DP2 output bpp calculation to align HW formula.
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Paul Hsieh <Paul.Hsieh@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7ae1dbe6 |
| 06-Feb-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: merge dc_link.h into dc.h and dc_types.h
[why] Remove the need to include dc_link.h separately. dc.h should contain everything needed on DM side.
[How] Merge dc_link.h into dc.h an
drm/amd/display: merge dc_link.h into dc.h and dc_types.h
[why] Remove the need to include dc_link.h separately. dc.h should contain everything needed on DM side.
[How] Merge dc_link.h into dc.h and dc_types.h so DM only needs to include dc.h to use all link public functions.
Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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60b07cf5 |
| 13-Feb-2023 |
Arthur Grillo <arthurgrillo@riseup.net> |
drm/amd/display: Make variables declaration inside ifdef guard
Make variables declaration inside ifdef guard, as they are only used inside the same ifdef guard. This remove some of the -Wunused-but-
drm/amd/display: Make variables declaration inside ifdef guard
Make variables declaration inside ifdef guard, as they are only used inside the same ifdef guard. This remove some of the -Wunused-but-set-variable warning.
Signed-off-by: Arthur Grillo <arthurgrillo@riseup.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6f0bf2db |
| 22-Nov-2022 |
Zhongwei <Zhongwei.Zhang@amd.com> |
drm/amd/display: correct DML calc error of UrgentLatency
[Why] The input UrgentLatency in CalculateUrgentBurstFactor of prefect check is wrong.
[How] Correct to the correct one to keep same as HW f
drm/amd/display: correct DML calc error of UrgentLatency
[Why] The input UrgentLatency in CalculateUrgentBurstFactor of prefect check is wrong.
[How] Correct to the correct one to keep same as HW formula
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Zhongwei <Zhongwei.Zhang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
27142312 |
| 02-Nov-2022 |
Charlene Liu <Charlene.Liu@amd.com> |
drm/amd/display: fix dcn3.1x mode validation on high bandwidth config
[why] 1. correct dram_channel_width (was hard coded to 4 for 32bit) 2. use dm's is_hvm_enable status flag for hostvm_en input fo
drm/amd/display: fix dcn3.1x mode validation on high bandwidth config
[why] 1. correct dram_channel_width (was hard coded to 4 for 32bit) 2. use dm's is_hvm_enable status flag for hostvm_en input for dml. 3. add a function to override to all dcn3.1x.
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6139ab41 |
| 20-Oct-2022 |
Charlene Liu <Charlene.Liu@amd.com> |
drm/amd/display: Update DML formula
[why] This is to update SW DML implementation.
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com>
drm/amd/display: Update DML formula
[why] This is to update SW DML implementation.
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68 |
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#
ab5220bb |
| 08-Sep-2022 |
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> |
drm/amd/display: fix dcn315 dml detile overestimation
DML does not take the fact that dcn315 does not have enough detile buffer to max all pipes. This change adds a workaround to apply the same logi
drm/amd/display: fix dcn315 dml detile overestimation
DML does not take the fact that dcn315 does not have enough detile buffer to max all pipes. This change adds a workaround to apply the same logic DC does when calculating detile buffer size in DML.
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6ad04585 |
| 14-Sep-2022 |
Yang Li <yang.lee@linux.alibaba.com> |
drm/amd/display: clean up some inconsistent indentings
clean up some inconsistent indentings
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2177 Reported-by: Abaci Robot <abaci@linux.alibaba.
drm/amd/display: clean up some inconsistent indentings
clean up some inconsistent indentings
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2177 Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.67, v5.15.66, v5.15.65, v5.15.64 |
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#
1dbec5b4 |
| 30-Aug-2022 |
Nathan Chancellor <nathan@kernel.org> |
drm/amd/display: Reduce number of arguments of dml31's CalculateFlipSchedule()
Most of the arguments are identical between the two call sites and they can be accessed through the 'struct vba_vars_st
drm/amd/display: Reduce number of arguments of dml31's CalculateFlipSchedule()
Most of the arguments are identical between the two call sites and they can be accessed through the 'struct vba_vars_st' pointer. This reduces the total amount of stack space that dml31_ModeSupportAndSystemConfigurationFull() uses by 112 bytes with LLVM 16 (1976 -> 1864), helping clear up the following clang warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6: error: stack frame size (2216) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) ^ 1 error generated.
Link: https://github.com/ClangBuiltLinux/linux/issues/1681 Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com> Tested-by: Maíra Canal <mairacanal@riseup.net> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ab2ac59c |
| 30-Aug-2022 |
Nathan Chancellor <nathan@kernel.org> |
drm/amd/display: Reduce number of arguments of dml31's CalculateWatermarksAndDRAMSpeedChangeSupport()
Most of the arguments are identical between the two call sites and they can be accessed through
drm/amd/display: Reduce number of arguments of dml31's CalculateWatermarksAndDRAMSpeedChangeSupport()
Most of the arguments are identical between the two call sites and they can be accessed through the 'struct vba_vars_st' pointer. This reduces the total amount of stack space that dml31_ModeSupportAndSystemConfigurationFull() uses by 240 bytes with LLVM 16 (2216 -> 1976), helping clear up the following clang warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6: error: stack frame size (2216) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) ^ 1 error generated.
Link: https://github.com/ClangBuiltLinux/linux/issues/1681 Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com> Tested-by: Maíra Canal <mairacanal@riseup.net> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.63, v5.15.62 |
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#
17529ea2 |
| 20-Aug-2022 |
Aric Cyr <aric.cyr@amd.com> |
drm/amd/display: Optimizations for DML math
[why] Conditionals in the DML basic math functions significantly impact mode enumeration.
[how] Remove conditionals for floor/ceil operations which are u
drm/amd/display: Optimizations for DML math
[why] Conditionals in the DML basic math functions significantly impact mode enumeration.
[how] Remove conditionals for floor/ceil operations which are used frequently in DML and add an assertion for invalid callers using zero granuality. Fix existing callers that rely on 0 granularity.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
21485d3d |
| 30-Aug-2022 |
Nathan Chancellor <nathan@kernel.org> |
drm/amd/display: Reduce number of arguments of dml31's CalculateFlipSchedule()
Most of the arguments are identical between the two call sites and they can be accessed through the 'struct vba_vars_st
drm/amd/display: Reduce number of arguments of dml31's CalculateFlipSchedule()
Most of the arguments are identical between the two call sites and they can be accessed through the 'struct vba_vars_st' pointer. This reduces the total amount of stack space that dml31_ModeSupportAndSystemConfigurationFull() uses by 112 bytes with LLVM 16 (1976 -> 1864), helping clear up the following clang warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6: error: stack frame size (2216) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) ^ 1 error generated.
Link: https://github.com/ClangBuiltLinux/linux/issues/1681 Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com> Tested-by: Maíra Canal <mairacanal@riseup.net> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
37934d41 |
| 30-Aug-2022 |
Nathan Chancellor <nathan@kernel.org> |
drm/amd/display: Reduce number of arguments of dml31's CalculateWatermarksAndDRAMSpeedChangeSupport()
Most of the arguments are identical between the two call sites and they can be accessed through
drm/amd/display: Reduce number of arguments of dml31's CalculateWatermarksAndDRAMSpeedChangeSupport()
Most of the arguments are identical between the two call sites and they can be accessed through the 'struct vba_vars_st' pointer. This reduces the total amount of stack space that dml31_ModeSupportAndSystemConfigurationFull() uses by 240 bytes with LLVM 16 (2216 -> 1976), helping clear up the following clang warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6: error: stack frame size (2216) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) ^ 1 error generated.
Link: https://github.com/ClangBuiltLinux/linux/issues/1681 Reported-by: "Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com> Tested-by: Maíra Canal <mairacanal@riseup.net> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58 |
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#
dd49c07f |
| 27-Jul-2022 |
Chaitanya Dhere <chaitanya.dhere@amd.com> |
drm/amd/display: Modify header inclusion pattern
[Why] Recent backport from opensource broke the Nightly tool build that tests DC and DML for bugs and regressions. This was because the backport had
drm/amd/display: Modify header inclusion pattern
[Why] Recent backport from opensource broke the Nightly tool build that tests DC and DML for bugs and regressions. This was because the backport had a header inclusion that was not consistent with the AMD style of including headers was allowed to be merged back in DML code that caused tool compilation failures.
[How] Modify the way in which the header file in included so that it is consistent with AMD style of including headers. This then automatically fixes the tool compilation process and also helps maintain the code quality and consistency.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49 |
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#
8a076bbc |
| 20-Jun-2022 |
Wesley Chalmers <Wesley.Chalmers@amd.com> |
drm/amd/display: Check for DP2.0 when checking ODM combine
[WHY] Certain DP 2.0 modes may fail validation if DP 2.0 is not considered for ODM combine.
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
drm/amd/display: Check for DP2.0 when checking ODM combine
[WHY] Certain DP 2.0 modes may fail validation if DP 2.0 is not considered for ODM combine.
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fd3bc691 |
| 30-Jun-2022 |
Maíra Canal <mairacanal@riseup.net> |
drm/amd/display: Remove duplicate code across dcn30 and dcn31
The function CalculateBytePerPixelAnd256BBlockSizes was defined four times: on display_mode_vba_30.c, display_rq_dlg_calc_30.c, display_
drm/amd/display: Remove duplicate code across dcn30 and dcn31
The function CalculateBytePerPixelAnd256BBlockSizes was defined four times: on display_mode_vba_30.c, display_rq_dlg_calc_30.c, display_mode_vba_31.c and display_rq_dlg_calc_31.c. In order to avoid code duplication, the CalculateBytePerPixelAnd256BBlockSizes is defined on display_mode_vba_30.h and used across dcn30 and dcn31.
Signed-off-by: Maíra Canal <mairacanal@riseup.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25 |
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dda4fb85 |
| 21-Feb-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: DML changes for DCN32/321
DML is required for display configuration modelling for things like bandwidth management and validation.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai
drm/amd/display: DML changes for DCN32/321
DML is required for display configuration modelling for things like bandwidth management and validation.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16 |
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9338cb71 |
| 07-Jan-2022 |
Charlene Liu <Charlene.Liu@amd.com> |
drm/amd/display: update dml to rev.99 and smu clk_table w/a
[why] 1. update dml to rev.99 2. add smu clk table w/a: smu gives 1 dtm level with mismatch votage table which causes multiple issues.
drm/amd/display: update dml to rev.99 and smu clk_table w/a
[why] 1. update dml to rev.99 2. add smu clk table w/a: smu gives 1 dtm level with mismatch votage table which causes multiple issues.
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.10, v5.15.9, v5.15.8 |
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33c3365e |
| 09-Dec-2021 |
Michel Dänzer <mdaenzer@redhat.com> |
drm/amd/display: Reduce stack size for dml31 UseMinimumDCFCLK
Use the struct display_mode_lib pointer instead of passing lots of large arrays as parameters by value.
Addresses this warning (resulti
drm/amd/display: Reduce stack size for dml31 UseMinimumDCFCLK
Use the struct display_mode_lib pointer instead of passing lots of large arrays as parameters by value.
Addresses this warning (resulting in failure to build a RHEL debug kernel with Werror enabled):
../drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c: In function ‘UseMinimumDCFCLK’: ../drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:7478:1: warning: the frame size of 2128 bytes is larger than 2048 bytes [-Wframe-larger-than=]
NOTE: AFAICT this function previously had no observable effect, since it only modified parameters passed by value and doesn't return anything. Now it may modify some values in struct display_mode_lib passed in by reference.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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