| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 96 #define CLK_TOP_PMICSPI_SEL 85 macro
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| H A D | mt7629-clk.h | 101 #define CLK_TOP_PMICSPI_SEL 91 macro
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| H A D | mt8516-clk.h | 166 #define CLK_TOP_PMICSPI_SEL 134 macro
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| H A D | mt7622-clk.h | 86 #define CLK_TOP_PMICSPI_SEL 74 macro
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| H A D | mediatek,mt6795-clk.h | 110 #define CLK_TOP_PMICSPI_SEL 99 macro
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| H A D | mt8173-clk.h | 112 #define CLK_TOP_PMICSPI_SEL 102 macro
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| H A D | mt2712-clk.h | 149 #define CLK_TOP_PMICSPI_SEL 118 macro
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| H A D | mt2701-clk.h | 106 #define CLK_TOP_PMICSPI_SEL 95 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 105 #define CLK_TOP_PMICSPI_SEL 91 macro
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| H A D | mt7623-clk.h | 117 #define CLK_TOP_PMICSPI_SEL 103 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 482 TOP_MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x90, 0, 3, 5, 0),
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| H A D | clk-mt8173-topckgen.c | 566 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
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| H A D | clk-mt8135.c | 387 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x0164, 0, 3, 7),
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| H A D | clk-mt7622.c | 430 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
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| H A D | clk-mt8516.c | 375 MUX(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
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| H A D | clk-mt8167.c | 546 MUX(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
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| H A D | clk-mt7629.c | 502 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
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| H A D | clk-mt2712.c | 677 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x090, 0, 3, 7),
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| H A D | clk-mt2701.c | 523 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 530 MUX_GATE(CLK_TOP_PMICSPI_SEL, pmicspi_parents, 0x80, 0, 4, 7),
612 GATE_INFRA(CLK_INFRA_PMICSPI, CLK_TOP_PMICSPI_SEL, 22),
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| H A D | clk-mt7629.c | 390 MUX_GATE(CLK_TOP_PMICSPI_SEL, pmicspi_parents, 0x80, 16, 3, 23),
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| /openbmc/linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt6795.dtsi | 384 clocks = <&topckgen CLK_TOP_PMICSPI_SEL>, <&clk26m>;
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