11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2a8aede79SJames Liao /* 3a8aede79SJames Liao * Copyright (c) 2014 MediaTek Inc. 4a8aede79SJames Liao * Author: James Liao <jamesjj.liao@mediatek.com> 5a8aede79SJames Liao */ 6a8aede79SJames Liao 7c726639bSStephen Boyd #include <linux/clk.h> 810966457SAngeloGioacchino Del Regno #include <linux/module.h> 9a8aede79SJames Liao #include <linux/of.h> 10a8aede79SJames Liao #include <linux/of_address.h> 1110966457SAngeloGioacchino Del Regno #include <linux/platform_device.h> 12a8aede79SJames Liao #include <linux/slab.h> 13a8aede79SJames Liao #include <linux/mfd/syscon.h> 14a8aede79SJames Liao #include <dt-bindings/clock/mt8135-clk.h> 15a8aede79SJames Liao 16a8aede79SJames Liao #include "clk-gate.h" 1739691fb6SChen-Yu Tsai #include "clk-mtk.h" 1839691fb6SChen-Yu Tsai #include "clk-pll.h" 19a8aede79SJames Liao 20a8aede79SJames Liao static DEFINE_SPINLOCK(mt8135_clk_lock); 21a8aede79SJames Liao 2210966457SAngeloGioacchino Del Regno static const struct mtk_fixed_factor top_divs[] = { 2310966457SAngeloGioacchino Del Regno FACTOR(CLK_DUMMY, "top_divs_dummy", "clk_null", 1, 1), 24a8aede79SJames Liao FACTOR(CLK_TOP_DSI0_LNTC_DSICLK, "dsi0_lntc_dsiclk", "clk_null", 1, 1), 25a8aede79SJames Liao FACTOR(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_clkdig_cts", "clk_null", 1, 1), 26a8aede79SJames Liao FACTOR(CLK_TOP_CLKPH_MCK, "clkph_mck", "clk_null", 1, 1), 27a8aede79SJames Liao FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "clk_null", 1, 1), 28a8aede79SJames Liao 29a8aede79SJames Liao FACTOR(CLK_TOP_MAINPLL_806M, "mainpll_806m", "mainpll", 1, 2), 30a8aede79SJames Liao FACTOR(CLK_TOP_MAINPLL_537P3M, "mainpll_537p3m", "mainpll", 1, 3), 31a8aede79SJames Liao FACTOR(CLK_TOP_MAINPLL_322P4M, "mainpll_322p4m", "mainpll", 1, 5), 32a8aede79SJames Liao FACTOR(CLK_TOP_MAINPLL_230P3M, "mainpll_230p3m", "mainpll", 1, 7), 33a8aede79SJames Liao 34a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_624M, "univpll_624m", "univpll", 1, 2), 35a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_416M, "univpll_416m", "univpll", 1, 3), 36a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_249P6M, "univpll_249p6m", "univpll", 1, 5), 37a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_178P3M, "univpll_178p3m", "univpll", 1, 7), 38a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_48M, "univpll_48m", "univpll", 1, 26), 39a8aede79SJames Liao 40a8aede79SJames Liao FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2), 41a8aede79SJames Liao FACTOR(CLK_TOP_MMPLL_D3, "mmpll_d3", "mmpll", 1, 3), 42a8aede79SJames Liao FACTOR(CLK_TOP_MMPLL_D5, "mmpll_d5", "mmpll", 1, 5), 43a8aede79SJames Liao FACTOR(CLK_TOP_MMPLL_D7, "mmpll_d7", "mmpll", 1, 7), 44a8aede79SJames Liao FACTOR(CLK_TOP_MMPLL_D4, "mmpll_d4", "mmpll_d2", 1, 2), 45a8aede79SJames Liao FACTOR(CLK_TOP_MMPLL_D6, "mmpll_d6", "mmpll_d3", 1, 2), 46a8aede79SJames Liao 47a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll_806m", 1, 1), 48a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D4, "syspll_d4", "mainpll_806m", 1, 2), 49a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D6, "syspll_d6", "mainpll_806m", 1, 3), 50a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D8, "syspll_d8", "mainpll_806m", 1, 4), 51a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D10, "syspll_d10", "mainpll_806m", 1, 5), 52a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D12, "syspll_d12", "mainpll_806m", 1, 6), 53a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D16, "syspll_d16", "mainpll_806m", 1, 8), 54a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D24, "syspll_d24", "mainpll_806m", 1, 12), 55a8aede79SJames Liao 56a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll_537p3m", 1, 1), 57a8aede79SJames Liao 58a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D2P5, "syspll_d2p5", "mainpll_322p4m", 2, 1), 59a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D5, "syspll_d5", "mainpll_322p4m", 1, 1), 60a8aede79SJames Liao 61a8aede79SJames Liao FACTOR(CLK_TOP_SYSPLL_D3P5, "syspll_d3p5", "mainpll_230p3m", 2, 1), 62a8aede79SJames Liao 63a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL1_D2, "univpll1_d2", "univpll_624m", 1, 2), 64a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll_624m", 1, 4), 65a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL1_D6, "univpll1_d6", "univpll_624m", 1, 6), 66a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL1_D8, "univpll1_d8", "univpll_624m", 1, 8), 67a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL1_D10, "univpll1_d10", "univpll_624m", 1, 10), 68a8aede79SJames Liao 69a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", "univpll_416m", 1, 2), 70a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll_416m", 1, 4), 71a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL2_D6, "univpll2_d6", "univpll_416m", 1, 6), 72a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL2_D8, "univpll2_d8", "univpll_416m", 1, 8), 73a8aede79SJames Liao 74a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll_416m", 1, 1), 75a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll_249p6m", 1, 1), 76a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll_178p3m", 1, 1), 77a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_D10, "univpll_d10", "univpll_249p6m", 1, 2), 78a8aede79SJames Liao FACTOR(CLK_TOP_UNIVPLL_D26, "univpll_d26", "univpll_48m", 1, 1), 79a8aede79SJames Liao 80a8aede79SJames Liao FACTOR(CLK_TOP_APLL, "apll_ck", "audpll", 1, 1), 81a8aede79SJames Liao FACTOR(CLK_TOP_APLL_D4, "apll_d4", "audpll", 1, 4), 82a8aede79SJames Liao FACTOR(CLK_TOP_APLL_D8, "apll_d8", "audpll", 1, 8), 83a8aede79SJames Liao FACTOR(CLK_TOP_APLL_D16, "apll_d16", "audpll", 1, 16), 84a8aede79SJames Liao FACTOR(CLK_TOP_APLL_D24, "apll_d24", "audpll", 1, 24), 85a8aede79SJames Liao 86a8aede79SJames Liao FACTOR(CLK_TOP_LVDSPLL_D2, "lvdspll_d2", "lvdspll", 1, 2), 87a8aede79SJames Liao FACTOR(CLK_TOP_LVDSPLL_D4, "lvdspll_d4", "lvdspll", 1, 4), 88a8aede79SJames Liao FACTOR(CLK_TOP_LVDSPLL_D8, "lvdspll_d8", "lvdspll", 1, 8), 89a8aede79SJames Liao 90a8aede79SJames Liao FACTOR(CLK_TOP_LVDSTX_CLKDIG_CT, "lvdstx_clkdig_cts", "lvdspll", 1, 1), 91a8aede79SJames Liao FACTOR(CLK_TOP_VPLL_DPIX, "vpll_dpix_ck", "lvdspll", 1, 1), 92a8aede79SJames Liao 93a8aede79SJames Liao FACTOR(CLK_TOP_TVHDMI_H, "tvhdmi_h_ck", "tvdpll", 1, 1), 94a8aede79SJames Liao 95a8aede79SJames Liao FACTOR(CLK_TOP_HDMITX_CLKDIG_D2, "hdmitx_clkdig_d2", "hdmitx_clkdig_cts", 1, 2), 96a8aede79SJames Liao FACTOR(CLK_TOP_HDMITX_CLKDIG_D3, "hdmitx_clkdig_d3", "hdmitx_clkdig_cts", 1, 3), 97a8aede79SJames Liao 98a8aede79SJames Liao FACTOR(CLK_TOP_TVHDMI_D2, "tvhdmi_d2", "tvhdmi_h_ck", 1, 2), 99a8aede79SJames Liao FACTOR(CLK_TOP_TVHDMI_D4, "tvhdmi_d4", "tvhdmi_h_ck", 1, 4), 100a8aede79SJames Liao 101a8aede79SJames Liao FACTOR(CLK_TOP_MEMPLL_MCK_D4, "mempll_mck_d4", "clkph_mck", 1, 4), 102a8aede79SJames Liao }; 103a8aede79SJames Liao 10410966457SAngeloGioacchino Del Regno static const char * const axi_parents[] = { 105a8aede79SJames Liao "clk26m", 106a8aede79SJames Liao "syspll_d3", 107a8aede79SJames Liao "syspll_d4", 108a8aede79SJames Liao "syspll_d6", 109a8aede79SJames Liao "univpll_d5", 110a8aede79SJames Liao "univpll2_d2", 111a8aede79SJames Liao "syspll_d3p5" 112a8aede79SJames Liao }; 113a8aede79SJames Liao 11410966457SAngeloGioacchino Del Regno static const char * const smi_parents[] = { 115a8aede79SJames Liao "clk26m", 116a8aede79SJames Liao "clkph_mck", 117a8aede79SJames Liao "syspll_d2p5", 118a8aede79SJames Liao "syspll_d3", 119a8aede79SJames Liao "syspll_d8", 120a8aede79SJames Liao "univpll_d5", 121a8aede79SJames Liao "univpll1_d2", 122a8aede79SJames Liao "univpll1_d6", 123a8aede79SJames Liao "mmpll_d3", 124a8aede79SJames Liao "mmpll_d4", 125a8aede79SJames Liao "mmpll_d5", 126a8aede79SJames Liao "mmpll_d6", 127a8aede79SJames Liao "mmpll_d7", 128a8aede79SJames Liao "vdecpll", 129a8aede79SJames Liao "lvdspll" 130a8aede79SJames Liao }; 131a8aede79SJames Liao 13210966457SAngeloGioacchino Del Regno static const char * const mfg_parents[] = { 133a8aede79SJames Liao "clk26m", 134a8aede79SJames Liao "univpll1_d4", 135a8aede79SJames Liao "syspll_d2", 136a8aede79SJames Liao "syspll_d2p5", 137a8aede79SJames Liao "syspll_d3", 138a8aede79SJames Liao "univpll_d5", 139a8aede79SJames Liao "univpll1_d2", 140a8aede79SJames Liao "mmpll_d2", 141a8aede79SJames Liao "mmpll_d3", 142a8aede79SJames Liao "mmpll_d4", 143a8aede79SJames Liao "mmpll_d5", 144a8aede79SJames Liao "mmpll_d6", 145a8aede79SJames Liao "mmpll_d7" 146a8aede79SJames Liao }; 147a8aede79SJames Liao 14810966457SAngeloGioacchino Del Regno static const char * const irda_parents[] = { 149a8aede79SJames Liao "clk26m", 150a8aede79SJames Liao "univpll2_d8", 151a8aede79SJames Liao "univpll1_d6" 152a8aede79SJames Liao }; 153a8aede79SJames Liao 15410966457SAngeloGioacchino Del Regno static const char * const cam_parents[] = { 155a8aede79SJames Liao "clk26m", 156a8aede79SJames Liao "syspll_d3", 157a8aede79SJames Liao "syspll_d3p5", 158a8aede79SJames Liao "syspll_d4", 159a8aede79SJames Liao "univpll_d5", 160a8aede79SJames Liao "univpll2_d2", 161a8aede79SJames Liao "univpll_d7", 162a8aede79SJames Liao "univpll1_d4" 163a8aede79SJames Liao }; 164a8aede79SJames Liao 16510966457SAngeloGioacchino Del Regno static const char * const aud_intbus_parents[] = { 166a8aede79SJames Liao "clk26m", 167a8aede79SJames Liao "syspll_d6", 168a8aede79SJames Liao "univpll_d10" 169a8aede79SJames Liao }; 170a8aede79SJames Liao 17110966457SAngeloGioacchino Del Regno static const char * const jpg_parents[] = { 172a8aede79SJames Liao "clk26m", 173a8aede79SJames Liao "syspll_d5", 174a8aede79SJames Liao "syspll_d4", 175a8aede79SJames Liao "syspll_d3", 176a8aede79SJames Liao "univpll_d7", 177a8aede79SJames Liao "univpll2_d2", 178a8aede79SJames Liao "univpll_d5" 179a8aede79SJames Liao }; 180a8aede79SJames Liao 18110966457SAngeloGioacchino Del Regno static const char * const disp_parents[] = { 182a8aede79SJames Liao "clk26m", 183a8aede79SJames Liao "syspll_d3p5", 184a8aede79SJames Liao "syspll_d3", 185a8aede79SJames Liao "univpll2_d2", 186a8aede79SJames Liao "univpll_d5", 187a8aede79SJames Liao "univpll1_d2", 188a8aede79SJames Liao "lvdspll", 189a8aede79SJames Liao "vdecpll" 190a8aede79SJames Liao }; 191a8aede79SJames Liao 19210966457SAngeloGioacchino Del Regno static const char * const msdc30_parents[] = { 193a8aede79SJames Liao "clk26m", 194a8aede79SJames Liao "syspll_d6", 195a8aede79SJames Liao "syspll_d5", 196a8aede79SJames Liao "univpll1_d4", 197a8aede79SJames Liao "univpll2_d4", 198a8aede79SJames Liao "msdcpll" 199a8aede79SJames Liao }; 200a8aede79SJames Liao 20110966457SAngeloGioacchino Del Regno static const char * const usb20_parents[] = { 202a8aede79SJames Liao "clk26m", 203a8aede79SJames Liao "univpll2_d6", 204a8aede79SJames Liao "univpll1_d10" 205a8aede79SJames Liao }; 206a8aede79SJames Liao 20710966457SAngeloGioacchino Del Regno static const char * const venc_parents[] = { 208a8aede79SJames Liao "clk26m", 209a8aede79SJames Liao "syspll_d3", 210a8aede79SJames Liao "syspll_d8", 211a8aede79SJames Liao "univpll_d5", 212a8aede79SJames Liao "univpll1_d6", 213a8aede79SJames Liao "mmpll_d4", 214a8aede79SJames Liao "mmpll_d5", 215a8aede79SJames Liao "mmpll_d6" 216a8aede79SJames Liao }; 217a8aede79SJames Liao 21810966457SAngeloGioacchino Del Regno static const char * const spi_parents[] = { 219a8aede79SJames Liao "clk26m", 220a8aede79SJames Liao "syspll_d6", 221a8aede79SJames Liao "syspll_d8", 222a8aede79SJames Liao "syspll_d10", 223a8aede79SJames Liao "univpll1_d6", 224a8aede79SJames Liao "univpll1_d8" 225a8aede79SJames Liao }; 226a8aede79SJames Liao 22710966457SAngeloGioacchino Del Regno static const char * const uart_parents[] = { 228a8aede79SJames Liao "clk26m", 229a8aede79SJames Liao "univpll2_d8" 230a8aede79SJames Liao }; 231a8aede79SJames Liao 23210966457SAngeloGioacchino Del Regno static const char * const mem_parents[] = { 233a8aede79SJames Liao "clk26m", 234a8aede79SJames Liao "clkph_mck" 235a8aede79SJames Liao }; 236a8aede79SJames Liao 23710966457SAngeloGioacchino Del Regno static const char * const camtg_parents[] = { 238a8aede79SJames Liao "clk26m", 239a8aede79SJames Liao "univpll_d26", 240a8aede79SJames Liao "univpll1_d6", 241a8aede79SJames Liao "syspll_d16", 242a8aede79SJames Liao "syspll_d8" 243a8aede79SJames Liao }; 244a8aede79SJames Liao 24510966457SAngeloGioacchino Del Regno static const char * const audio_parents[] = { 246a8aede79SJames Liao "clk26m", 247a8aede79SJames Liao "syspll_d24" 248a8aede79SJames Liao }; 249a8aede79SJames Liao 25010966457SAngeloGioacchino Del Regno static const char * const fix_parents[] = { 251a8aede79SJames Liao "rtc32k", 252a8aede79SJames Liao "clk26m", 253a8aede79SJames Liao "univpll_d5", 254a8aede79SJames Liao "univpll_d7", 255a8aede79SJames Liao "univpll1_d2", 256a8aede79SJames Liao "univpll1_d4", 257a8aede79SJames Liao "univpll1_d6", 258a8aede79SJames Liao "univpll1_d8" 259a8aede79SJames Liao }; 260a8aede79SJames Liao 26110966457SAngeloGioacchino Del Regno static const char * const vdec_parents[] = { 262a8aede79SJames Liao "clk26m", 263a8aede79SJames Liao "vdecpll", 264a8aede79SJames Liao "clkph_mck", 265a8aede79SJames Liao "syspll_d2p5", 266a8aede79SJames Liao "syspll_d3", 267a8aede79SJames Liao "syspll_d3p5", 268a8aede79SJames Liao "syspll_d4", 269a8aede79SJames Liao "syspll_d5", 270a8aede79SJames Liao "syspll_d6", 271a8aede79SJames Liao "syspll_d8", 272a8aede79SJames Liao "univpll1_d2", 273a8aede79SJames Liao "univpll2_d2", 274a8aede79SJames Liao "univpll_d7", 275a8aede79SJames Liao "univpll_d10", 276a8aede79SJames Liao "univpll2_d4", 277a8aede79SJames Liao "lvdspll" 278a8aede79SJames Liao }; 279a8aede79SJames Liao 28010966457SAngeloGioacchino Del Regno static const char * const ddrphycfg_parents[] = { 281a8aede79SJames Liao "clk26m", 282a8aede79SJames Liao "axi_sel", 283a8aede79SJames Liao "syspll_d12" 284a8aede79SJames Liao }; 285a8aede79SJames Liao 28610966457SAngeloGioacchino Del Regno static const char * const dpilvds_parents[] = { 287a8aede79SJames Liao "clk26m", 288a8aede79SJames Liao "lvdspll", 289a8aede79SJames Liao "lvdspll_d2", 290a8aede79SJames Liao "lvdspll_d4", 291a8aede79SJames Liao "lvdspll_d8" 292a8aede79SJames Liao }; 293a8aede79SJames Liao 29410966457SAngeloGioacchino Del Regno static const char * const pmicspi_parents[] = { 295a8aede79SJames Liao "clk26m", 296a8aede79SJames Liao "univpll2_d6", 297a8aede79SJames Liao "syspll_d8", 298a8aede79SJames Liao "syspll_d10", 299a8aede79SJames Liao "univpll1_d10", 300a8aede79SJames Liao "mempll_mck_d4", 301a8aede79SJames Liao "univpll_d26", 302a8aede79SJames Liao "syspll_d24" 303a8aede79SJames Liao }; 304a8aede79SJames Liao 30510966457SAngeloGioacchino Del Regno static const char * const smi_mfg_as_parents[] = { 306a8aede79SJames Liao "clk26m", 307a8aede79SJames Liao "smi_sel", 308a8aede79SJames Liao "mfg_sel", 309a8aede79SJames Liao "mem_sel" 310a8aede79SJames Liao }; 311a8aede79SJames Liao 31210966457SAngeloGioacchino Del Regno static const char * const gcpu_parents[] = { 313a8aede79SJames Liao "clk26m", 314a8aede79SJames Liao "syspll_d4", 315a8aede79SJames Liao "univpll_d7", 316a8aede79SJames Liao "syspll_d5", 317a8aede79SJames Liao "syspll_d6" 318a8aede79SJames Liao }; 319a8aede79SJames Liao 32010966457SAngeloGioacchino Del Regno static const char * const dpi1_parents[] = { 321a8aede79SJames Liao "clk26m", 322a8aede79SJames Liao "tvhdmi_h_ck", 323a8aede79SJames Liao "tvhdmi_d2", 324a8aede79SJames Liao "tvhdmi_d4" 325a8aede79SJames Liao }; 326a8aede79SJames Liao 32710966457SAngeloGioacchino Del Regno static const char * const cci_parents[] = { 328a8aede79SJames Liao "clk26m", 329a8aede79SJames Liao "mainpll_537p3m", 330a8aede79SJames Liao "univpll_d3", 331a8aede79SJames Liao "syspll_d2p5", 332a8aede79SJames Liao "syspll_d3", 333a8aede79SJames Liao "syspll_d5" 334a8aede79SJames Liao }; 335a8aede79SJames Liao 33610966457SAngeloGioacchino Del Regno static const char * const apll_parents[] = { 337a8aede79SJames Liao "clk26m", 338a8aede79SJames Liao "apll_ck", 339a8aede79SJames Liao "apll_d4", 340a8aede79SJames Liao "apll_d8", 341a8aede79SJames Liao "apll_d16", 342a8aede79SJames Liao "apll_d24" 343a8aede79SJames Liao }; 344a8aede79SJames Liao 34510966457SAngeloGioacchino Del Regno static const char * const hdmipll_parents[] = { 346a8aede79SJames Liao "clk26m", 347a8aede79SJames Liao "hdmitx_clkdig_cts", 348a8aede79SJames Liao "hdmitx_clkdig_d2", 349a8aede79SJames Liao "hdmitx_clkdig_d3" 350a8aede79SJames Liao }; 351a8aede79SJames Liao 35210966457SAngeloGioacchino Del Regno static const struct mtk_composite top_muxes[] = { 353a8aede79SJames Liao /* CLK_CFG_0 */ 354a8aede79SJames Liao MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, 355a8aede79SJames Liao 0x0140, 0, 3, INVALID_MUX_GATE_BIT), 356a8aede79SJames Liao MUX_GATE(CLK_TOP_SMI_SEL, "smi_sel", smi_parents, 0x0140, 8, 4, 15), 357a8aede79SJames Liao MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0140, 16, 4, 23), 358a8aede79SJames Liao MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x0140, 24, 2, 31), 359a8aede79SJames Liao /* CLK_CFG_1 */ 360a8aede79SJames Liao MUX_GATE(CLK_TOP_CAM_SEL, "cam_sel", cam_parents, 0x0144, 0, 3, 7), 361a8aede79SJames Liao MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents, 362a8aede79SJames Liao 0x0144, 8, 2, 15), 363a8aede79SJames Liao MUX_GATE(CLK_TOP_JPG_SEL, "jpg_sel", jpg_parents, 0x0144, 16, 3, 23), 364a8aede79SJames Liao MUX_GATE(CLK_TOP_DISP_SEL, "disp_sel", disp_parents, 0x0144, 24, 3, 31), 365a8aede79SJames Liao /* CLK_CFG_2 */ 366a8aede79SJames Liao MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_parents, 0x0148, 0, 3, 7), 367a8aede79SJames Liao MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents, 0x0148, 8, 3, 15), 368a8aede79SJames Liao MUX_GATE(CLK_TOP_MSDC30_3_SEL, "msdc30_3_sel", msdc30_parents, 0x0148, 16, 3, 23), 369a8aede79SJames Liao MUX_GATE(CLK_TOP_MSDC30_4_SEL, "msdc30_4_sel", msdc30_parents, 0x0148, 24, 3, 31), 370a8aede79SJames Liao /* CLK_CFG_3 */ 371a8aede79SJames Liao MUX_GATE(CLK_TOP_USB20_SEL, "usb20_sel", usb20_parents, 0x014c, 0, 2, 7), 372a8aede79SJames Liao /* CLK_CFG_4 */ 373a8aede79SJames Liao MUX_GATE(CLK_TOP_VENC_SEL, "venc_sel", venc_parents, 0x0150, 8, 3, 15), 374a8aede79SJames Liao MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x0150, 16, 3, 23), 375a8aede79SJames Liao MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0150, 24, 2, 31), 376a8aede79SJames Liao /* CLK_CFG_6 */ 377a8aede79SJames Liao MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 0x0158, 0, 2, 7), 378a8aede79SJames Liao MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents, 0x0158, 8, 3, 15), 379a8aede79SJames Liao MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents, 0x0158, 24, 2, 31), 380a8aede79SJames Liao /* CLK_CFG_7 */ 381a8aede79SJames Liao MUX_GATE(CLK_TOP_FIX_SEL, "fix_sel", fix_parents, 0x015c, 0, 3, 7), 382a8aede79SJames Liao MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_parents, 0x015c, 8, 4, 15), 383a8aede79SJames Liao MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents, 384a8aede79SJames Liao 0x015c, 16, 2, 23), 385a8aede79SJames Liao MUX_GATE(CLK_TOP_DPILVDS_SEL, "dpilvds_sel", dpilvds_parents, 0x015c, 24, 3, 31), 386a8aede79SJames Liao /* CLK_CFG_8 */ 387a8aede79SJames Liao MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x0164, 0, 3, 7), 388a8aede79SJames Liao MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_parents, 0x0164, 8, 3, 15), 389a8aede79SJames Liao MUX_GATE(CLK_TOP_SMI_MFG_AS_SEL, "smi_mfg_as_sel", smi_mfg_as_parents, 390a8aede79SJames Liao 0x0164, 16, 2, 23), 391a8aede79SJames Liao MUX_GATE(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x0164, 24, 3, 31), 392a8aede79SJames Liao /* CLK_CFG_9 */ 393a8aede79SJames Liao MUX_GATE(CLK_TOP_DPI1_SEL, "dpi1_sel", dpi1_parents, 0x0168, 0, 2, 7), 394f4f9a9c0SAngeloGioacchino Del Regno MUX_GATE_FLAGS(CLK_TOP_CCI_SEL, "cci_sel", cci_parents, 0x0168, 8, 3, 15, CLK_IS_CRITICAL), 395a8aede79SJames Liao MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel", apll_parents, 0x0168, 16, 3, 23), 396a8aede79SJames Liao MUX_GATE(CLK_TOP_HDMIPLL_SEL, "hdmipll_sel", hdmipll_parents, 0x0168, 24, 2, 31), 397a8aede79SJames Liao }; 398a8aede79SJames Liao 399a8aede79SJames Liao static const struct mtk_gate_regs infra_cg_regs = { 400a8aede79SJames Liao .set_ofs = 0x0040, 401a8aede79SJames Liao .clr_ofs = 0x0044, 402a8aede79SJames Liao .sta_ofs = 0x0048, 403a8aede79SJames Liao }; 404a8aede79SJames Liao 4054c85e20bSAngeloGioacchino Del Regno #define GATE_ICG(_id, _name, _parent, _shift) \ 4064c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, &infra_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 407a8aede79SJames Liao 408f4f9a9c0SAngeloGioacchino Del Regno #define GATE_ICG_AO(_id, _name, _parent, _shift) \ 409f4f9a9c0SAngeloGioacchino Del Regno GATE_MTK_FLAGS(_id, _name, _parent, &infra_cg_regs, _shift, \ 410f4f9a9c0SAngeloGioacchino Del Regno &mtk_clk_gate_ops_setclr, CLK_IS_CRITICAL) 411f4f9a9c0SAngeloGioacchino Del Regno 41210966457SAngeloGioacchino Del Regno static const struct mtk_gate infra_clks[] = { 41310966457SAngeloGioacchino Del Regno GATE_DUMMY(CLK_DUMMY, "infra_dummy"), 414a8aede79SJames Liao GATE_ICG(CLK_INFRA_PMIC_WRAP, "pmic_wrap_ck", "axi_sel", 23), 415a8aede79SJames Liao GATE_ICG(CLK_INFRA_PMICSPI, "pmicspi_ck", "pmicspi_sel", 22), 416a8aede79SJames Liao GATE_ICG(CLK_INFRA_CCIF1_AP_CTRL, "ccif1_ap_ctrl", "axi_sel", 21), 417a8aede79SJames Liao GATE_ICG(CLK_INFRA_CCIF0_AP_CTRL, "ccif0_ap_ctrl", "axi_sel", 20), 418a8aede79SJames Liao GATE_ICG(CLK_INFRA_KP, "kp_ck", "axi_sel", 16), 419a8aede79SJames Liao GATE_ICG(CLK_INFRA_CPUM, "cpum_ck", "cpum_tck_in", 15), 420f4f9a9c0SAngeloGioacchino Del Regno GATE_ICG_AO(CLK_INFRA_M4U, "m4u_ck", "mem_sel", 8), 421a8aede79SJames Liao GATE_ICG(CLK_INFRA_MFGAXI, "mfgaxi_ck", "axi_sel", 7), 422a8aede79SJames Liao GATE_ICG(CLK_INFRA_DEVAPC, "devapc_ck", "axi_sel", 6), 423a8aede79SJames Liao GATE_ICG(CLK_INFRA_AUDIO, "audio_ck", "aud_intbus_sel", 5), 424a8aede79SJames Liao GATE_ICG(CLK_INFRA_MFG_BUS, "mfg_bus_ck", "axi_sel", 2), 425a8aede79SJames Liao GATE_ICG(CLK_INFRA_SMI, "smi_ck", "smi_sel", 1), 426a8aede79SJames Liao GATE_ICG(CLK_INFRA_DBGCLK, "dbgclk_ck", "axi_sel", 0), 427a8aede79SJames Liao }; 428a8aede79SJames Liao 429a8aede79SJames Liao static const struct mtk_gate_regs peri0_cg_regs = { 430a8aede79SJames Liao .set_ofs = 0x0008, 431a8aede79SJames Liao .clr_ofs = 0x0010, 432a8aede79SJames Liao .sta_ofs = 0x0018, 433a8aede79SJames Liao }; 434a8aede79SJames Liao 435a8aede79SJames Liao static const struct mtk_gate_regs peri1_cg_regs = { 436a8aede79SJames Liao .set_ofs = 0x000c, 437a8aede79SJames Liao .clr_ofs = 0x0014, 438a8aede79SJames Liao .sta_ofs = 0x001c, 439a8aede79SJames Liao }; 440a8aede79SJames Liao 4414c85e20bSAngeloGioacchino Del Regno #define GATE_PERI0(_id, _name, _parent, _shift) \ 4424c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, &peri0_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 443a8aede79SJames Liao 4444c85e20bSAngeloGioacchino Del Regno #define GATE_PERI1(_id, _name, _parent, _shift) \ 4454c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, &peri1_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 446a8aede79SJames Liao 44710966457SAngeloGioacchino Del Regno static const struct mtk_gate peri_gates[] = { 44810966457SAngeloGioacchino Del Regno GATE_DUMMY(CLK_DUMMY, "peri_dummy"), 449a8aede79SJames Liao /* PERI0 */ 450a8aede79SJames Liao GATE_PERI0(CLK_PERI_I2C5, "i2c5_ck", "axi_sel", 31), 451a8aede79SJames Liao GATE_PERI0(CLK_PERI_I2C4, "i2c4_ck", "axi_sel", 30), 452a8aede79SJames Liao GATE_PERI0(CLK_PERI_I2C3, "i2c3_ck", "axi_sel", 29), 453a8aede79SJames Liao GATE_PERI0(CLK_PERI_I2C2, "i2c2_ck", "axi_sel", 28), 454a8aede79SJames Liao GATE_PERI0(CLK_PERI_I2C1, "i2c1_ck", "axi_sel", 27), 455a8aede79SJames Liao GATE_PERI0(CLK_PERI_I2C0, "i2c0_ck", "axi_sel", 26), 456a8aede79SJames Liao GATE_PERI0(CLK_PERI_UART3, "uart3_ck", "axi_sel", 25), 457a8aede79SJames Liao GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 24), 458a8aede79SJames Liao GATE_PERI0(CLK_PERI_UART1, "uart1_ck", "axi_sel", 23), 459a8aede79SJames Liao GATE_PERI0(CLK_PERI_UART0, "uart0_ck", "axi_sel", 22), 460a8aede79SJames Liao GATE_PERI0(CLK_PERI_IRDA, "irda_ck", "irda_sel", 21), 461a8aede79SJames Liao GATE_PERI0(CLK_PERI_NLI, "nli_ck", "axi_sel", 20), 462a8aede79SJames Liao GATE_PERI0(CLK_PERI_MD_HIF, "md_hif_ck", "axi_sel", 19), 463a8aede79SJames Liao GATE_PERI0(CLK_PERI_AP_HIF, "ap_hif_ck", "axi_sel", 18), 464a8aede79SJames Liao GATE_PERI0(CLK_PERI_MSDC30_3, "msdc30_3_ck", "msdc30_4_sel", 17), 465a8aede79SJames Liao GATE_PERI0(CLK_PERI_MSDC30_2, "msdc30_2_ck", "msdc30_3_sel", 16), 466a8aede79SJames Liao GATE_PERI0(CLK_PERI_MSDC30_1, "msdc30_1_ck", "msdc30_2_sel", 15), 467a8aede79SJames Liao GATE_PERI0(CLK_PERI_MSDC20_2, "msdc20_2_ck", "msdc30_1_sel", 14), 468a8aede79SJames Liao GATE_PERI0(CLK_PERI_MSDC20_1, "msdc20_1_ck", "msdc30_0_sel", 13), 469a8aede79SJames Liao GATE_PERI0(CLK_PERI_AP_DMA, "ap_dma_ck", "axi_sel", 12), 470a8aede79SJames Liao GATE_PERI0(CLK_PERI_USB1, "usb1_ck", "usb20_sel", 11), 471a8aede79SJames Liao GATE_PERI0(CLK_PERI_USB0, "usb0_ck", "usb20_sel", 10), 472a8aede79SJames Liao GATE_PERI0(CLK_PERI_PWM, "pwm_ck", "axi_sel", 9), 473a8aede79SJames Liao GATE_PERI0(CLK_PERI_PWM7, "pwm7_ck", "axi_sel", 8), 474a8aede79SJames Liao GATE_PERI0(CLK_PERI_PWM6, "pwm6_ck", "axi_sel", 7), 475a8aede79SJames Liao GATE_PERI0(CLK_PERI_PWM5, "pwm5_ck", "axi_sel", 6), 476a8aede79SJames Liao GATE_PERI0(CLK_PERI_PWM4, "pwm4_ck", "axi_sel", 5), 477a8aede79SJames Liao GATE_PERI0(CLK_PERI_PWM3, "pwm3_ck", "axi_sel", 4), 478a8aede79SJames Liao GATE_PERI0(CLK_PERI_PWM2, "pwm2_ck", "axi_sel", 3), 479a8aede79SJames Liao GATE_PERI0(CLK_PERI_PWM1, "pwm1_ck", "axi_sel", 2), 480a8aede79SJames Liao GATE_PERI0(CLK_PERI_THERM, "therm_ck", "axi_sel", 1), 481a8aede79SJames Liao GATE_PERI0(CLK_PERI_NFI, "nfi_ck", "axi_sel", 0), 482a8aede79SJames Liao /* PERI1 */ 483a8aede79SJames Liao GATE_PERI1(CLK_PERI_USBSLV, "usbslv_ck", "axi_sel", 8), 484a8aede79SJames Liao GATE_PERI1(CLK_PERI_USB1_MCU, "usb1_mcu_ck", "axi_sel", 7), 485a8aede79SJames Liao GATE_PERI1(CLK_PERI_USB0_MCU, "usb0_mcu_ck", "axi_sel", 6), 486a8aede79SJames Liao GATE_PERI1(CLK_PERI_GCPU, "gcpu_ck", "gcpu_sel", 5), 487a8aede79SJames Liao GATE_PERI1(CLK_PERI_FHCTL, "fhctl_ck", "clk26m", 4), 488a8aede79SJames Liao GATE_PERI1(CLK_PERI_SPI1, "spi1_ck", "spi_sel", 3), 489a8aede79SJames Liao GATE_PERI1(CLK_PERI_AUXADC, "auxadc_ck", "clk26m", 2), 490a8aede79SJames Liao GATE_PERI1(CLK_PERI_PERI_PWRAP, "peri_pwrap_ck", "axi_sel", 1), 491a8aede79SJames Liao GATE_PERI1(CLK_PERI_I2C6, "i2c6_ck", "axi_sel", 0), 492a8aede79SJames Liao }; 493a8aede79SJames Liao 49410966457SAngeloGioacchino Del Regno static const char * const uart_ck_sel_parents[] = { 495a8aede79SJames Liao "clk26m", 496a8aede79SJames Liao "uart_sel", 497a8aede79SJames Liao }; 498a8aede79SJames Liao 49910966457SAngeloGioacchino Del Regno static const struct mtk_composite peri_clks[] = { 500a8aede79SJames Liao MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1), 501a8aede79SJames Liao MUX(CLK_PERI_UART1_SEL, "uart1_ck_sel", uart_ck_sel_parents, 0x40c, 1, 1), 502a8aede79SJames Liao MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1), 503a8aede79SJames Liao MUX(CLK_PERI_UART3_SEL, "uart3_ck_sel", uart_ck_sel_parents, 0x40c, 3, 1), 504a8aede79SJames Liao }; 505a8aede79SJames Liao 506723e3671SRex-BC Chen static u16 infrasys_rst_ofs[] = { 0x30, 0x34, }; 507723e3671SRex-BC Chen static u16 pericfg_rst_ofs[] = { 0x0, 0x4, }; 508723e3671SRex-BC Chen 5092d2a2900SRex-BC Chen static const struct mtk_clk_rst_desc clk_rst_desc[] = { 5102d2a2900SRex-BC Chen /* infrasys */ 5112d2a2900SRex-BC Chen { 5122d2a2900SRex-BC Chen .version = MTK_RST_SIMPLE, 513723e3671SRex-BC Chen .rst_bank_ofs = infrasys_rst_ofs, 514723e3671SRex-BC Chen .rst_bank_nr = ARRAY_SIZE(infrasys_rst_ofs), 5152d2a2900SRex-BC Chen }, 5162d2a2900SRex-BC Chen /* pericfg */ 5172d2a2900SRex-BC Chen { 5182d2a2900SRex-BC Chen .version = MTK_RST_SIMPLE, 519723e3671SRex-BC Chen .rst_bank_ofs = pericfg_rst_ofs, 520723e3671SRex-BC Chen .rst_bank_nr = ARRAY_SIZE(pericfg_rst_ofs), 5212d2a2900SRex-BC Chen } 5222d2a2900SRex-BC Chen }; 5232d2a2900SRex-BC Chen 52410966457SAngeloGioacchino Del Regno static const struct mtk_clk_desc infra_desc = { 52510966457SAngeloGioacchino Del Regno .clks = infra_clks, 52610966457SAngeloGioacchino Del Regno .num_clks = ARRAY_SIZE(infra_clks), 52710966457SAngeloGioacchino Del Regno .rst_desc = &clk_rst_desc[0], 52810966457SAngeloGioacchino Del Regno }; 529a8aede79SJames Liao 53010966457SAngeloGioacchino Del Regno static const struct mtk_clk_desc peri_desc = { 53110966457SAngeloGioacchino Del Regno .clks = peri_gates, 53210966457SAngeloGioacchino Del Regno .num_clks = ARRAY_SIZE(peri_gates), 53310966457SAngeloGioacchino Del Regno .composite_clks = peri_clks, 53410966457SAngeloGioacchino Del Regno .num_composite_clks = ARRAY_SIZE(peri_clks), 53510966457SAngeloGioacchino Del Regno .clk_lock = &mt8135_clk_lock, 53610966457SAngeloGioacchino Del Regno .rst_desc = &clk_rst_desc[1], 53710966457SAngeloGioacchino Del Regno }; 538a8aede79SJames Liao 53910966457SAngeloGioacchino Del Regno static const struct mtk_clk_desc topck_desc = { 54010966457SAngeloGioacchino Del Regno .factor_clks = top_divs, 54110966457SAngeloGioacchino Del Regno .num_factor_clks = ARRAY_SIZE(top_divs), 54210966457SAngeloGioacchino Del Regno .composite_clks = top_muxes, 54310966457SAngeloGioacchino Del Regno .num_composite_clks = ARRAY_SIZE(top_muxes), 54410966457SAngeloGioacchino Del Regno .clk_lock = &mt8135_clk_lock, 54510966457SAngeloGioacchino Del Regno }; 546a8aede79SJames Liao 54710966457SAngeloGioacchino Del Regno static const struct of_device_id of_match_clk_mt8135[] = { 54810966457SAngeloGioacchino Del Regno { .compatible = "mediatek,mt8135-infracfg", .data = &infra_desc }, 54910966457SAngeloGioacchino Del Regno { .compatible = "mediatek,mt8135-pericfg", .data = &peri_desc }, 55010966457SAngeloGioacchino Del Regno { .compatible = "mediatek,mt8135-topckgen", .data = &topck_desc }, 55110966457SAngeloGioacchino Del Regno { /* sentinel */ } 55210966457SAngeloGioacchino Del Regno }; 55310966457SAngeloGioacchino Del Regno MODULE_DEVICE_TABLE(of, of_match_clk_mt8135); 554a8aede79SJames Liao 55510966457SAngeloGioacchino Del Regno static struct platform_driver clk_mt8135_drv = { 55610966457SAngeloGioacchino Del Regno .driver = { 55710966457SAngeloGioacchino Del Regno .name = "clk-mt8135", 55810966457SAngeloGioacchino Del Regno .of_match_table = of_match_clk_mt8135, 55910966457SAngeloGioacchino Del Regno }, 56010966457SAngeloGioacchino Del Regno .probe = mtk_clk_simple_probe, 561*61ca6ee7SUwe Kleine-König .remove_new = mtk_clk_simple_remove, 56210966457SAngeloGioacchino Del Regno }; 56310966457SAngeloGioacchino Del Regno module_platform_driver(clk_mt8135_drv); 564a8aede79SJames Liao 56510966457SAngeloGioacchino Del Regno MODULE_DESCRIPTION("MediaTek MT8135 clocks driver"); 566a451da86SAngeloGioacchino Del Regno MODULE_LICENSE("GPL"); 567