/openbmc/linux/Documentation/devicetree/bindings/thermal/ |
H A D | qoriq-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs 10 - Anson Huang <Anson.Huang@nxp.com> 15 The version of the device is determined by the TMU IP Block Revision 19 ---------- ----- 22 - fsl,qoriq-tmu 23 - fsl,imx8mq-tmu [all …]
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H A D | imx8mm-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/thermal/imx8mm-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Anson Huang <Anson.Huang@nxp.com> 13 i.MX8MM has TMU IP to allow temperature measurement, there are 22 - enum: 23 - fsl,imx8mm-tmu 24 - fsl,imx8mp-tmu 25 - items: [all …]
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/openbmc/u-boot/drivers/power/ |
H A D | exynos-tmu.c | 6 * EXYNOS - Thermal Management Unit 17 * MA 02111-1307 USA 23 #include <tmu.h> 24 #include <asm/arch/tmu.h> 64 /* Pre-defined values and thresholds for calibration of current temperature */ 66 /* pre-defined temperature thresholds */ 68 /* pre-defined efuse range minimum value */ 70 /* pre-defined efuse value for temperature calibration */ 72 /* pre-defined efuse range maximum value */ 78 /* TMU device specific details and status */ [all …]
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/openbmc/linux/drivers/thermal/ |
H A D | qoriq_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0 54 #define REGS_V2_TMSAR(n) (0x304 + 16 * (n)) /* TMU monitoring 85 return container_of(s, struct qoriq_tmu_data, sensor[s->id]); in qoriq_sensor_to_data() 96 * For TMU Rev1: in tmu_get_temp() 104 * For TMU Rev2: in tmu_get_temp() 113 regmap_read(qdata->regmap, REGS_TMR, &val); in tmu_get_temp() 115 return -EAGAIN; in tmu_get_temp() 117 if (regmap_read_poll_timeout(qdata->regmap, in tmu_get_temp() 118 REGS_TRITSR(qsensor->id), in tmu_get_temp() 123 return -ENODATA; in tmu_get_temp() [all …]
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H A D | imx8mm_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <linux/nvmem-consumer.h> 21 #define TER 0x0 /* TMU enable */ 23 #define TRITSR 0x20 /* TMU immediate temp */ 24 /* TMU calibration data registers */ 52 /* TMU OCOTP calibration data bitfields */ 72 #define VER2_TEMP_LOW_LIMIT -40000 100 struct imx8mm_tmu *tmu = sensor->priv; in imx8mm_tmu_get_temp() local 103 val = readl_relaxed(tmu->base + TRITSR) & TRITSR_TEMP0_VAL_MASK; in imx8mm_tmu_get_temp() 107 * ERR051272: TMU: Bit 31 of registers TMU_TSCR/TMU_TRITSR/TMU_TRATSR invalid in imx8mm_tmu_get_temp() [all …]
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/openbmc/u-boot/doc/device-tree-bindings/exynos/ |
H A D | tmu.txt | 5 - compatible : Should be "samsung,exynos-tmu" for TMU 6 - samsung,min-temp : Minimum temperature value (25 degree celsius) 7 - Current temperature of SoC should be more than this value. 8 - samsung,max-temp : Maximum temperature value (125 degree celsius) 9 - Current temperature of SoC should be less than this value. 10 - samsung,start-warning : Temperature at which TMU starts giving warning (degree celsius) 11 - samsung,start-tripping : Temperature at which TMU shuts down the system (degree celsius) 12 - samsung,hw-tripping : Temperature at which hardware tripping should happen 13 in case TMU fails to power off (degree celsius) 14 - samsung,efuse-min-value : SOC efuse min value (Constant 40) [all …]
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/openbmc/linux/drivers/thermal/samsung/ |
H A D | exynos_tmu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * exynos_tmu.c - Samsung Exynos TMU (Thermal Management Unit) 25 #include <dt-bindings/thermal/thermal_exynos.h> 139 * struct exynos_tmu_data : A structure to hold the private data of the TMU 141 * @id: identifier of the one instance of the TMU controller. 142 * @base: base address of the single instance of the TMU controller. 143 * @base_second: base address of the common registers of the TMU controller. 144 * @irq: irq number of the TMU controller. 150 * @sclk: pointer to the clock structure for accessing the tmu special clk. 151 * @cal_type: calibration type for temperature [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1046A family SoC. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 37 #address-cells = <1>; [all …]
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H A D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1088A family SoC. 5 * Copyright 2017-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 26 #address-cells = <1>; [all …]
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H A D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1012A family SoC. 6 * Copyright 2019-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 23 rtic-a = &rtic_a; [all …]
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H A D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 // Device Tree Include file for Layerscape-LX2160A family SoC. 5 // Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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H A D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1043A family SoC. 5 * Copyright 2014-2015 Freescale Semiconductor, Inc. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/thermal/thermal.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 6 * Copyright 2017-2020 NXP 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 32 #address-cells = <1>; [all …]
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H A D | imx93.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx93-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/fsl,imx93-power.h> 11 #include <dt-bindings/thermal/thermal.h> 13 #include "imx93-pinfunc.h" 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; [all …]
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H A D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; [all …]
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H A D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | fsl-imx8mq.dtsi | 16 #include "fsl-imx8-ca53.dtsi" 17 #include <dt-bindings/clock/imx8mq-clock.h> 18 #include <dt-bindings/gpio/gpio.h> 19 #include <dt-bindings/input/input.h> 20 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #include <dt-bindings/pinctrl/pins-imx8mq.h> 22 #include <dt-bindings/thermal/thermal.h> 26 interrupt-parent = <&gpc>; 27 #address-cells = <2>; 28 #size-cells = <2>; [all …]
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H A D | exynos5420-peach-pit.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * SAMSUNG/GOOGLE Peach-Pit board device tree source 9 /dts-v1/; 11 #include <dt-bindings/clock/maxim,max77802.h> 12 #include <dt-bindings/regulator/maxim,max77802.h> 17 compatible = "google,pit-rev#", "google,pit", 21 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; 22 hwid = "PIT TEST A-A 7848"; 23 lazy-init = <1>; 34 compatible = "pwm-backlight"; [all …]
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H A D | exynos5250-spring.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/input/input.h> 48 samsung,bl1-offset = <0x1400>; 49 samsung,bl2-offset = <0x3400>; 50 u-boot-memory = "/memory"; 51 u-boot-offset = <0x3e00000 0x100000>; 56 #address-cells = <1>; [all …]
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/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | t1023si-post.dtsi | 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; 55 compatible = "fsl,ifc", "simple-bus"; [all …]
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H A D | t1040si-post.dtsi | 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc. 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/ls/ |
H A D | ls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 12 interrupt-parent = <&gic>; 30 #address-cells = <1>; 31 #size-cells = <0>; 34 compatible = "arm,cortex-a7"; [all …]
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/openbmc/linux/ |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |