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/openbmc/linux/drivers/slimbus/
H A Dqcom-ctrl.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2011-2017, The Linux Foundation
88 /* Resource group info for manager, and non-ported generic device-components */
103 struct slim_controller ctrl; member
109 struct slim_ctrl_buf rx; member
120 static void qcom_slim_queue_tx(struct qcom_slim_ctrl *ctrl, void *buf, in qcom_slim_queue_tx() argument
125 __iowrite32_copy(ctrl->base + tx_reg, buf, count); in qcom_slim_queue_tx()
131 static void *slim_alloc_rxbuf(struct qcom_slim_ctrl *ctrl) in slim_alloc_rxbuf() argument
136 spin_lock_irqsave(&ctrl->rx.lock, flags); in slim_alloc_rxbuf()
137 if ((ctrl->rx.tail + 1) % ctrl->rx.n == ctrl->rx.head) { in slim_alloc_rxbuf()
[all …]
/openbmc/u-boot/drivers/net/pfe_eth/
H A Dpfe_driver.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2015-2016 Freescale Semiconductor, Inc.
14 * HIF Rx interface function
15 * Reads the rx descriptor from the current location (rx_to_read).
16 * - If the descriptor has a valid data/pkt, then get the data pointer
17 * - check for the input rx phy number
18 * - increment the rx data pointer by pkt_head_room_size
19 * - decrement the data length by pkt_head_room_size
20 * - handover the packet to caller.
22 * @param[out] pkt_ptr - Pointer to store rx packet
[all …]
/openbmc/linux/drivers/media/radio/wl128x/
H A Dfmdrv_v4l2.c1 // SPDX-License-Identifier: GPL-2.0-only
29 /* -- V4L2 RADIO (/dev/radioX) device file operation interfaces --- */
31 /* Read RX RDS data */
43 return -EIO; in fm_v4l2_fops_read()
46 if (mutex_lock_interruptible(&fmdev->mutex)) in fm_v4l2_fops_read()
47 return -ERESTARTSYS; in fm_v4l2_fops_read()
67 mutex_unlock(&fmdev->mutex); in fm_v4l2_fops_read()
80 rds.text[sizeof(rds.text) - 1] = '\0'; in fm_v4l2_fops_write()
84 return -EFAULT; in fm_v4l2_fops_write()
87 if (mutex_lock_interruptible(&fmdev->mutex)) in fm_v4l2_fops_write()
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-pic32.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
27 u32 ctrl; member
46 #define CTRL_RX_INT_SHIFT 0 /* Rx interrupt generation */
61 #define CTRL_SMP BIT(9) /* Rx at middle or end of tx */
75 #define STAT_RF_EMPTY BIT(5) /* RX Fifo empty */
88 #define CTRL2_TX_UR_EN BIT(10) /* Enable int on Tx under-run */
89 #define CTRL2_RX_OV_EN BIT(11) /* Enable int on Rx over-run */
105 u32 speed_hz; /* spi-clk rate */
116 const void *rx; member
[all …]
H A Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
175 #define STM32_SPI_MASTER_MODE(stm32_spi) (!(stm32_spi)->device_mode)
176 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
193 * @dma_rx_en: SPI DMA RX enable register end SPI DMA RX enable bit
200 * @rx: SPI RX data register
212 const struct stm32_spi_reg rx; member
219 * struct stm32_spi_cfg - stm32 compatible configuration data
[all …]
H A Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
10 #include <linux/dma-mapping.h>
26 #include <linux/dma/imx-dma.h>
110 void (*rx)(struct spi_imx_data *spi_imx); member
133 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
138 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
143 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
148 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
154 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 rx-tx-swap: true
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/openbmc/u-boot/drivers/net/
H A Dftmac110.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Dante Su <dantesu@faraday-tech.com>
15 #include <asm/dma-mapping.h>
34 * Its DMA engine has a weird restriction that its Rx DMA engine
35 * accepts only 16-bits aligned address, 32-bits aligned is not
42 * 4 bytes aligned: O.K (-> u-boot ZeroCopy is possible)
43 * (2) Rx DMA Buffer Address:
70 struct ftmac110_chip *chip = dev->priv; in mdio_read()
71 struct ftmac110_regs *regs = chip->regs; in mdio_read()
79 writel(tmp, &regs->phycr); in mdio_read()
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H A Dmacb.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2005-2006 Atmel Corporation
10 * The u-boot networking stack is a little weird. It seems like the
15 * The MACB receives packets into 128-byte receive buffers, so the
20 * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific
21 * configuration header. This way, the core allocates one RX buffer
26 * 32-byte packet "alignment" (which really should be called
40 #include <asm/dma-mapping.h>
72 u32 ctrl; member
178 | MACB_BF(PHYA, macb->phy_addr) in macb_mdio_write()
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H A Dbcm-sf2-eth-gmac.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014-2017 Broadcom.
19 #include "bcm-sf2-eth.h"
20 #include "bcm-sf2-eth-gmac.h"
26 countdown -= 10; \
111 descp = (dma64dd_t *)(dma->tx_desc_aligned) + i; in dma_tx_dump()
113 descp->ctrl1, descp->ctrl2, in dma_tx_dump()
114 descp->addrhigh, descp->addrlow); in dma_tx_dump()
120 bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE_ALIGNED); in dma_tx_dump()
132 printf("RX DMA Register:\n"); in dma_rx_dump()
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/openbmc/u-boot/drivers/spi/
H A Dpic32_spi.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <dt-bindings/clock/microchip,clock.h>
26 struct pic32_reg_atomic ctrl; member
37 #define PIC32_SPI_CTRL_SMP BIT(9) /* Rx at middle or end of tx */
67 u32 speed_hz; /* spi-clk rate */
73 const void *rx; member
84 writel(PIC32_SPI_CTRL_ON, &priv->regs->ctrl.set); in pic32_spi_enable()
89 writel(PIC32_SPI_CTRL_ON, &priv->regs->ctrl.clr); in pic32_spi_disable()
94 u32 sr = readl(&priv->regs->status.raw); in pic32_spi_rx_fifo_level()
101 u32 sr = readl(&priv->regs->status.raw); in pic32_spi_tx_fifo_level()
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/openbmc/linux/drivers/soc/fsl/qe/
H A Dqmc.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
52 /* Tx time-slot assignment table pointer (16 bits) */
54 /* Rx pointer (16 bits) */
64 /* Rx time-slot assignment table pointer (16 bits) */
70 /* Time slot assignment table Rx (32 x 16 bits) */
102 /* Zero-insertion state (32 bits) */
106 /* Rx buffer descriptor base address (16 bits, offset from MCBASE) */
112 /* Rx internal state (32 bits) */
114 /* Rx buffer descriptor pointer (16 bits) */
[all …]
/openbmc/linux/drivers/net/ethernet/intel/e1000e/
H A Dmac.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
7 * e1000e_get_bus_info_pcie - Get PCIe bus information
16 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
17 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
18 struct e1000_adapter *adapter = hw->adapter; in e1000e_get_bus_info_pcie()
21 cap_offset = adapter->pdev->pcie_cap; in e1000e_get_bus_info_pcie()
23 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
25 pci_read_config_word(adapter->pdev, in e1000e_get_bus_info_pcie()
28 bus->width = (enum e1000_bus_width)((pcie_link_status & in e1000e_get_bus_info_pcie()
[all …]
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac5.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
52 { true, "RTES", "RX FSM Timeout Error" },
95 { true, "RXCES", "MTL RX Memory Error" },
96 { true, "RXAMS", "MTL RX Memory Address Mismatch Error" },
97 { true, "RXUES", "MTL RX Memory Error" },
103 { true, "RPCES", "MTL RX Parser Memory Error" },
104 { true, "RPAMS", "MTL RX Parser Memory Address Mismatch Error" },
105 { true, "RPUES", "MTL RX Parser Memory Error" },
203 return -EINVAL; in dwmac5_safety_feat_config()
211 if (safety_feat_cfg->tsoee) in dwmac5_safety_feat_config()
[all …]
H A Ddwxgmac2_core.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
18 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_core_init()
19 u32 tx, rx; in dwxgmac2_core_init() local
22 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()
25 rx |= XGMAC_CORE_INIT_RX; in dwxgmac2_core_init()
27 if (hw->ps) { in dwxgmac2_core_init()
29 tx &= ~hw->link.speed_mask; in dwxgmac2_core_init()
31 switch (hw->ps) { in dwxgmac2_core_init()
33 tx |= hw->link.xgmii.speed10000; in dwxgmac2_core_init()
36 tx |= hw->link.speed2500; in dwxgmac2_core_init()
[all …]
/openbmc/linux/sound/soc/fsl/
H A Dfsl_spdif.c1 // SPDX-License-Identifier: GPL-2.0
27 #include "imx-pcm.h"
47 #define RX_SAMPLE_RATE_KCONTROL "RX Sample Rate"
59 * @rx_burst: rx maxburst size
99 * struct fsl_spdif_priv - Freescale SPDIF private data
104 * @rxrate_kcontrol: kcontrol for RX Sample Rate
114 * @rxclk: rx clock sources for capture
116 * @sysclk: system clock for rx clock rate measurement
218 return (clk == STC_TXCLK_SPDIF_ROOT) && !spdif->soc->shared_root_clock; in fsl_spdif_can_set_clk_rate()
224 struct regmap *regmap = spdif_priv->regmap; in spdif_irq_dpll_lock()
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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8-isi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
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/openbmc/linux/drivers/net/ethernet/altera/
H A Daltera_sgdma.c1 // SPDX-License-Identifier: GPL-2.0-only
56 priv->txctrlreg = SGDMA_CTRLREG_ILASTD | in sgdma_initialize()
59 priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP | in sgdma_initialize()
63 INIT_LIST_HEAD(&priv->txlisthd); in sgdma_initialize()
64 INIT_LIST_HEAD(&priv->rxlisthd); in sgdma_initialize()
66 priv->rxdescphys = (dma_addr_t) 0; in sgdma_initialize()
67 priv->txdescphys = (dma_addr_t) 0; in sgdma_initialize()
69 priv->rxdescphys = dma_map_single(priv->device, in sgdma_initialize()
70 (void __force *)priv->rx_dma_desc, in sgdma_initialize()
71 priv->rxdescmem, DMA_BIDIRECTIONAL); in sgdma_initialize()
[all …]
/openbmc/linux/drivers/media/pci/cobalt/
H A Dcobalt-irq.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
11 #include "cobalt-driver.h"
12 #include "cobalt-irq.h"
13 #include "cobalt-omnitek.h"
17 struct cobalt *cobalt = s->cobalt; in cobalt_dma_stream_queue_handler()
18 int rx = s->video_channel; in cobalt_dma_stream_queue_handler() local
20 COBALT_CVI_FREEWHEEL(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
22 COBALT_CVI_VMR(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
24 COBALT_CVI(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
[all …]
/openbmc/linux/drivers/net/ethernet/intel/igc/
H A Digc_base.c1 // SPDX-License-Identifier: GPL-2.0
13 * igc_reset_hw_base - Reset hardware
22 u32 ctrl; in igc_reset_hw_base() local
24 /* Prevent the PCI-E bus from sticking if there is no TLP connection in igc_reset_hw_base()
29 hw_dbg("PCI-E Master disable polling has failed\n"); in igc_reset_hw_base()
40 ctrl = rd32(IGC_CTRL); in igc_reset_hw_base()
43 wr32(IGC_CTRL, ctrl | IGC_CTRL_RST); in igc_reset_hw_base()
62 * igc_init_nvm_params_base - Init NVM func ptrs.
67 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_params_base()
74 /* Added to a constant, "size" becomes the left-shift value in igc_init_nvm_params_base()
[all …]
/openbmc/linux/drivers/tty/serial/
H A Dapbuart.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 u32 ctrl; member
29 #define UART_STATUS_OE 0x00000010 /* RX Overrun Error */
30 #define UART_STATUS_PE 0x00000020 /* RX Parity Error */
31 #define UART_STATUS_FE 0x00000040 /* RX Framing Error */
35 * The following defines the bits in the APBUART Ctrl Registers.
46 #define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase))
48 #define APBBASE_DATA_P(port) (&(APBBASE(port)->data))
49 #define APBBASE_STATUS_P(port) (&(APBBASE(port)->status))
50 #define APBBASE_CTRL_P(port) (&(APBBASE(port)->ctrl))
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dst,stm32-spdifrx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
14 IEC-60958 and IEC-61937.
17 - $ref: dai-common.yaml#
22 - st,stm32h7-spdifrx
24 "#sound-dai-cells":
33 clock-names:
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/openbmc/linux/Documentation/networking/
H A Dstatistics.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - standard interface statistics based on
16 - protocol-specific statistics; and
17 - driver-defined statistics available via ethtool.
20 -----------------------------
25 $ ip -s -s link show dev ens4u1u1
28 RX: bytes packets errors dropped overrun mcast
30 RX errors: length crc frame fifo missed
38 Note that `-s` has been specified twice to see all members of
40 If `-s` is specified once the detailed errors won't be shown.
[all …]
/openbmc/linux/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
21 #include <linux/io-64-nonatomic-hi-lo.h>
32 if (__nn->dp.netdev) \
33 netdev_printk(lvl, __nn->dp.netdev, fmt, ## args); \
35 dev_printk(lvl, __nn->dp.dev, "ctrl: " fmt, ## args); \
48 if (__dp->netdev) \
49 netdev_warn(__dp->netdev, fmt, ## args); \
51 dev_warn(__dp->dev, fmt, ## args); \
80 #define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */
[all …]
/openbmc/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
221 IS_NO_STAT_M1 = 1<<9, /* No Rx Status from MAC 1 */
222 IS_NO_STAT_M2 = 1<<8, /* No Rx Status from MAC 2 */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
263 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
264 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
265 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
[all …]

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