Lines Matching +full:rx +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014-2017 Broadcom.
19 #include "bcm-sf2-eth.h"
20 #include "bcm-sf2-eth-gmac.h"
26 countdown -= 10; \
111 descp = (dma64dd_t *)(dma->tx_desc_aligned) + i; in dma_tx_dump()
113 descp->ctrl1, descp->ctrl2, in dma_tx_dump()
114 descp->addrhigh, descp->addrlow); in dma_tx_dump()
120 bufp = (uint8_t *)(dma->tx_buf + i * TX_BUF_SIZE_ALIGNED); in dma_tx_dump()
132 printf("RX DMA Register:\n"); in dma_rx_dump()
141 printf("RX Descriptors:\n"); in dma_rx_dump()
143 descp = (dma64dd_t *)(dma->rx_desc_aligned) + i; in dma_rx_dump()
145 descp->ctrl1, descp->ctrl2, in dma_rx_dump()
146 descp->addrhigh, descp->addrlow); in dma_rx_dump()
149 printf("RX Buffers:\n"); in dma_rx_dump()
151 bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED; in dma_rx_dump()
163 uint32_t ctrl; in dma_tx_init() local
168 memset((void *)(dma->tx_desc_aligned), 0, in dma_tx_init()
170 memset(dma->tx_buf, 0, TX_BUF_NUM * TX_BUF_SIZE_ALIGNED); in dma_tx_init()
174 descp = (dma64dd_t *)(dma->tx_desc_aligned) + i; in dma_tx_init()
175 bufp = dma->tx_buf + i * TX_BUF_SIZE_ALIGNED; in dma_tx_init()
179 ctrl = 0; in dma_tx_init()
181 if (i == (TX_BUF_NUM-1)) in dma_tx_init()
182 ctrl = D64_CTRL1_EOT; in dma_tx_init()
183 descp->ctrl1 = ctrl; in dma_tx_init()
184 descp->ctrl2 = 0; in dma_tx_init()
185 descp->addrlow = (uint32_t)bufp; in dma_tx_init()
186 descp->addrhigh = 0; in dma_tx_init()
190 descp = dma->tx_desc_aligned; in dma_tx_init()
191 bufp = dma->tx_buf; in dma_tx_init()
200 writel((uint32_t)(dma->tx_desc_aligned), GMAC0_DMA_TX_ADDR_LOW_ADDR); in dma_tx_init()
204 writel(((uint32_t)(dma->tx_desc_aligned)) & D64_XP_LD_MASK, in dma_tx_init()
215 uint32_t ctrl; in dma_rx_init() local
221 memset((void *)(dma->rx_desc_aligned), 0, in dma_rx_init()
224 memset(dma->rx_buf, 0, RX_BUF_NUM * RX_BUF_SIZE_ALIGNED); in dma_rx_init()
226 /* Initialize RX DMA descriptor table */ in dma_rx_init()
228 descp = (dma64dd_t *)(dma->rx_desc_aligned) + i; in dma_rx_init()
229 bufp = dma->rx_buf + i * RX_BUF_SIZE_ALIGNED; in dma_rx_init()
230 ctrl = 0; in dma_rx_init()
232 if (i == (RX_BUF_NUM - 1)) in dma_rx_init()
233 ctrl = D64_CTRL1_EOT; in dma_rx_init()
234 descp->ctrl1 = ctrl; in dma_rx_init()
235 descp->ctrl2 = RX_BUF_SIZE_ALIGNED; in dma_rx_init()
236 descp->addrlow = (uint32_t)bufp; in dma_rx_init()
237 descp->addrhigh = 0; in dma_rx_init()
243 descp = dma->rx_desc_aligned; in dma_rx_init()
244 bufp = dma->rx_buf; in dma_rx_init()
269 * Rx Overflow Continue and Parity are DISABLED. in dma_init()
273 debug("rx burst len 0x%x\n", in dma_init()
298 free(dma->tx_buf); in dma_deinit()
299 dma->tx_buf = NULL; in dma_deinit()
300 free(dma->tx_desc_aligned); in dma_deinit()
301 dma->tx_desc_aligned = NULL; in dma_deinit()
303 free(dma->rx_buf); in dma_deinit()
304 dma->rx_buf = NULL; in dma_deinit()
305 free(dma->rx_desc_aligned); in dma_deinit()
306 dma->rx_desc_aligned = NULL; in dma_deinit()
313 uint8_t *bufp = dma->tx_buf + dma->cur_tx_index * TX_BUF_SIZE_ALIGNED; in gmac_tx_packet()
317 int txout = dma->cur_tx_index; in gmac_tx_packet()
320 uint32_t ctrl; in gmac_tx_packet() local
321 uint32_t last_desc = (((uint32_t)dma->tx_desc_aligned) + in gmac_tx_packet()
333 ctrl = (buflen & D64_CTRL2_BC_MASK); in gmac_tx_packet()
341 if (txout == (TX_BUF_NUM - 1)) { in gmac_tx_packet()
343 last_desc = ((uint32_t)(dma->tx_desc_aligned)) & D64_XP_LD_MASK; in gmac_tx_packet()
347 descp = ((dma64dd_t *)(dma->tx_desc_aligned)) + txout; in gmac_tx_packet()
348 descp->addrlow = (uint32_t)bufp; in gmac_tx_packet()
349 descp->addrhigh = 0; in gmac_tx_packet()
350 descp->ctrl1 = flags; in gmac_tx_packet()
351 descp->ctrl2 = ctrl; in gmac_tx_packet()
354 flush_dcache_range((unsigned long)dma->tx_desc_aligned, in gmac_tx_packet()
355 (unsigned long)dma->tx_desc_aligned + in gmac_tx_packet()
366 dma->cur_tx_index = (txout + 1) & (TX_BUF_NUM - 1); in gmac_tx_packet()
415 index = dma->cur_rx_index; in gmac_check_rx_done()
416 offset = (uint32_t)(dma->rx_desc_aligned); in gmac_check_rx_done()
419 curr = ((stat0 - offset) & D64_RS0_CD_MASK) / sizeof(dma64dd_t); in gmac_check_rx_done()
420 active = ((stat1 - offset) & D64_RS0_CD_MASK) / sizeof(dma64dd_t); in gmac_check_rx_done()
424 return -1; in gmac_check_rx_done()
432 /* get the packet pointer that corresponds to the rx descriptor */ in gmac_check_rx_done()
433 bufp = dma->rx_buf + index * RX_BUF_SIZE_ALIGNED; in gmac_check_rx_done()
435 descp = (dma64dd_t *)(dma->rx_desc_aligned) + index; in gmac_check_rx_done()
437 flush_dcache_range((unsigned long)dma->rx_desc_aligned, in gmac_check_rx_done()
438 (unsigned long)dma->rx_desc_aligned + in gmac_check_rx_done()
443 buflen = (descp->ctrl2 & D64_CTRL2_BC_MASK); in gmac_check_rx_done()
451 dma->cur_rx_index = (index + 1) & (RX_BUF_NUM - 1); in gmac_check_rx_done()
459 /* copy status into temp buf then copy data from rx buffer */ in gmac_check_rx_done()
465 descp->ctrl2 = RX_BUF_SIZE_ALIGNED; in gmac_check_rx_done()
466 descp->addrlow = (uint32_t)bufp; in gmac_check_rx_done()
467 descp->addrhigh = 0; in gmac_check_rx_done()
469 flush_dcache_range((unsigned long)dma->rx_desc_aligned, in gmac_check_rx_done()
470 (unsigned long)dma->rx_desc_aligned + in gmac_check_rx_done()
473 /* set the lastdscr for the rx ring */ in gmac_check_rx_done()
531 dma->cur_tx_index = 0; in gmac_enable_dma()
548 writel((uint32_t)(dma->tx_desc_aligned), in gmac_enable_dma()
552 dma->cur_rx_index = 0; in gmac_enable_dma()
570 /* Keep default Rx burstlen */ in gmac_enable_dma()
577 * the rx descriptor ring should have in gmac_enable_dma()
579 * set the lastdscr for the rx ring in gmac_enable_dma()
581 writel(((uint32_t)(dma->rx_desc_aligned) + in gmac_enable_dma()
582 (RX_BUF_NUM - 1) * RX_BUF_SIZE_ALIGNED) & in gmac_enable_dma()
597 timeout -= 10; in gmac_mii_busywait()
613 return -1; in gmac_miiphy_read()
625 return -1; in gmac_miiphy_read()
641 return -1; in gmac_miiphy_write()
654 return -1; in gmac_miiphy_write()
745 return -1; in gmac_set_speed()
772 struct eth_info *eth = (struct eth_info *)(dev->priv); in gmac_mac_init()
773 struct eth_dma *dma = &(eth->dma); in gmac_mac_init()
797 * set eth_data into loopback mode to ensure no rx traffic in gmac_mac_init()
846 /* select MDC/MDIO connecting to on-chip internal PHYs */ in gmac_mac_init()
862 /* enable one rx interrupt per received frame */ in gmac_mac_init()
892 return -1; in gmac_mac_init()
897 struct eth_info *eth = (struct eth_info *)(dev->priv); in gmac_add()
898 struct eth_dma *dma = &(eth->dma); in gmac_add()
902 * Desc has to be 16-byte aligned. But for dcache flush it must be in gmac_add()
908 return -1; in gmac_add()
911 dma->tx_desc_aligned = (void *)tmp; in gmac_add()
913 dma->tx_desc_aligned, DESCP_SIZE_ALIGNED * TX_BUF_NUM); in gmac_add()
918 free(dma->tx_desc_aligned); in gmac_add()
919 return -1; in gmac_add()
921 dma->tx_buf = (uint8_t *)tmp; in gmac_add()
923 dma->tx_buf, TX_BUF_SIZE_ALIGNED * TX_BUF_NUM); in gmac_add()
925 /* Desc has to be 16-byte aligned */ in gmac_add()
928 printf("%s: Failed to allocate RX Descriptor\n", __func__); in gmac_add()
929 free(dma->tx_desc_aligned); in gmac_add()
930 free(dma->tx_buf); in gmac_add()
931 return -1; in gmac_add()
933 dma->rx_desc_aligned = (void *)tmp; in gmac_add()
934 debug("RX Descriptor Buffer: %p, length: 0x%x\n", in gmac_add()
935 dma->rx_desc_aligned, DESCP_SIZE_ALIGNED * RX_BUF_NUM); in gmac_add()
939 printf("%s: Failed to allocate RX Data Buffer\n", __func__); in gmac_add()
940 free(dma->tx_desc_aligned); in gmac_add()
941 free(dma->tx_buf); in gmac_add()
942 free(dma->rx_desc_aligned); in gmac_add()
943 return -1; in gmac_add()
945 dma->rx_buf = (uint8_t *)tmp; in gmac_add()
946 debug("RX Data Buffer: %p; length: 0x%x\n", in gmac_add()
947 dma->rx_buf, RX_BUF_SIZE_ALIGNED * RX_BUF_NUM); in gmac_add()
951 eth->phy_interface = PHY_INTERFACE_MODE_GMII; in gmac_add()
953 dma->tx_packet = gmac_tx_packet; in gmac_add()
954 dma->check_tx_done = gmac_check_tx_done; in gmac_add()
956 dma->check_rx_done = gmac_check_rx_done; in gmac_add()
958 dma->enable_dma = gmac_enable_dma; in gmac_add()
959 dma->disable_dma = gmac_disable_dma; in gmac_add()
961 eth->miiphy_read = gmac_miiphy_read; in gmac_add()
962 eth->miiphy_write = gmac_miiphy_write; in gmac_add()
964 eth->mac_init = gmac_mac_init; in gmac_add()
965 eth->disable_mac = gmac_disable; in gmac_add()
966 eth->enable_mac = gmac_enable; in gmac_add()
967 eth->set_mac_addr = gmac_set_mac_addr; in gmac_add()
968 eth->set_mac_speed = gmac_set_speed; in gmac_add()