Home
last modified time | relevance | path

Searched +full:pcie +full:- +full:mirror (Results 1 – 25 of 48) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt7622-pcie-mirror.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek PCIE Mirror Controller for MT7622
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
14 The mediatek PCIE mirror provides a configuration interface for PCIE
20 - enum:
21 - mediatek,mt7622-pcie-mirror
[all …]
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dnbd-tls-iothread34 rm -f "$dst_image"
59 if ! (ss --version) >/dev/null 2>&1; then
66 while ss -ltn | grep -sqE ":$port\b"; do
68 if [ $port -eq 65000 ]; then port=50000; fi
85 tls_obj_base=tls-creds-x509,id=tls0,verify-peer=true,dir="${tls_dir}"
91 $QEMU_IMG create -f qcow2 "$DST_IMG" $size | _filter_img_create
97 _launch_qemu -machine q35 \
98 -object iothread,id=iothread0 \
99 -object "${tls_obj_base}"/client1,endpoint=client \
100 -device '{"driver":"pcie-root-port", "id":"root0", "multifunction":true,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmediatek,net.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
20 - mediatek,mt2701-eth
21 - mediatek,mt7623-eth
22 - mediatek,mt7621-eth
23 - mediatek,mt7622-eth
24 - mediatek,mt7629-eth
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dge_imp3a.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc.
11 /include/ "p2020si-pre.dtsi"
33 /* nor@0,0 is a mirror of part of the memory in nor@1,0
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
39 bank-width = <2>;
40 device-width = <1>;
45 read-only;
[all …]
H A Dgef_sbc310.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
17 /include/ "mpc8641si-pre.dtsi"
37 /* flash@0,0 is a mirror of part of the memory in flash@1,0
39 compatible = "gef,sbc310-firmware-mirror", "cfi-flash";
41 bank-width = <2>;
42 device-width = <2>;
43 #address-cells = <1>;
44 #size-cells = <1>;
48 read-only;
[all …]
H A Dgef_ppc9a.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
17 /include/ "mpc8641si-pre.dtsi"
37 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
38 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
40 /* flash@0,0 is a mirror of part of the memory in flash@1,0
42 compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
44 bank-width = <4>;
45 device-width = <2>;
46 #address-cells = <1>;
[all …]
H A Dgef_sbc610.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
17 /include/ "mpc8641si-pre.dtsi"
37 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
38 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
40 /* flash@0,0 is a mirror of part of the memory in flash@1,0
42 compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
44 bank-width = <4>;
45 device-width = <2>;
46 #address-cells = <1>;
[all …]
/openbmc/linux/drivers/net/ethernet/netronome/nfp/
H A Dnfp_abi.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
19 * enum nfp_mbox_cmd - PF mailbox commands
25 * Input - struct nfp_shared_buf_pool_id
26 * Output - struct nfp_shared_buf_pool_info_get
29 * Input - struct nfp_shared_buf_pool_info_set
30 * Output - None
32 * @NFP_MBOX_PCIE_ABM_ENABLE: enable PCIe-side advanced buffer management
33 * Enable advanced buffer management of the PCIe block. If ABM is disabled
34 * PCIe block maintains a very short queue of buffers and does tail drop.
36 * Input - None
[all …]
/openbmc/linux/Documentation/firmware-guide/acpi/apei/
H A Doutput_format.rst1 .. SPDX-License-Identifier: GPL-2.0
28 PCIe error | unknown, <uuid string>
32 <pcie section data> | <null>
55 [cache error][, TLB error][, bus error][, micro-architectural error]
81 unknown | no error | single-bit ECC | multi-bit ECC | \
82 single-symbol chipkill ECC | multi-symbol chipkill ECC | master abort | \
84 mirror Broken | memory sparing | scrub corrected error | \
87 <pcie section data> :=
88 [port_type: <integer>, <pcie port type string>]
104 <pcie port type string>* := PCIe end point | legacy PCI end point | \
[all …]
/openbmc/linux/Documentation/networking/
H A Drepresentors.rst1 .. SPDX-License-Identifier: GPL-2.0
8 used to control internal switching on SmartNICs. For the closely-related port
9 representors on physical (multi-port) switches, see
13 ----------
15 Since the mid-2010s, network cards have started offering more complex
16 virtualisation capabilities than the legacy SR-IOV approach (with its simple
17 MAC/VLAN-based switching model) can support. This led to a desire to offload
18 software-defined networks (such as OpenVSwitch) to these NICs to specify the
23 virtual switches and IOV devices. Just as each physical port of a Linux-
41 -----------
[all …]
/openbmc/qemu/hw/vfio/
H A Dpci-quirks.c4 * Copyright Red Hat, Inc. 2012-2015
10 * the COPYING file in the top-level directory.
18 #include "qemu/error-report.h"
19 #include "qemu/main-loop.h"
26 #include "hw/qdev-properties.h"
56 trace_vfio_quirk_rom_in_denylist(vdev->vbasedev.name, in vfio_opt_rom_in_denylist()
108 VFIOPCIDevice *vdev = window->vdev; in vfio_generic_window_quirk_address_read()
110 return vfio_region_read(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_address_read()
111 addr + window->address_offset, size); in vfio_generic_window_quirk_address_read()
119 VFIOPCIDevice *vdev = window->vdev; in vfio_generic_window_quirk_address_write()
[all …]
/openbmc/linux/Documentation/networking/device_drivers/ethernet/marvell/
H A Docteontx2.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
12 - `Overview`_
13 - `Drivers`_
14 - `Basic packet flow`_
15 - `Devlink health reporters`_
16 - `Quality of service`_
23 PCI-compatible physical and virtual functions. Each functional block
25 RVU supports multiple PCIe SRIOV physical functions (PFs) and virtual
31 - Network pool or buffer allocator (NPA)
32 - Network interface controller (NIX)
[all …]
/openbmc/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
55 regmap_update_bits(dev->hw->regs, reg, mask | val, val); in wed_m32()
91 return readl(dev->wlan.base + reg); in wifi_r32()
97 writel(val, dev->wlan.base + reg); in wifi_w32()
122 dev_err(dev->hw->dev, "rx reset failed\n"); in mtk_wdma_rx_reset()
127 for (i = 0; i < ARRAY_SIZE(dev->rx_wdma); i++) { in mtk_wdma_rx_reset()
128 if (dev->rx_wdma[i].desc) in mtk_wdma_rx_reset()
147 dev_err(dev->hw->dev, "tx reset failed\n"); in mtk_wdma_tx_reset()
152 for (i = 0; i < ARRAY_SIZE(dev->tx_wdma); i++) in mtk_wdma_tx_reset()
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mt7622-clk.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt7622-power.h>
14 #include <dt-bindings/reset/mt7622-reset.h>
15 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
[all …]
/openbmc/qemu/docs/specs/
H A Driscv-iommu.rst1 .. _riscv-iommu:
3 RISC-V IOMMU support for RISC-V machines
6 QEMU implements a RISC-V IOMMU emulation based on the RISC-V IOMMU spec
9 The emulation includes a PCI reference device, riscv-iommu-pci, that QEMU
10 RISC-V boards can use. The 'virt' RISC-V machine is compatible with this
13 riscv-iommu-pci reference device
14 --------------------------------
16 This device implements the RISC-V IOMMU emulation as recommended by the section
17 "Integrating an IOMMU as a PCIe device" of `iommu1.0`_: a PCI device with base
18 class 08h, sub-class 06h and programming interface 00h.
[all …]
/openbmc/linux/drivers/firmware/efi/
H A Dcper.c1 // SPDX-License-Identifier: GPL-2.0
32 * multiple boot may co-exist in ERST.
73 * cper_print_bits - print strings for set bits
103 len += scnprintf(buf+len, sizeof(buf)-len, ", %s", str); in cper_print_bits()
127 "micro-architectural error",
147 if (proc->validation_bits & CPER_PROC_VALID_TYPE) in cper_print_proc_generic()
148 printk("%s""processor_type: %d, %s\n", pfx, proc->proc_type, in cper_print_proc_generic()
149 proc->proc_type < ARRAY_SIZE(proc_type_strs) ? in cper_print_proc_generic()
150 proc_type_strs[proc->proc_type] : "unknown"); in cper_print_proc_generic()
151 if (proc->validation_bits & CPER_PROC_VALID_ISA) in cper_print_proc_generic()
[all …]
/openbmc/linux/Documentation/mm/
H A Dhmm.rst5 Provide infrastructure and helpers to integrate non-conventional memory (device
21 CPU page-table mirroring works and the purpose of HMM in this context. The
52 complex data set needs to re-map all the pointer relations between each of its
69 are only do-able with a shared address space. It is also more reasonable to use
81 If we only consider the PCIE bus, then a device can access main memory (often
88 Another crippling factor is the limited bandwidth (~32GBytes/s with PCIE 4.0
93 Some platforms are developing new I/O buses or additions/modifications to PCIE
95 two-way cache coherency between CPU and device and allow all atomic operations the
115 allocate a buffer (or use a pool of pre-allocated buffers) and write GPU
136 With these two features, HMM not only allows a device to mirror process address
[all …]
/openbmc/u-boot/board/gdsys/a38x/
H A Dcontrolcenterdc.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <tpm-v1.h>
13 #include <asm-generic/gpio.h>
16 #include "../arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h"
48 * be used by the DDR3 init code in the SPL U-Boot version to configure
54 /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */
97 if (!request_gpio_by_name(&gpio, "pca9698@22", 31, "fpga-program-gpio")) { in board_pex_config()
102 /* give lunatic PCIe clock some time to stabilize */ in board_pex_config()
110 if (!request_gpio_by_name(&gpio, "pca9698@22", 19, "fpga-done-gpio")) { in board_pex_config()
121 if (!request_gpio_by_name(&gpio, "gpio@18100", 6, "cpu-to-fpga-reset")) { in board_pex_config()
[all …]
/openbmc/linux/drivers/net/ethernet/intel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
27 in the format 123456-001 (six digits hyphen three digits).
59 tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support"
64 This driver supports the PCI-Express Intel(R) PRO/1000 gigabit
65 ethernet family of adapters. For PCI or PCI-X e1000 adapters,
79 bool "Support HW cross-timestamp on PCH devices"
83 Say Y to enable hardware supported cross-timestamping on PCH
84 devices. The cross-timestamp is available through the PTP clock
85 driver precise cross-timestamp ioctl (PTP_SYS_OFFSET_PRECISE).
88 tristate "Intel(R) 82575/82576 PCI-Express Gigabit Ethernet support"
[all …]
/openbmc/u-boot/cmd/
H A Dotp_info.h7 #define OTP_REG_RESERVED -1
8 #define OTP_REG_VALUE -2
9 #define OTP_REG_VALID_BIT -3
69 { 20, 1, 0, "Disable Pcie EHCI device" },
70 { 20, 1, 1, "Enable Pcie EHCI device" },
74 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" },
76 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" },
103 { 41, 1, 0, "Disable boot SPI 3B address mode auto-clear" },
104 { 41, 1, 1, "Enable boot SPI 3B address mode auto-clear" },
193 { 20, 1, 0, "Disable Pcie EHCI device" },
[all …]
/openbmc/linux/drivers/scsi/smartpqi/
H A Dsmartpqi.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * driver for Microchip PQI-based storage controllers
4 * Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries
5 * Copyright (c) 2016-2018 Microsemi Corporation
6 * Copyright (c) 2016 PMC-Sierra, Inc.
12 #include <linux/io-64-nonatomic-lo-hi.h>
18 #include <linux/bsg-lib.h>
31 u8 admin_iq_element_length; /* in 16-byte units */
32 u8 admin_oq_element_length; /* in 16-byte units */
33 __le16 max_reset_timeout; /* in 100-millisecond units */
[all …]
/openbmc/linux/drivers/scsi/
H A Dhpsa_cmd.h3 * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
5 * Copyright 2014-2015 PMC-Sierra, Inc.
6 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
207 /* SCSI-3 Commands */
243 __le16 metadata_disks_per_row;/* mirror/parity disk entries / row
246 __le16 layout_map_count; /* layout maps (1 map per mirror/parity
267 #define GET_BMIC_DRIVE_NUMBER(lunid) (((GET_BMIC_BUS((lunid)) - 1) << 8) + \
272 u8 lun_count; /* multi-lun device, how many luns */
393 u8 offense_num; /* byte # of offense 0-base */
414 #define DIRECT_LOOKUP_MASK (~((1 << DIRECT_LOOKUP_SHIFT) - 1))
[all …]
/openbmc/qemu/qapi/
H A Dqom.json1 # -*- Mode: Python -*-
5 # See the COPYING file in the top-level directory.
8 { 'include': 'block-core.json' }
38 # @default-value: the default value, if any (since 5.0)
46 '*default-value': 'any' } }
49 # @qom-list:
54 # @path: the path within the object model. See @qom-get for a
62 # .. qmp-example::
64 # -> { "execute": "qom-list",
66 # <- { "return": [ { "name": "type", "type": "string" },
[all …]
/openbmc/linux/Documentation/PCI/
H A Dpci.rst1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Martin Mares <mj@ucw.cz>
8 - Grant Grundler <grundler@parisc-linux.org>
11 Since each CPU architecture implements different chip-sets and PCI devices
18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
26 "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list.
38 supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver].
45 - Enable the device
46 - Request MMIO/IOP resources
47 - Set the DMA mask size (for both coherent and streaming DMA)
[all …]
/openbmc/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
26 If set to vendor, prefer vendor-specific driver
58 Documentation/firmware-guide/acpi/debug.rst for more information about
116 Format: <byte> or <bitmap-list>
[all …]

12