1c78c5a66SLorenzo Bianconi# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c78c5a66SLorenzo Bianconi%YAML 1.2 3c78c5a66SLorenzo Bianconi--- 4c78c5a66SLorenzo Bianconi$id: http://devicetree.org/schemas/net/mediatek,net.yaml# 5c78c5a66SLorenzo Bianconi$schema: http://devicetree.org/meta-schemas/core.yaml# 6c78c5a66SLorenzo Bianconi 7c78c5a66SLorenzo Bianconititle: MediaTek Frame Engine Ethernet controller 8c78c5a66SLorenzo Bianconi 9c78c5a66SLorenzo Bianconimaintainers: 10c78c5a66SLorenzo Bianconi - Lorenzo Bianconi <lorenzo@kernel.org> 11c78c5a66SLorenzo Bianconi - Felix Fietkau <nbd@nbd.name> 12c78c5a66SLorenzo Bianconi 13c78c5a66SLorenzo Bianconidescription: 14c78c5a66SLorenzo Bianconi The frame engine ethernet controller can be found on MediaTek SoCs. These SoCs 15c78c5a66SLorenzo Bianconi have dual GMAC ports. 16c78c5a66SLorenzo Bianconi 17c78c5a66SLorenzo Bianconiproperties: 18c78c5a66SLorenzo Bianconi compatible: 19c78c5a66SLorenzo Bianconi enum: 20c78c5a66SLorenzo Bianconi - mediatek,mt2701-eth 21c78c5a66SLorenzo Bianconi - mediatek,mt7623-eth 221cbf487dSDaniel Golle - mediatek,mt7621-eth 23c78c5a66SLorenzo Bianconi - mediatek,mt7622-eth 24c78c5a66SLorenzo Bianconi - mediatek,mt7629-eth 25e3ac1c27SDaniel Golle - mediatek,mt7981-eth 264b139b75SLorenzo Bianconi - mediatek,mt7986-eth 27c94a9aabSDaniel Golle - mediatek,mt7988-eth 28c78c5a66SLorenzo Bianconi - ralink,rt5350-eth 29c78c5a66SLorenzo Bianconi 30c78c5a66SLorenzo Bianconi reg: 31c78c5a66SLorenzo Bianconi maxItems: 1 32c78c5a66SLorenzo Bianconi 330a1e19c8SRob Herring clocks: true 340a1e19c8SRob Herring clock-names: true 350a1e19c8SRob Herring 36c78c5a66SLorenzo Bianconi interrupts: 371cbf487dSDaniel Golle minItems: 1 384b139b75SLorenzo Bianconi maxItems: 4 39c78c5a66SLorenzo Bianconi 40c78c5a66SLorenzo Bianconi power-domains: 41c78c5a66SLorenzo Bianconi maxItems: 1 42c78c5a66SLorenzo Bianconi 43c78c5a66SLorenzo Bianconi resets: 44c78c5a66SLorenzo Bianconi maxItems: 3 45c78c5a66SLorenzo Bianconi 46c78c5a66SLorenzo Bianconi reset-names: 47c78c5a66SLorenzo Bianconi items: 48c78c5a66SLorenzo Bianconi - const: fe 49c78c5a66SLorenzo Bianconi - const: gmac 50c78c5a66SLorenzo Bianconi - const: ppe 51c78c5a66SLorenzo Bianconi 52c78c5a66SLorenzo Bianconi mediatek,ethsys: 53c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 54c78c5a66SLorenzo Bianconi description: 55c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the port setup. 56c78c5a66SLorenzo Bianconi 57c78c5a66SLorenzo Bianconi cci-control-port: true 58c78c5a66SLorenzo Bianconi 59c78c5a66SLorenzo Bianconi mediatek,hifsys: 60c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 61c78c5a66SLorenzo Bianconi description: 62c78c5a66SLorenzo Bianconi Phandle to the mediatek hifsys controller used to provide various clocks 63c78c5a66SLorenzo Bianconi and reset to the system. 64c78c5a66SLorenzo Bianconi 65c94a9aabSDaniel Golle mediatek,infracfg: 66c94a9aabSDaniel Golle $ref: /schemas/types.yaml#/definitions/phandle 67c94a9aabSDaniel Golle description: 68c94a9aabSDaniel Golle Phandle to the syscon node that handles the path from GMAC to 69c94a9aabSDaniel Golle PHY variants. 70c94a9aabSDaniel Golle 71c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 72c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle-array 73c78c5a66SLorenzo Bianconi minItems: 1 74c78c5a66SLorenzo Bianconi maxItems: 2 75c78c5a66SLorenzo Bianconi items: 76c78c5a66SLorenzo Bianconi maxItems: 1 77c78c5a66SLorenzo Bianconi description: 78c78c5a66SLorenzo Bianconi A list of phandle to the syscon node that handles the SGMII setup which is required for 79c78c5a66SLorenzo Bianconi those SoCs equipped with SGMII. 80c78c5a66SLorenzo Bianconi 8122ecfce1SLorenzo Bianconi mediatek,wed: 8222ecfce1SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle-array 8322ecfce1SLorenzo Bianconi minItems: 2 8422ecfce1SLorenzo Bianconi maxItems: 2 8522ecfce1SLorenzo Bianconi items: 8622ecfce1SLorenzo Bianconi maxItems: 1 8722ecfce1SLorenzo Bianconi description: 8822ecfce1SLorenzo Bianconi List of phandles to wireless ethernet dispatch nodes. 8922ecfce1SLorenzo Bianconi 90e3ac1c27SDaniel Golle mediatek,wed-pcie: 91e3ac1c27SDaniel Golle $ref: /schemas/types.yaml#/definitions/phandle 92e3ac1c27SDaniel Golle description: 93e3ac1c27SDaniel Golle Phandle to the mediatek wed-pcie controller. 94e3ac1c27SDaniel Golle 95c78c5a66SLorenzo Bianconi dma-coherent: true 96c78c5a66SLorenzo Bianconi 97c78c5a66SLorenzo Bianconi mdio-bus: 98c78c5a66SLorenzo Bianconi $ref: mdio.yaml# 99c78c5a66SLorenzo Bianconi unevaluatedProperties: false 100c78c5a66SLorenzo Bianconi 101c78c5a66SLorenzo Bianconi "#address-cells": 102c78c5a66SLorenzo Bianconi const: 1 103c78c5a66SLorenzo Bianconi 104c78c5a66SLorenzo Bianconi "#size-cells": 105c78c5a66SLorenzo Bianconi const: 0 106c78c5a66SLorenzo Bianconi 107c78c5a66SLorenzo BianconiallOf: 1083079bfdbSRob Herring - $ref: ethernet-controller.yaml# 109c78c5a66SLorenzo Bianconi - if: 110c78c5a66SLorenzo Bianconi properties: 111c78c5a66SLorenzo Bianconi compatible: 112c78c5a66SLorenzo Bianconi contains: 113c78c5a66SLorenzo Bianconi enum: 114c78c5a66SLorenzo Bianconi - mediatek,mt2701-eth 115c78c5a66SLorenzo Bianconi - mediatek,mt7623-eth 116c78c5a66SLorenzo Bianconi then: 117c78c5a66SLorenzo Bianconi properties: 1184b139b75SLorenzo Bianconi interrupts: 1194b139b75SLorenzo Bianconi maxItems: 3 1204b139b75SLorenzo Bianconi 121c78c5a66SLorenzo Bianconi clocks: 122c78c5a66SLorenzo Bianconi minItems: 4 123c78c5a66SLorenzo Bianconi maxItems: 4 124c78c5a66SLorenzo Bianconi 125c78c5a66SLorenzo Bianconi clock-names: 126c78c5a66SLorenzo Bianconi items: 127c78c5a66SLorenzo Bianconi - const: ethif 128c78c5a66SLorenzo Bianconi - const: esw 129c78c5a66SLorenzo Bianconi - const: gp1 130c78c5a66SLorenzo Bianconi - const: gp2 131c78c5a66SLorenzo Bianconi 132c94a9aabSDaniel Golle mediatek,infracfg: false 133c94a9aabSDaniel Golle 134c78c5a66SLorenzo Bianconi mediatek,pctl: 135c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 136c78c5a66SLorenzo Bianconi description: 137c78c5a66SLorenzo Bianconi Phandle to the syscon node that handles the ports slew rate and 138c78c5a66SLorenzo Bianconi driver current. 139c78c5a66SLorenzo Bianconi 14022ecfce1SLorenzo Bianconi mediatek,wed: false 14122ecfce1SLorenzo Bianconi 142e3ac1c27SDaniel Golle mediatek,wed-pcie: false 143e3ac1c27SDaniel Golle 144c78c5a66SLorenzo Bianconi - if: 145c78c5a66SLorenzo Bianconi properties: 146c78c5a66SLorenzo Bianconi compatible: 147c78c5a66SLorenzo Bianconi contains: 1481cbf487dSDaniel Golle enum: 1491cbf487dSDaniel Golle - mediatek,mt7621-eth 1501cbf487dSDaniel Golle then: 1511cbf487dSDaniel Golle properties: 1521cbf487dSDaniel Golle interrupts: 1531cbf487dSDaniel Golle maxItems: 1 1541cbf487dSDaniel Golle 1551cbf487dSDaniel Golle clocks: 1561cbf487dSDaniel Golle minItems: 2 1571cbf487dSDaniel Golle maxItems: 2 1581cbf487dSDaniel Golle 1591cbf487dSDaniel Golle clock-names: 1601cbf487dSDaniel Golle items: 1611cbf487dSDaniel Golle - const: ethif 1621cbf487dSDaniel Golle - const: fe 1631cbf487dSDaniel Golle 164c94a9aabSDaniel Golle mediatek,infracfg: false 165c94a9aabSDaniel Golle 1661cbf487dSDaniel Golle mediatek,wed: false 1671cbf487dSDaniel Golle 1681cbf487dSDaniel Golle mediatek,wed-pcie: false 1691cbf487dSDaniel Golle 1701cbf487dSDaniel Golle - if: 1711cbf487dSDaniel Golle properties: 1721cbf487dSDaniel Golle compatible: 1731cbf487dSDaniel Golle contains: 174c78c5a66SLorenzo Bianconi const: mediatek,mt7622-eth 175c78c5a66SLorenzo Bianconi then: 176c78c5a66SLorenzo Bianconi properties: 1774b139b75SLorenzo Bianconi interrupts: 1784b139b75SLorenzo Bianconi maxItems: 3 1794b139b75SLorenzo Bianconi 180c78c5a66SLorenzo Bianconi clocks: 181c78c5a66SLorenzo Bianconi minItems: 11 182c78c5a66SLorenzo Bianconi maxItems: 11 183c78c5a66SLorenzo Bianconi 184c78c5a66SLorenzo Bianconi clock-names: 185c78c5a66SLorenzo Bianconi items: 186c78c5a66SLorenzo Bianconi - const: ethif 187c78c5a66SLorenzo Bianconi - const: esw 188c78c5a66SLorenzo Bianconi - const: gp0 189c78c5a66SLorenzo Bianconi - const: gp1 190c78c5a66SLorenzo Bianconi - const: gp2 191c78c5a66SLorenzo Bianconi - const: sgmii_tx250m 192c78c5a66SLorenzo Bianconi - const: sgmii_rx250m 193c78c5a66SLorenzo Bianconi - const: sgmii_cdr_ref 194c78c5a66SLorenzo Bianconi - const: sgmii_cdr_fb 195c78c5a66SLorenzo Bianconi - const: sgmii_ck 196c78c5a66SLorenzo Bianconi - const: eth2pll 197c78c5a66SLorenzo Bianconi 198c94a9aabSDaniel Golle mediatek,infracfg: false 199c94a9aabSDaniel Golle 200c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 201c78c5a66SLorenzo Bianconi minItems: 1 202c78c5a66SLorenzo Bianconi maxItems: 1 203c78c5a66SLorenzo Bianconi 204c78c5a66SLorenzo Bianconi mediatek,pcie-mirror: 205c78c5a66SLorenzo Bianconi $ref: /schemas/types.yaml#/definitions/phandle 206c78c5a66SLorenzo Bianconi description: 207c78c5a66SLorenzo Bianconi Phandle to the mediatek pcie-mirror controller. 208c78c5a66SLorenzo Bianconi 209e3ac1c27SDaniel Golle mediatek,wed-pcie: false 210e3ac1c27SDaniel Golle 211c78c5a66SLorenzo Bianconi - if: 212c78c5a66SLorenzo Bianconi properties: 213c78c5a66SLorenzo Bianconi compatible: 214c78c5a66SLorenzo Bianconi contains: 215c78c5a66SLorenzo Bianconi const: mediatek,mt7629-eth 216c78c5a66SLorenzo Bianconi then: 217c78c5a66SLorenzo Bianconi properties: 2184b139b75SLorenzo Bianconi interrupts: 2194b139b75SLorenzo Bianconi maxItems: 3 2204b139b75SLorenzo Bianconi 221c78c5a66SLorenzo Bianconi clocks: 222c78c5a66SLorenzo Bianconi minItems: 17 223c78c5a66SLorenzo Bianconi maxItems: 17 224c78c5a66SLorenzo Bianconi 225c78c5a66SLorenzo Bianconi clock-names: 226c78c5a66SLorenzo Bianconi items: 227c78c5a66SLorenzo Bianconi - const: ethif 228c78c5a66SLorenzo Bianconi - const: sgmiitop 229c78c5a66SLorenzo Bianconi - const: esw 230c78c5a66SLorenzo Bianconi - const: gp0 231c78c5a66SLorenzo Bianconi - const: gp1 232c78c5a66SLorenzo Bianconi - const: gp2 233c78c5a66SLorenzo Bianconi - const: fe 234c78c5a66SLorenzo Bianconi - const: sgmii_tx250m 235c78c5a66SLorenzo Bianconi - const: sgmii_rx250m 236c78c5a66SLorenzo Bianconi - const: sgmii_cdr_ref 237c78c5a66SLorenzo Bianconi - const: sgmii_cdr_fb 238c78c5a66SLorenzo Bianconi - const: sgmii2_tx250m 239c78c5a66SLorenzo Bianconi - const: sgmii2_rx250m 240c78c5a66SLorenzo Bianconi - const: sgmii2_cdr_ref 241c78c5a66SLorenzo Bianconi - const: sgmii2_cdr_fb 242c78c5a66SLorenzo Bianconi - const: sgmii_ck 243c78c5a66SLorenzo Bianconi - const: eth2pll 244c78c5a66SLorenzo Bianconi 245c78c5a66SLorenzo Bianconi mediatek,sgmiisys: 246c78c5a66SLorenzo Bianconi minItems: 2 247c78c5a66SLorenzo Bianconi maxItems: 2 248c78c5a66SLorenzo Bianconi 24922ecfce1SLorenzo Bianconi mediatek,wed: false 25022ecfce1SLorenzo Bianconi 251e3ac1c27SDaniel Golle mediatek,wed-pcie: false 252e3ac1c27SDaniel Golle 253e3ac1c27SDaniel Golle - if: 254e3ac1c27SDaniel Golle properties: 255e3ac1c27SDaniel Golle compatible: 256e3ac1c27SDaniel Golle contains: 257e3ac1c27SDaniel Golle const: mediatek,mt7981-eth 258e3ac1c27SDaniel Golle then: 259e3ac1c27SDaniel Golle properties: 260e3ac1c27SDaniel Golle interrupts: 261e3ac1c27SDaniel Golle minItems: 4 262e3ac1c27SDaniel Golle 263e3ac1c27SDaniel Golle clocks: 264e3ac1c27SDaniel Golle minItems: 15 265e3ac1c27SDaniel Golle maxItems: 15 266e3ac1c27SDaniel Golle 267e3ac1c27SDaniel Golle clock-names: 268e3ac1c27SDaniel Golle items: 269e3ac1c27SDaniel Golle - const: fe 270e3ac1c27SDaniel Golle - const: gp2 271e3ac1c27SDaniel Golle - const: gp1 272e3ac1c27SDaniel Golle - const: wocpu0 273e3ac1c27SDaniel Golle - const: sgmii_ck 274e3ac1c27SDaniel Golle - const: sgmii_tx250m 275e3ac1c27SDaniel Golle - const: sgmii_rx250m 276e3ac1c27SDaniel Golle - const: sgmii_cdr_ref 277e3ac1c27SDaniel Golle - const: sgmii_cdr_fb 278e3ac1c27SDaniel Golle - const: sgmii2_tx250m 279e3ac1c27SDaniel Golle - const: sgmii2_rx250m 280e3ac1c27SDaniel Golle - const: sgmii2_cdr_ref 281e3ac1c27SDaniel Golle - const: sgmii2_cdr_fb 282e3ac1c27SDaniel Golle - const: netsys0 283e3ac1c27SDaniel Golle - const: netsys1 284e3ac1c27SDaniel Golle 285c94a9aabSDaniel Golle mediatek,infracfg: false 286c94a9aabSDaniel Golle 287e3ac1c27SDaniel Golle mediatek,sgmiisys: 288e3ac1c27SDaniel Golle minItems: 2 289e3ac1c27SDaniel Golle maxItems: 2 290e3ac1c27SDaniel Golle 2914b139b75SLorenzo Bianconi - if: 2924b139b75SLorenzo Bianconi properties: 2934b139b75SLorenzo Bianconi compatible: 2944b139b75SLorenzo Bianconi contains: 2954b139b75SLorenzo Bianconi const: mediatek,mt7986-eth 2964b139b75SLorenzo Bianconi then: 2974b139b75SLorenzo Bianconi properties: 2984b139b75SLorenzo Bianconi interrupts: 2994b139b75SLorenzo Bianconi minItems: 4 3004b139b75SLorenzo Bianconi 3014b139b75SLorenzo Bianconi clocks: 3024b139b75SLorenzo Bianconi minItems: 15 3034b139b75SLorenzo Bianconi maxItems: 15 3044b139b75SLorenzo Bianconi 3054b139b75SLorenzo Bianconi clock-names: 3064b139b75SLorenzo Bianconi items: 3074b139b75SLorenzo Bianconi - const: fe 3084b139b75SLorenzo Bianconi - const: gp2 3094b139b75SLorenzo Bianconi - const: gp1 3104b139b75SLorenzo Bianconi - const: wocpu1 3114b139b75SLorenzo Bianconi - const: wocpu0 3124b139b75SLorenzo Bianconi - const: sgmii_tx250m 3134b139b75SLorenzo Bianconi - const: sgmii_rx250m 3144b139b75SLorenzo Bianconi - const: sgmii_cdr_ref 3154b139b75SLorenzo Bianconi - const: sgmii_cdr_fb 3164b139b75SLorenzo Bianconi - const: sgmii2_tx250m 3174b139b75SLorenzo Bianconi - const: sgmii2_rx250m 3184b139b75SLorenzo Bianconi - const: sgmii2_cdr_ref 3194b139b75SLorenzo Bianconi - const: sgmii2_cdr_fb 3204b139b75SLorenzo Bianconi - const: netsys0 3214b139b75SLorenzo Bianconi - const: netsys1 3224b139b75SLorenzo Bianconi 323c94a9aabSDaniel Golle mediatek,infracfg: false 324c94a9aabSDaniel Golle 325c94a9aabSDaniel Golle mediatek,sgmiisys: 326c94a9aabSDaniel Golle minItems: 2 327c94a9aabSDaniel Golle maxItems: 2 328c94a9aabSDaniel Golle 329c94a9aabSDaniel Golle - if: 330c94a9aabSDaniel Golle properties: 331c94a9aabSDaniel Golle compatible: 332c94a9aabSDaniel Golle contains: 333c94a9aabSDaniel Golle const: mediatek,mt7988-eth 334c94a9aabSDaniel Golle then: 335c94a9aabSDaniel Golle properties: 336c94a9aabSDaniel Golle interrupts: 337c94a9aabSDaniel Golle minItems: 4 338c94a9aabSDaniel Golle 339c94a9aabSDaniel Golle clocks: 340f39c49d0SDaniel Golle minItems: 24 341f39c49d0SDaniel Golle maxItems: 24 342c94a9aabSDaniel Golle 343c94a9aabSDaniel Golle clock-names: 344c94a9aabSDaniel Golle items: 345c94a9aabSDaniel Golle - const: crypto 346c94a9aabSDaniel Golle - const: fe 347c94a9aabSDaniel Golle - const: gp2 348c94a9aabSDaniel Golle - const: gp1 349c94a9aabSDaniel Golle - const: gp3 350c94a9aabSDaniel Golle - const: ethwarp_wocpu2 351c94a9aabSDaniel Golle - const: ethwarp_wocpu1 352c94a9aabSDaniel Golle - const: ethwarp_wocpu0 353c94a9aabSDaniel Golle - const: esw 354c94a9aabSDaniel Golle - const: top_eth_gmii_sel 355c94a9aabSDaniel Golle - const: top_eth_refck_50m_sel 356c94a9aabSDaniel Golle - const: top_eth_sys_200m_sel 357c94a9aabSDaniel Golle - const: top_eth_sys_sel 358c94a9aabSDaniel Golle - const: top_eth_xgmii_sel 359c94a9aabSDaniel Golle - const: top_eth_mii_sel 360c94a9aabSDaniel Golle - const: top_netsys_sel 361c94a9aabSDaniel Golle - const: top_netsys_500m_sel 362c94a9aabSDaniel Golle - const: top_netsys_pao_2x_sel 363c94a9aabSDaniel Golle - const: top_netsys_sync_250m_sel 364c94a9aabSDaniel Golle - const: top_netsys_ppefb_250m_sel 365c94a9aabSDaniel Golle - const: top_netsys_warp_sel 366c94a9aabSDaniel Golle - const: xgp1 367c94a9aabSDaniel Golle - const: xgp2 368c94a9aabSDaniel Golle - const: xgp3 369c94a9aabSDaniel Golle 370c78c5a66SLorenzo BianconipatternProperties: 371c78c5a66SLorenzo Bianconi "^mac@[0-1]$": 372c78c5a66SLorenzo Bianconi type: object 3738469c7f5SRafał Miłecki unevaluatedProperties: false 374c78c5a66SLorenzo Bianconi allOf: 375c78c5a66SLorenzo Bianconi - $ref: ethernet-controller.yaml# 376c78c5a66SLorenzo Bianconi description: 377c78c5a66SLorenzo Bianconi Ethernet MAC node 378c78c5a66SLorenzo Bianconi properties: 379c78c5a66SLorenzo Bianconi compatible: 380c78c5a66SLorenzo Bianconi const: mediatek,eth-mac 381c78c5a66SLorenzo Bianconi 382c78c5a66SLorenzo Bianconi reg: 383c78c5a66SLorenzo Bianconi maxItems: 1 384c78c5a66SLorenzo Bianconi 385c78c5a66SLorenzo Bianconi required: 386c78c5a66SLorenzo Bianconi - reg 387c78c5a66SLorenzo Bianconi - compatible 388c78c5a66SLorenzo Bianconi 389c78c5a66SLorenzo Bianconirequired: 390c78c5a66SLorenzo Bianconi - compatible 391c78c5a66SLorenzo Bianconi - reg 392c78c5a66SLorenzo Bianconi - interrupts 393c78c5a66SLorenzo Bianconi - clocks 394c78c5a66SLorenzo Bianconi - clock-names 395c78c5a66SLorenzo Bianconi - mediatek,ethsys 396c78c5a66SLorenzo Bianconi 397c78c5a66SLorenzo BianconiunevaluatedProperties: false 398c78c5a66SLorenzo Bianconi 399c78c5a66SLorenzo Bianconiexamples: 400c78c5a66SLorenzo Bianconi - | 401c78c5a66SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 402c78c5a66SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 403c78c5a66SLorenzo Bianconi #include <dt-bindings/clock/mt7622-clk.h> 404c78c5a66SLorenzo Bianconi #include <dt-bindings/power/mt7622-power.h> 405c78c5a66SLorenzo Bianconi 406c78c5a66SLorenzo Bianconi soc { 407c78c5a66SLorenzo Bianconi #address-cells = <2>; 408c78c5a66SLorenzo Bianconi #size-cells = <2>; 409c78c5a66SLorenzo Bianconi 410c78c5a66SLorenzo Bianconi ethernet: ethernet@1b100000 { 411c78c5a66SLorenzo Bianconi compatible = "mediatek,mt7622-eth"; 412c78c5a66SLorenzo Bianconi reg = <0 0x1b100000 0 0x20000>; 413c78c5a66SLorenzo Bianconi interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_LOW>, 414c78c5a66SLorenzo Bianconi <GIC_SPI 224 IRQ_TYPE_LEVEL_LOW>, 415c78c5a66SLorenzo Bianconi <GIC_SPI 225 IRQ_TYPE_LEVEL_LOW>; 416c78c5a66SLorenzo Bianconi clocks = <&topckgen CLK_TOP_ETH_SEL>, 417c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_ESW_EN>, 418c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP0_EN>, 419c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP1_EN>, 420c78c5a66SLorenzo Bianconi <ðsys CLK_ETH_GP2_EN>, 421c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_TX250M_EN>, 422c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_RX250M_EN>, 423c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_CDR_REF>, 424c78c5a66SLorenzo Bianconi <&sgmiisys CLK_SGMII_CDR_FB>, 425c78c5a66SLorenzo Bianconi <&topckgen CLK_TOP_SGMIIPLL>, 426c78c5a66SLorenzo Bianconi <&apmixedsys CLK_APMIXED_ETH2PLL>; 427c78c5a66SLorenzo Bianconi clock-names = "ethif", "esw", "gp0", "gp1", "gp2", 428c78c5a66SLorenzo Bianconi "sgmii_tx250m", "sgmii_rx250m", 429c78c5a66SLorenzo Bianconi "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", 430c78c5a66SLorenzo Bianconi "eth2pll"; 431c78c5a66SLorenzo Bianconi power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; 432c78c5a66SLorenzo Bianconi mediatek,ethsys = <ðsys>; 433c78c5a66SLorenzo Bianconi mediatek,sgmiisys = <&sgmiisys>; 434c78c5a66SLorenzo Bianconi cci-control-port = <&cci_control2>; 435c78c5a66SLorenzo Bianconi mediatek,pcie-mirror = <&pcie_mirror>; 436c78c5a66SLorenzo Bianconi mediatek,hifsys = <&hifsys>; 437c78c5a66SLorenzo Bianconi dma-coherent; 438c78c5a66SLorenzo Bianconi 439c78c5a66SLorenzo Bianconi #address-cells = <1>; 440c78c5a66SLorenzo Bianconi #size-cells = <0>; 441c78c5a66SLorenzo Bianconi 442c78c5a66SLorenzo Bianconi mdio0: mdio-bus { 443c78c5a66SLorenzo Bianconi #address-cells = <1>; 444c78c5a66SLorenzo Bianconi #size-cells = <0>; 445c78c5a66SLorenzo Bianconi 446c78c5a66SLorenzo Bianconi phy0: ethernet-phy@0 { 447c78c5a66SLorenzo Bianconi reg = <0>; 448c78c5a66SLorenzo Bianconi }; 449c78c5a66SLorenzo Bianconi 450c78c5a66SLorenzo Bianconi phy1: ethernet-phy@1 { 451c78c5a66SLorenzo Bianconi reg = <1>; 452c78c5a66SLorenzo Bianconi }; 453c78c5a66SLorenzo Bianconi }; 454c78c5a66SLorenzo Bianconi 455c78c5a66SLorenzo Bianconi gmac0: mac@0 { 456c78c5a66SLorenzo Bianconi compatible = "mediatek,eth-mac"; 457c78c5a66SLorenzo Bianconi phy-mode = "rgmii"; 458c78c5a66SLorenzo Bianconi phy-handle = <&phy0>; 459c78c5a66SLorenzo Bianconi reg = <0>; 460c78c5a66SLorenzo Bianconi }; 461c78c5a66SLorenzo Bianconi 462c78c5a66SLorenzo Bianconi gmac1: mac@1 { 463c78c5a66SLorenzo Bianconi compatible = "mediatek,eth-mac"; 464c78c5a66SLorenzo Bianconi phy-mode = "rgmii"; 465c78c5a66SLorenzo Bianconi phy-handle = <&phy1>; 466c78c5a66SLorenzo Bianconi reg = <1>; 467c78c5a66SLorenzo Bianconi }; 468c78c5a66SLorenzo Bianconi }; 469c78c5a66SLorenzo Bianconi }; 4704b139b75SLorenzo Bianconi 4714b139b75SLorenzo Bianconi - | 4724b139b75SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 4734b139b75SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 4744b139b75SLorenzo Bianconi #include <dt-bindings/clock/mt7622-clk.h> 4754b139b75SLorenzo Bianconi 4764b139b75SLorenzo Bianconi soc { 4774b139b75SLorenzo Bianconi #address-cells = <2>; 4784b139b75SLorenzo Bianconi #size-cells = <2>; 4794b139b75SLorenzo Bianconi 4804b139b75SLorenzo Bianconi eth: ethernet@15100000 { 4814b139b75SLorenzo Bianconi #define CLK_ETH_FE_EN 0 4824b139b75SLorenzo Bianconi #define CLK_ETH_WOCPU1_EN 3 4834b139b75SLorenzo Bianconi #define CLK_ETH_WOCPU0_EN 4 4844b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_SEL 43 4854b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_500M_SEL 44 4864b139b75SLorenzo Bianconi #define CLK_TOP_NETSYS_2X_SEL 46 4874b139b75SLorenzo Bianconi #define CLK_TOP_SGM_325M_SEL 47 4884b139b75SLorenzo Bianconi #define CLK_APMIXED_NET2PLL 1 4894b139b75SLorenzo Bianconi #define CLK_APMIXED_SGMPLL 3 4904b139b75SLorenzo Bianconi 4914b139b75SLorenzo Bianconi compatible = "mediatek,mt7986-eth"; 4924b139b75SLorenzo Bianconi reg = <0 0x15100000 0 0x80000>; 4934b139b75SLorenzo Bianconi interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 4944b139b75SLorenzo Bianconi <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 4954b139b75SLorenzo Bianconi <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 4964b139b75SLorenzo Bianconi <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 4974b139b75SLorenzo Bianconi clocks = <ðsys CLK_ETH_FE_EN>, 4984b139b75SLorenzo Bianconi <ðsys CLK_ETH_GP2_EN>, 4994b139b75SLorenzo Bianconi <ðsys CLK_ETH_GP1_EN>, 5004b139b75SLorenzo Bianconi <ðsys CLK_ETH_WOCPU1_EN>, 5014b139b75SLorenzo Bianconi <ðsys CLK_ETH_WOCPU0_EN>, 5024b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_TX250M_EN>, 5034b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_RX250M_EN>, 5044b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_CDR_REF>, 5054b139b75SLorenzo Bianconi <&sgmiisys0 CLK_SGMII_CDR_FB>, 5064b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_TX250M_EN>, 5074b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_RX250M_EN>, 5084b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_CDR_REF>, 5094b139b75SLorenzo Bianconi <&sgmiisys1 CLK_SGMII_CDR_FB>, 5104b139b75SLorenzo Bianconi <&topckgen CLK_TOP_NETSYS_SEL>, 5114b139b75SLorenzo Bianconi <&topckgen CLK_TOP_NETSYS_SEL>; 5124b139b75SLorenzo Bianconi clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0", 5134b139b75SLorenzo Bianconi "sgmii_tx250m", "sgmii_rx250m", 5144b139b75SLorenzo Bianconi "sgmii_cdr_ref", "sgmii_cdr_fb", 5154b139b75SLorenzo Bianconi "sgmii2_tx250m", "sgmii2_rx250m", 5164b139b75SLorenzo Bianconi "sgmii2_cdr_ref", "sgmii2_cdr_fb", 5174b139b75SLorenzo Bianconi "netsys0", "netsys1"; 5184b139b75SLorenzo Bianconi mediatek,ethsys = <ðsys>; 5194b139b75SLorenzo Bianconi mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; 5204b139b75SLorenzo Bianconi assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>, 5214b139b75SLorenzo Bianconi <&topckgen CLK_TOP_SGM_325M_SEL>; 5224b139b75SLorenzo Bianconi assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>, 5234b139b75SLorenzo Bianconi <&apmixedsys CLK_APMIXED_SGMPLL>; 5244b139b75SLorenzo Bianconi 5254b139b75SLorenzo Bianconi #address-cells = <1>; 5264b139b75SLorenzo Bianconi #size-cells = <0>; 5274b139b75SLorenzo Bianconi 5284b139b75SLorenzo Bianconi mdio: mdio-bus { 5294b139b75SLorenzo Bianconi #address-cells = <1>; 5304b139b75SLorenzo Bianconi #size-cells = <0>; 5314b139b75SLorenzo Bianconi 5324b139b75SLorenzo Bianconi phy5: ethernet-phy@0 { 5334b139b75SLorenzo Bianconi compatible = "ethernet-phy-id67c9.de0a"; 5344b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 5354b139b75SLorenzo Bianconi reset-gpios = <&pio 6 1>; 5364b139b75SLorenzo Bianconi reset-deassert-us = <20000>; 5374b139b75SLorenzo Bianconi reg = <5>; 5384b139b75SLorenzo Bianconi }; 5394b139b75SLorenzo Bianconi 5404b139b75SLorenzo Bianconi phy6: ethernet-phy@1 { 5414b139b75SLorenzo Bianconi compatible = "ethernet-phy-id67c9.de0a"; 5424b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 5434b139b75SLorenzo Bianconi reg = <6>; 5444b139b75SLorenzo Bianconi }; 5454b139b75SLorenzo Bianconi }; 5464b139b75SLorenzo Bianconi 5474b139b75SLorenzo Bianconi mac0: mac@0 { 5484b139b75SLorenzo Bianconi compatible = "mediatek,eth-mac"; 5494b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 5504b139b75SLorenzo Bianconi phy-handle = <&phy5>; 5514b139b75SLorenzo Bianconi reg = <0>; 5524b139b75SLorenzo Bianconi }; 5534b139b75SLorenzo Bianconi 5544b139b75SLorenzo Bianconi mac1: mac@1 { 5554b139b75SLorenzo Bianconi compatible = "mediatek,eth-mac"; 5564b139b75SLorenzo Bianconi phy-mode = "2500base-x"; 5574b139b75SLorenzo Bianconi phy-handle = <&phy6>; 5584b139b75SLorenzo Bianconi reg = <1>; 5594b139b75SLorenzo Bianconi }; 5604b139b75SLorenzo Bianconi }; 5614b139b75SLorenzo Bianconi }; 562