u-boot/cmd/otp_info.h

7 #define OTP_REG_RESERVED	-1
8 #define OTP_REG_VALUE		-2
9 #define OTP_REG_VALID_BIT	-3
69 	{ 20, 1, 0, "Disable Pcie EHCI device" },
70 	{ 20, 1, 1, "Enable Pcie EHCI device" },
74 	{ 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" },
76 	{ 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" },
103 	{ 41, 1, 0, "Disable boot SPI 3B address mode auto-clear" },
104 	{ 41, 1, 1, "Enable boot SPI 3B address mode auto-clear" },
193 	{ 20, 1, 0, "Disable Pcie EHCI device" },
194 	{ 20, 1, 1, "Enable Pcie EHCI device" },
198 	{ 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" },
200 	{ 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" },
232 	{ 41, 1, 0, "Disable boot SPI 3B address mode auto-clear" },
233 	{ 41, 1, 1, "Enable boot SPI 3B address mode auto-clear" },
447 	{ 3, 18, 1, 0, "Enable Auto Boot from VUART2 over PCIE" },
448 	{ 3, 18, 1, 1, "Disable Auto Boot from VUART2 over PCIE" },
527 	{ 3, 18, 1, 0, "Enable Auto Boot from VUART2 over PCIE" },
528 	{ 3, 18, 1, 1, "Disable Auto Boot from VUART2 over PCIE" },
570 	{ 21, 1, "Enable PCIe EHCI" },
573 	{ 24, 1, "Enable dedicate PCIe RC reset" },
578 	{ 31, 1, "Enable boot SPI auxiliary control pins(mirror)" },
588 	{ 41, 1, "Enable boot SPI 3B address mode auto-clear" },