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/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-clk-ccf.dtsi14 clocks = <&clkc 71>;
20 clocks = <&clkc 72>;
26 clocks = <&clkc 73>;
32 clocks = <&clkc 74>;
70 clkc: clkc { label
73 compatible = "xlnx,zynqmp-clkc";
108 clocks = <&clkc 63>, <&clkc 31>;
112 clocks = <&clkc 64>, <&clkc 31>;
116 clocks = <&clkc 10>;
120 clocks = <&clkc 19>, <&clkc 31>;
[all …]
H A Dmeson-gxbb.dtsi9 #include <dt-bindings/clock/gxbb-clkc.h>
22 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
32 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
41 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
53 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
242 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
250 assigned-clocks = <&clkc CLKID_GP0_PLL>,
251 <&clkc CLKID_MALI_0_SEL>,
252 <&clkc CLKID_MALI_0>,
253 <&clkc CLKID_MALI>; /* Glitch free mux */
[all …]
H A Dzynq-7000.dtsi22 clocks = <&clkc 3>;
36 clocks = <&clkc 3>;
78 clocks = <&clkc 12>;
84 clocks = <&clkc 19>, <&clkc 36>;
96 clocks = <&clkc 20>, <&clkc 37>;
108 clocks = <&clkc 42>;
120 clocks = <&clkc 38>;
131 clocks = <&clkc 39>;
165 clocks = <&clkc 23>, <&clkc 40>;
174 clocks = <&clkc 24>, <&clkc 41>;
[all …]
H A Dmeson-gxl.dtsi8 #include <dt-bindings/clock/gxbb-clkc.h>
24 clocks = <&clkc CLKID_USB>;
47 clocks = <&clkc CLKID_USB>;
58 clocks = <&clkc CLKID_USB>;
70 clocks = <&clkc CLKID_USB>, <&clkc_AO CLKID_AO_CEC_32K>;
82 clocks = <&clkc CLKID_ETH>,
83 <&clkc CLKID_FCLK_DIV2>,
84 <&clkc CLKID_MPLL2>;
256 clocks = <&clkc CLKID_HDMI_PCLK>,
257 <&clkc CLKID_CLK81>,
[all …]
H A Dmeson-gxl-mali.dtsi24 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
32 assigned-clocks = <&clkc CLKID_GP0_PLL>,
33 <&clkc CLKID_MALI_0_SEL>,
34 <&clkc CLKID_MALI_0>,
35 <&clkc CLKID_MALI>; /* Glitch free mux */
37 <&clkc CLKID_GP0_PLL>,
39 <&clkc CLKID_MALI_0>;
H A Dmeson-axg.dtsi7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
148 clocks = <&clkc CLKID_ETH>,
149 <&clkc CLKID_FCLK_DIV2>,
150 <&clkc CLKID_MPLL2>;
177 clocks = <&clkc CLKID_RNG0>;
971 clkc: clock-controller { label
972 compatible = "amlogic,axg-clkc";
995 compatible = "amlogic,axg-audio-clkc";
999 clocks = <&clkc CLKID_AUDIO>,
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb.dtsi10 #include <dt-bindings/clock/gxbb-clkc.h>
23 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
33 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
42 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
54 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
66 clocks = <&clkc CLKID_AIU_GLUE>,
67 <&clkc CLKID_I2S_OUT>,
68 <&clkc CLKID_AOCLK_GATE>,
69 <&clkc CLKID_CTS_AMCLK>,
70 <&clkc CLKID_MIXER_IFACE>,
[all …]
H A Dmeson-gxl.dtsi8 #include <dt-bindings/clock/gxbb-clkc.h>
25 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
38 clocks = <&clkc CLKID_USB1>;
62 clocks = <&clkc CLKID_ACODEC>;
73 clocks = <&clkc CLKID_BLKMV>;
82 clocks = <&clkc CLKID_AIU_GLUE>,
83 <&clkc CLKID_I2S_OUT>,
84 <&clkc CLKID_AOCLK_GATE>,
85 <&clkc CLKID_CTS_AMCLK>,
86 <&clkc CLKID_MIXER_IFACE>,
[all …]
H A Dmeson-g12-common.dtsi8 #include <dt-bindings/clock/g12a-clkc.h>
36 clocks = <&clkc CLKID_HDMI>,
37 <&clkc CLKID_HTX_PCLK>,
38 <&clkc CLKID_VPU_INTR>;
46 clocks = <&clkc CLKID_HDMI>,
47 <&clkc CLKID_HTX_PCLK>,
48 <&clkc CLKID_VPU_INTR>;
55 clocks = <&clkc CLKID_EFUSE>;
153 clocks = <&clkc CLKID_PCIE_PHY
154 &clkc CLKID_PCIE_COMB
[all …]
H A Dmeson-axg.dtsi7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
119 clocks = <&clkc CLKID_EFUSE>;
193 clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
219 clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
237 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
250 clocks = <&clkc CLKID_USB1>;
277 clocks = <&clkc CLKID_ETH>,
278 <&clkc CLKID_FCLK_DIV2>,
279 <&clkc CLKID_MPLL2>,
[all …]
H A Dmeson-g12b-khadas-vim3.dtsi53 clocks = <&clkc CLKID_CPU_CLK>;
60 clocks = <&clkc CLKID_CPU_CLK>;
67 clocks = <&clkc CLKID_CPUB_CLK>;
74 clocks = <&clkc CLKID_CPUB_CLK>;
81 clocks = <&clkc CLKID_CPUB_CLK>;
88 clocks = <&clkc CLKID_CPUB_CLK>;
/openbmc/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-7000.dtsi19 clocks = <&clkc 3>;
33 clocks = <&clkc 3>;
64 clocks = <&clkc 27>, <&clkc 46>, <&clkc 47>;
107 clocks = <&clkc 12>;
113 clocks = <&clkc 19>, <&clkc 36>;
125 clocks = <&clkc 20>, <&clkc 37>;
137 clocks = <&clkc 42>;
149 clocks = <&clkc 38>;
161 clocks = <&clkc 39>;
196 clocks = <&clkc 23>, <&clkc 40>;
[all …]
/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8b.dtsi7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
27 resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
29 clocks = <&clkc CLKID_CPUCLK>;
39 resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
41 clocks = <&clkc CLKID_CPUCLK>;
51 resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
53 clocks = <&clkc CLKID_CPUCLK>;
63 resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
[all …]
H A Dmeson8.dtsi6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
29 resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
31 clocks = <&clkc CLKID_CPUCLK>;
41 resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
43 clocks = <&clkc CLKID_CPUCLK>;
53 resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
55 clocks = <&clkc CLKID_CPUCLK>;
65 resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
[all …]
H A Dmeson8m2.dtsi13 &clkc {
14 compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc";
31 clocks = <&clkc CLKID_ETH>,
32 <&clkc CLKID_MPLL2>,
33 <&clkc CLKID_MPLL2>,
34 <&clkc CLKID_FCLK_DIV2>;
79 assigned-clocks = <&clkc CLKID_VPU>;
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Damlogic,axg-audio-clkc.txt9 - compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D,
10 "amlogic,g12a-audio-clkc" for G12A,
11 "amlogic,sm1-audio-clkc" for S905X3.
30 preprocessor macros in the dt-bindings/clock/axg-audio-clkc.h header and can be
36 compatible = "amlogic,axg-audio-clkc";
40 clocks = <&clkc CLKID_AUDIO>,
41 <&clkc CLKID_MPLL0>,
42 <&clkc CLKID_MPLL1>,
43 <&clkc CLKID_MPLL2>,
44 <&clkc CLKID_MPLL3>,
[all …]
H A Damlogic,gxbb-clkc.yaml4 $id: http://devicetree.org/schemas/clock/amlogic,gxbb-clkc.yaml#
15 - amlogic,gxbb-clkc
16 - amlogic,gxl-clkc
17 - amlogic,axg-clkc
18 - amlogic,g12a-clkc
19 - amlogic,g12b-clkc
20 - amlogic,sm1-clkc
H A Damlogic,meson8b-clkc.txt9 - "amlogic,meson8-clkc" for Meson8 (S802) SoCs
10 - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
11 - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
26 preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be
30 dt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the
36 clkc: clock-controller {
37 compatible = "amlogic,meson8b-clkc";
50 clocks = <&clkc CLKID_CLK81>;
H A Damlogic,meson8-ddr-clkc.yaml4 $id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#
15 - amlogic,meson8-ddr-clkc
16 - amlogic,meson8b-ddr-clkc
43 compatible = "amlogic,meson8-ddr-clkc";
H A Dsunplus,sp7021-clkc.yaml5 $id: http://devicetree.org/schemas/clock/sunplus,sp7021-clkc.yaml#
15 const: sunplus,sp7021-clkc
43 clkc: clock-controller@9c000004 {
44 compatible = "sunplus,sp7021-clkc";
H A Damlogic,a1-pll-clkc.yaml4 $id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml#
17 const: amlogic,a1-pll-clkc
46 #include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
52 compatible = "amlogic,a1-pll-clkc";
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Damlogic,aiu.yaml87 #include <dt-bindings/clock/gxbb-clkc.h>
99 clocks = <&clkc CLKID_AIU_GLUE>,
100 <&clkc CLKID_I2S_OUT>,
101 <&clkc CLKID_AOCLK_GATE>,
102 <&clkc CLKID_CTS_AMCLK>,
103 <&clkc CLKID_MIXER_IFACE>,
104 <&clkc CLKID_IEC958>,
105 <&clkc CLKID_IEC958_GATE>,
106 <&clkc CLKID_CTS_MCLK_I958>,
107 <&clkc CLKID_CTS_I958>;
/openbmc/linux/arch/arm/boot/dts/sunplus/
H A Dsunplus-sp7021.dtsi8 #include <dt-bindings/clock/sunplus,sp7021-clkc.h>
36 clkc: clock-controller@4 { label
37 compatible = "sunplus,sp7021-clkc";
56 clocks = <&clkc CLK_OTPRX>;
84 clocks = <&clkc CLK_GPIO>;
182 clocks = <&clkc CLK_RTC>;
195 clocks = <&clkc CLK_SPI_COMBO_0>;
212 clocks = <&clkc CLK_SPI_COMBO_1>;
225 clocks = <&clkc CLK_SPI_COMBO_2>;
238 clocks = <&clkc CLK_SPI_COMBO_3>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dxilinx,can.yaml122 clocks = <&clkc 19>, <&clkc 36>;
134 clocks = <&clkc 0>, <&clkc 1>;
146 clocks = <&clkc 0>, <&clkc 1>;
158 clocks = <&clkc 0>, <&clkc 1>;
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dallegro,al5e.yaml82 <&clkc 71>, <&clkc 71>, <&clkc 71>;
99 <&clkc 71>, <&clkc 71>, <&clkc 71>;

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