1855f06a1SMartin Blumenstingl* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit
212545fa3SCarlo Caione
3855f06a1SMartin BlumenstinglThe Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and
4855f06a1SMartin Blumenstinglsupplies clock to various controllers within the SoC.
512545fa3SCarlo Caione
612545fa3SCarlo CaioneRequired Properties:
712545fa3SCarlo Caione
8855f06a1SMartin Blumenstingl- compatible: must be one of:
9855f06a1SMartin Blumenstingl	- "amlogic,meson8-clkc" for Meson8 (S802) SoCs
10855f06a1SMartin Blumenstingl	- "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
11855f06a1SMartin Blumenstingl	- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
1212545fa3SCarlo Caione- #clock-cells: should be 1.
130f9b973bSMartin Blumenstingl- #reset-cells: should be 1.
1425d31698SMartin Blumenstingl- clocks: list of clock phandles, one for each entry in clock-names
1525d31698SMartin Blumenstingl- clock-names: should contain the following:
1625d31698SMartin Blumenstingl  * "xtal": the 24MHz system oscillator
1725d31698SMartin Blumenstingl  * "ddr_pll": the DDR PLL clock
1825d31698SMartin Blumenstingl  * "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)
1912545fa3SCarlo Caione
206c763077SMartin BlumenstinglParent node should have the following properties :
216c763077SMartin Blumenstingl- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
226c763077SMartin Blumenstingl- reg: base address and size of the HHI system control register space.
236c763077SMartin Blumenstingl
2412545fa3SCarlo CaioneEach clock is assigned an identifier and client nodes can use this identifier
2512545fa3SCarlo Caioneto specify the clock which they consume. All available clocks are defined as
2612545fa3SCarlo Caionepreprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be
2712545fa3SCarlo Caioneused in device tree sources.
2812545fa3SCarlo Caione
290f9b973bSMartin BlumenstinglSimilarly a preprocessor macro for each reset line is defined in
300f9b973bSMartin Blumenstingldt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the
310f9b973bSMartin Blumenstingldevice tree sources).
320f9b973bSMartin Blumenstingl
330f9b973bSMartin Blumenstingl
3412545fa3SCarlo CaioneExample: Clock controller node:
3512545fa3SCarlo Caione
366c763077SMartin Blumenstingl	clkc: clock-controller {
3712545fa3SCarlo Caione		compatible = "amlogic,meson8b-clkc";
380f9b973bSMartin Blumenstingl		#clock-cells = <1>;
390f9b973bSMartin Blumenstingl		#reset-cells = <1>;
4012545fa3SCarlo Caione	};
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4212545fa3SCarlo Caione
4312545fa3SCarlo CaioneExample: UART controller node that consumes the clock generated by the clock
4412545fa3SCarlo Caione  controller:
4512545fa3SCarlo Caione
4612545fa3SCarlo Caione	uart_AO: serial@c81004c0 {
4712545fa3SCarlo Caione		compatible = "amlogic,meson-uart";
4812545fa3SCarlo Caione		reg = <0xc81004c0 0x14>;
4912545fa3SCarlo Caione		interrupts = <0 90 1>;
5012545fa3SCarlo Caione		clocks = <&clkc CLKID_CLK81>;
5112545fa3SCarlo Caione	};
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