Lines Matching full:clkc

8 #include <dt-bindings/clock/gxbb-clkc.h>
25 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
38 clocks = <&clkc CLKID_USB1>;
62 clocks = <&clkc CLKID_ACODEC>;
73 clocks = <&clkc CLKID_BLKMV>;
82 clocks = <&clkc CLKID_AIU_GLUE>,
83 <&clkc CLKID_I2S_OUT>,
84 <&clkc CLKID_AOCLK_GATE>,
85 <&clkc CLKID_CTS_AMCLK>,
86 <&clkc CLKID_MIXER_IFACE>,
87 <&clkc CLKID_IEC958>,
88 <&clkc CLKID_IEC958_GATE>,
89 <&clkc CLKID_CTS_MCLK_I958>,
90 <&clkc CLKID_CTS_I958>;
108 clocks = <&clkc CLKID_USB>;
119 clocks = <&clkc CLKID_USB>;
128 clocks = <&clkc CLKID_EFUSE>;
132 clocks = <&clkc CLKID_ETH>,
133 <&clkc CLKID_FCLK_DIV2>,
134 <&clkc CLKID_MPLL2>,
135 <&clkc CLKID_FCLK_DIV2>;
310 clocks = <&xtal>, <&clkc CLKID_CLK81>;
326 clocks = <&clkc CLKID_HDMI>,
327 <&clkc CLKID_HDMI_PCLK>,
328 <&clkc CLKID_GCLK_VENCI_INT0>;
332 assigned-clocks = <&clkc CLKID_HDMI_SEL>,
333 <&clkc CLKID_HDMI>;
339 clkc: clock-controller { label
340 compatible = "amlogic,gxl-clkc";
348 clocks = <&clkc CLKID_RNG0>;
353 clocks = <&clkc CLKID_I2C>;
357 clocks = <&clkc CLKID_AO_I2C>;
361 clocks = <&clkc CLKID_I2C>;
365 clocks = <&clkc CLKID_I2C>;
787 clocks = <&clkc CLKID_FCLK_DIV4>;
828 clocks = <&clkc CLKID_VPU>,
829 <&clkc CLKID_VAPB>;
837 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
838 <&clkc CLKID_VPU_0>,
839 <&clkc CLKID_VPU>, /* Glitch free mux */
840 <&clkc CLKID_VAPB_0_SEL>,
841 <&clkc CLKID_VAPB_0>,
842 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
843 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
845 <&clkc CLKID_VPU_0>,
846 <&clkc CLKID_FCLK_DIV4>,
848 <&clkc CLKID_VAPB_0>;
860 <&clkc CLKID_SAR_ADC>,
861 <&clkc CLKID_SAR_ADC_CLK>,
862 <&clkc CLKID_SAR_ADC_SEL>;
867 clocks = <&clkc CLKID_SD_EMMC_A>,
868 <&clkc CLKID_SD_EMMC_A_CLK0>,
869 <&clkc CLKID_FCLK_DIV2>;
875 clocks = <&clkc CLKID_SD_EMMC_B>,
876 <&clkc CLKID_SD_EMMC_B_CLK0>,
877 <&clkc CLKID_FCLK_DIV2>;
883 clocks = <&clkc CLKID_SD_EMMC_C>,
884 <&clkc CLKID_SD_EMMC_C_CLK0>,
885 <&clkc CLKID_FCLK_DIV2>;
891 clocks = <&clkc CLKID_HDMI_PCLK>,
892 <&clkc CLKID_CLK81>,
893 <&clkc CLKID_GCLK_VENCI_INT0>;
897 clocks = <&clkc CLKID_SPICC>;
904 clocks = <&clkc CLKID_SPI>;
908 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
923 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
928 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
939 clocks = <&clkc CLKID_DOS_PARSER>,
940 <&clkc CLKID_DOS>,
941 <&clkc CLKID_VDEC_1>,
942 <&clkc CLKID_VDEC_HEVC>;