Lines Matching full:clkc

8 #include <dt-bindings/clock/g12a-clkc.h>
36 			clocks = <&clkc CLKID_HDMI>,
37 				 <&clkc CLKID_HTX_PCLK>,
38 				 <&clkc CLKID_VPU_INTR>;
46 			clocks = <&clkc CLKID_HDMI>,
47 				 <&clkc CLKID_HTX_PCLK>,
48 				 <&clkc CLKID_VPU_INTR>;
55 		clocks = <&clkc CLKID_EFUSE>;
153 			clocks = <&clkc CLKID_PCIE_PHY
154 				  &clkc CLKID_PCIE_COMB
155 				  &clkc CLKID_PCIE_PLL>;
177 			clocks = <&clkc CLKID_ETH>,
178 				 <&clkc CLKID_FCLK_DIV2>,
179 				 <&clkc CLKID_MPLL2>,
180 				 <&clkc CLKID_FCLK_DIV2>;
209 				clocks = <&clkc CLKID_HDMI>,
210 					 <&clkc CLKID_HTX_PCLK>,
211 					 <&clkc CLKID_VPU_INTR>;
218 				assigned-clocks = <&clkc CLKID_HDMI_SEL>,
219 						  <&clkc CLKID_HDMI>;
248 					clocks = <&clkc CLKID_RNG0>;
258 				clocks = <&clkc CLKID_AUDIO_CODEC>;
1553 				clocks = <&clkc CLKID_TS>;
1563 				clocks = <&clkc CLKID_TS>;
1618 					clkc: clock-controller {  label
1619 						compatible = "amlogic,g12a-clkc";
1643 						clocks = <&clkc CLKID_VPU>,
1644 							 <&clkc CLKID_VAPB>;
1652 						assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1653 								  <&clkc CLKID_VPU_0>,
1654 								  <&clkc CLKID_VPU>, /* Glitch free mux */
1655 								  <&clkc CLKID_VAPB_0_SEL>,
1656 								  <&clkc CLKID_VAPB_0>,
1657 								  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1658 						assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1660 									 <&clkc CLKID_VPU_0>,
1661 									 <&clkc CLKID_FCLK_DIV4>,
1663 									 <&clkc CLKID_VAPB_0>;
1677 				clocks = <&clkc CLKID_PCIE_PLL>;
1681 				assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1689 				clocks = <&clkc CLKID_ETH_PHY>,
1691 					 <&clkc CLKID_MPLL_50M>;
1738 					clocks = <&xtal>, <&clkc CLKID_CLK81>;
2082 				clocks = <&clkc CLKID_I2C>;
2126 			clocks = <&clkc CLKID_PARSER>,
2127 				 <&clkc CLKID_DOS>,
2128 				 <&clkc CLKID_VDEC_1>,
2129 				 <&clkc CLKID_VDEC_HEVC>,
2130 				 <&clkc CLKID_VDEC_HEVCF>;
2207 				clocks = <&clkc CLKID_SPICC0>,
2208 					 <&clkc CLKID_SPICC0_SCLK>;
2219 				clocks = <&clkc CLKID_SPICC1>,
2220 					 <&clkc CLKID_SPICC1_SCLK>;
2233 				clocks = <&clkc CLKID_CLK81>;
2264 				clocks = <&clkc CLKID_I2C>;
2274 				clocks = <&clkc CLKID_I2C>;
2284 				clocks = <&clkc CLKID_I2C>;
2294 				clocks = <&clkc CLKID_I2C>;
2307 				clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2317 				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2327 				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2339 			clocks = <&clkc CLKID_SD_EMMC_A>,
2340 				 <&clkc CLKID_SD_EMMC_A_CLK0>,
2341 				 <&clkc CLKID_FCLK_DIV2>;
2351 			clocks = <&clkc CLKID_SD_EMMC_B>,
2352 				 <&clkc CLKID_SD_EMMC_B_CLK0>,
2353 				 <&clkc CLKID_FCLK_DIV2>;
2363 			clocks = <&clkc CLKID_SD_EMMC_C>,
2364 				 <&clkc CLKID_SD_EMMC_C_CLK0>,
2365 				 <&clkc CLKID_FCLK_DIV2>;
2379 			clocks = <&clkc CLKID_USB>;
2392 				clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2421 			clocks = <&clkc CLKID_MALI>;
2507 		clocks = <&clkc CLKID_NNA_CORE_CLK>,
2508 			 <&clkc CLKID_NNA_AXI_CLK>;