Lines Matching full:clkc

7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
119 		clocks = <&clkc CLKID_EFUSE>;
193 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
219 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
237 			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
250 				clocks = <&clkc CLKID_USB1>;
277 			clocks = <&clkc CLKID_ETH>,
278 				 <&clkc CLKID_FCLK_DIV2>,
279 				 <&clkc CLKID_MPLL2>,
280 				 <&clkc CLKID_FCLK_DIV2>;
320 				clocks = <&clkc CLKID_RNG0>;
1219 				clkc: clock-controller {  label
1220 					compatible = "amlogic,axg-clkc";
1237 					clocks = <&clkc CLKID_VPU>,
1238 						 <&clkc CLKID_VAPB>;
1246 					assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1247 							  <&clkc CLKID_VPU_0>,
1248 							  <&clkc CLKID_VPU>, /* Glitch free mux */
1249 							  <&clkc CLKID_VAPB_0_SEL>,
1250 							  <&clkc CLKID_VAPB_0>,
1251 							  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1252 					assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
1254 								 <&clkc CLKID_VPU_0>,
1255 								 <&clkc CLKID_FCLK_DIV4>,
1257 								 <&clkc CLKID_VAPB_0>;
1286 			clocks = <&clkc CLKID_MIPI_DSI_PHY>;
1304 				compatible = "amlogic,axg-audio-clkc";
1308 				clocks = <&clkc CLKID_AUDIO>,
1309 					 <&clkc CLKID_MPLL0>,
1310 					 <&clkc CLKID_MPLL1>,
1311 					 <&clkc CLKID_MPLL2>,
1312 					 <&clkc CLKID_MPLL3>,
1313 					 <&clkc CLKID_HIFI_PLL>,
1314 					 <&clkc CLKID_FCLK_DIV3>,
1315 					 <&clkc CLKID_FCLK_DIV4>,
1316 					 <&clkc CLKID_GP0_PLL>;
1546 					clocks = <&xtal>, <&clkc CLKID_CLK81>;
1695 				clocks = <&clkc CLKID_AO_I2C>;
1734 			clocks = <&clkc CLKID_VAPB>;
1797 				clocks = <&clkc CLKID_SPICC0>;
1808 				clocks = <&clkc CLKID_SPICC1>;
1824 				clocks = <&clkc CLKID_I2C>;
1834 				clocks = <&clkc CLKID_I2C>;
1844 				clocks = <&clkc CLKID_I2C>;
1854 				clocks = <&clkc CLKID_I2C>;
1865 				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
1874 				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
1892 				clocks = <&clkc CLKID_SD_EMMC_B>,
1893 					<&clkc CLKID_SD_EMMC_B_CLK0>,
1894 					<&clkc CLKID_FCLK_DIV2>;
1904 				clocks = <&clkc CLKID_SD_EMMC_C>,
1905 					<&clkc CLKID_SD_EMMC_C_CLK0>,
1906 					<&clkc CLKID_FCLK_DIV2>;
1915 				clocks = <&clkc CLKID_USB>;