| /openbmc/qemu/include/hw/pci-host/ |
| H A D | designware.h | 4 * Designware PCIe IP block emulation
28 #define TYPE_DESIGNWARE_PCIE_ROOT_BUS "designware-pcie-root-BUS"
31 #define TYPE_DESIGNWARE_PCIE_HOST "designware-pcie-host"
34 #define TYPE_DESIGNWARE_PCIE_ROOT "designware-pcie-root"
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| /openbmc/u-boot/doc/ |
| H A D | README.ARC | 1 Synopsys' DesignWare(r) ARC(r) Processors are a family of 32-bit CPUs
12 The DesignWare ARC processors are also extendable, allowing designers to add
18 All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent
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| /openbmc/u-boot/drivers/usb/dwc3/ |
| H A D | Kconfig | 2 bool "DesignWare USB3 DRD Core Support"
6 USB controller based on the DesignWare USB3 IP Core.
48 bool "DesignWare USB3 Host Support on UniPhier Platforms"
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| H A D | linux-compat.h | 3 * linux-compat.h - DesignWare USB3 Linux Compatibiltiy Adapter Header
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| H A D | gadget.h | 3 * gadget.h - DesignWare USB3 DRD Gadget Header
93 * @dwc: DesignWare USB3 Pointer
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| H A D | io.h | 3 * io.h - DesignWare USB3 DRD IO Header
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| /openbmc/u-boot/drivers/usb/host/ |
| H A D | Kconfig | 19 bool "DesignWare USB3 DRD Core Support"
22 USB controller based on the DesignWare USB3 IP Core.
25 bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
30 USB controller based on the DesignWare USB3 IP Core.
263 bool "DesignWare USB2 Core support"
266 The DesignWare USB 2.0 controller is compliant with the
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| /openbmc/u-boot/drivers/usb/gadget/ |
| H A D | Kconfig | 91 bool "DesignWare USB2.0 HS OTG controller (gadget mode)"
94 The Designware USB2.0 high-speed gadget controller
102 bool "DesignWare USB2.0 HS OTG controller 8-bit PHY bus width"
104 Set the Designware USB2.0 high-speed OTG controller
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| /openbmc/qemu/docs/system/arm/ |
| H A D | imx8mp-evk.rst | 16 * 1 Designware PCI Express Controller
18 * 2 Designware USB 3 Controllers
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| /openbmc/u-boot/drivers/video/rockchip/ |
| H A D | rk_hdmi.h | 67 * 2. initialises the Designware HDMI core
68 * 3. initialises the Designware HDMI PHY
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| /openbmc/u-boot/doc/device-tree-bindings/pci/ |
| H A D | armada8k-pcie.txt | 4 Armada-8k uses synopsis designware PCIe controller.
15 "Documentation/devicetree/bindings/pci/designware-pcie.txt"
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| /openbmc/u-boot/arch/arc/ |
| H A D | Kconfig | 152 bool "Support Synopsys Designware SDP board AXS101"
156 bool "Support Synopsys Designware SDP board AXS103"
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | socfpga_stratix10.dtsi | 171 compatible = "snps,designware-i2c";
182 compatible = "snps,designware-i2c";
193 compatible = "snps,designware-i2c";
204 compatible = "snps,designware-i2c";
215 compatible = "snps,designware-i2c";
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| /openbmc/u-boot/drivers/net/ |
| H A D | Kconfig | 98 This driver supports the Synopsys Designware Ethernet QOS (Quality
157 bool "Synopsys Designware Ethernet MAC"
168 bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC"
406 bool "Rockchip Synopsys Designware Ethernet MAC"
410 Synopsys Designware driver.
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| /openbmc/qemu/hw/pci-host/ |
| H A D | designware.c | 4 * Designware PCIe IP block emulation
32 #include "hw/pci-host/designware.h"
64 * Designware has only a single root complex. Enforce the limit on the in designware_pcie_root_bus_class_init()
527 .name = "designware-pcie-msi-bank",
539 .name = "designware-pcie-msi",
555 .name = "designware-pcie-viewport",
568 .name = "designware-pcie-root",
718 .name = "designware-pcie-host",
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| /openbmc/u-boot/drivers/pci/ |
| H A D | Kconfig | 63 bool "Enable Armada-8K PCIe driver (DesignWare core)"
69 DesignWare hardware.
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| /openbmc/u-boot/include/linux/usb/ |
| H A D | dwc3-omap.h | 6 * Designware SuperSpeed Glue
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| /openbmc/u-boot/drivers/mmc/ |
| H A D | Kconfig | 180 bool "Synopsys DesignWare Memory Card Interface"
183 This selects support for the Synopsys DesignWare Mobile Storage IP
194 Synopsys DesignWare Memory Card Interface driver. Select this option
202 Synopsys DesignWare Memory Card Interface driver. Select this option
211 based on Designware IP. The device is compatible with at least
222 Synopsys DesignWare Memory Card Interface driver. Select this option
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| /openbmc/u-boot/include/usb/ |
| H A D | dwc2_udc.h | 4 * Designware DWC2 on-chip full/high speed USB device controllers
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| /openbmc/u-boot/include/ |
| H A D | dwc3-omap-uboot.h | 6 * Designware SuperSpeed OMAP Glue uboot init
|
| H A D | dwc3-uboot.h | 6 * Designware SuperSpeed USB uboot init
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| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | sys_proto.h | 25 /* Board / SoC level designware gmac init */
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| /openbmc/u-boot/drivers/timer/ |
| H A D | Kconfig | 100 bool "Designware APB Timer"
103 Enables support for the Designware APB Timer driver. This timer is
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| /openbmc/qemu/include/hw/i3c/ |
| H A D | dw-i3c.h | 2 * DesignWare I3C Controller
198 /* Extern for other controllers that use DesignWare I3C. */
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| /openbmc/u-boot/drivers/spi/ |
| H A D | Kconfig | 106 bool "Designware SPI driver"
108 Enable the Designware SPI driver. This driver can be used to
109 access the SPI NOR flash on platforms embedding this Designware
|