Revision tags: v00.04.15 |
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4c8f336c |
| 02-May-2023 |
Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> |
spi: aspeed: Add flash write-protect by host ctrl APIs
Add APIs for command filter and address filter, by which the access permission of the SPI flash regions can be controller by configuring SPI co
spi: aspeed: Add flash write-protect by host ctrl APIs
Add APIs for command filter and address filter, by which the access permission of the SPI flash regions can be controller by configuring SPI controller registers. Notice, this method cannot avoid physical flash access from the external HW path.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Change-Id: I9516064ba677b99a6ff7de5b938ba57325049355
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Revision tags: v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00 |
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9da3b6f0 |
| 13-Jun-2019 |
Johnny Huang <johnny_huang@aspeedtech.com> |
Merge branch 'aspeed-dev-v2019.04' into aspeed-master-v2019.04
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5a5499fb |
| 30-May-2019 |
ryan_chen <ryan_chen@aspeedtech.com> |
Merge branch 'ryan_port' into aspeed-dev-v2019.04
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499853d6 |
| 29-May-2019 |
ryan_chen <ryan_chen@aspeedtech.com> |
add fmc/spi driver
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Revision tags: v2019.04 |
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f18b7b27 |
| 06-Mar-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
- dw spi include file fix - Allwinner A31 spi, been in ML in many releases.
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a51cd54e |
| 27-Feb-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Rename sun4i_spi.c into spi-sunxi.c
Now the same SPI controller driver is reusable in all Allwinner SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c which eventually look like
spi: Rename sun4i_spi.c into spi-sunxi.c
Now the same SPI controller driver is reusable in all Allwinner SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c which eventually look like a common sunxi driver.
Also update the function, variable, structure names in driver from sun4i into sunxi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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853f4511 |
| 27-Feb-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: sun4: Add A31 spi controller support
The usual SPI transmission protocol in Allwinner A10 and A31 controllers share similar context with minimal changes in register offsets along with few addit
spi: sun4: Add A31 spi controller support
The usual SPI transmission protocol in Allwinner A10 and A31 controllers share similar context with minimal changes in register offsets along with few additional register bits on A31.
So, add A31 spi controller support in existing sun4i_spi with A31 specific register offsets and bits.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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50e24381 |
| 07-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
- SPI-NOR support
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6d825178 |
| 04-Feb-2019 |
Vignesh R <vigneshr@ti.com> |
configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing
configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality.
Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
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6430eea6 |
| 04-Feb-2019 |
Vignesh R <vigneshr@ti.com> |
spi: Add non DM version of SPI_MEM
Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete.
Signed-off-by: Vignesh R
spi: Add non DM version of SPI_MEM
Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete.
Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
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f83ef0da |
| 17-Jan-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips
- MIPS: mscc: various enhancements for Luton and Ocelot platforms - MIPS: mscc: added support for Jaguar2 platform - MIPS: optimised
Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips
- MIPS: mscc: various enhancements for Luton and Ocelot platforms - MIPS: mscc: added support for Jaguar2 platform - MIPS: optimised SPL linker script - MIPS: bcm6368: fix restart flow issues - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards - MIPS: mt7688: small fixes and enhancements - mmc: compile-out write support if disabled
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fd6e0b05 |
| 08-Jan-2019 |
Lars Povlsen <lars.povlsen@microchip.com> |
mips: spi: mscc: Add fast bitbang SPI driver
This patch add a new SPI driver for MSCC SOCs that does not sport the designware SPI hardware controller.
Performance gain: 7.664 seconds vs. 17.633 for
mips: spi: mscc: Add fast bitbang SPI driver
This patch add a new SPI driver for MSCC SOCs that does not sport the designware SPI hardware controller.
Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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9450ab2b |
| 05-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel
Signed-off-by: Tom Rini <trini@konsulko.co
Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel
Signed-off-by: Tom Rini <trini@konsulko.com>
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f34d0315 |
| 21-Nov-2018 |
Christophe Leroy <christophe.leroy@c-s.fr> |
spi: mpc8xx: Migrate to DM_SPI
Drop non-dm code and migrate into DM_SPI.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> [jagan: Move config menu in DM_SPI area] Signed-off-by: Jagan Teki
spi: mpc8xx: Migrate to DM_SPI
Drop non-dm code and migrate into DM_SPI.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> [jagan: Move config menu in DM_SPI area] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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052cafd2 |
| 12-Oct-2018 |
Guochun Mao <guochun.mao@mediatek.com> |
spi: mtk_qspi: add qspi driver for MT7629 SoC
This patch adds MT7629 qspi driver for accessing SPI NOR flash.
Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Reviewed-by: Simon Glass <sjg@chr
spi: mtk_qspi: add qspi driver for MT7629 SoC
This patch adds MT7629 qspi driver for accessing SPI NOR flash.
Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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9d26506a |
| 22-Nov-2018 |
Neil Armstrong <narmstrong@baylibre.com> |
spi: Add Amlogic Meson SPI Flash Controller driver
The Amlogic Meson SoCs embeds a Flash oriented SPI Controller name SPIFC. This driver, ported from the Linux meson-spi-spifc driver, add support fo
spi: Add Amlogic Meson SPI Flash Controller driver
The Amlogic Meson SoCs embeds a Flash oriented SPI Controller name SPIFC. This driver, ported from the Linux meson-spi-spifc driver, add support for this controller on the Amlogic Meson GX SoCs in U-Boot.
Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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d0423c44 |
| 16-Oct-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.11-rc2-v2
FPGA: - Fix SPL fpga loading from FIT
ARM64: - Fix gic accesses in EL2/EL1
Xilinx: - Add dlc20 board support - Add Ver
Merge git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.11-rc2-v2
FPGA: - Fix SPL fpga loading from FIT
ARM64: - Fix gic accesses in EL2/EL1
Xilinx: - Add dlc20 board support - Add Versal board support - Sync defconfigs - Enable MP via Kconfig - Add missing efuse node - Enable CDC for zcu100
cmd: - Fix kgdb Kconfig dependency
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ec48b6c9 |
| 22-Aug-2018 |
Michal Simek <michal.simek@xilinx.com> |
arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Sc
arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency.
The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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ad8c9f61 |
| 04-Oct-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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5eee9dee |
| 16-Aug-2018 |
Stefan Roese <sr@denx.de> |
spi: Add SPI driver for MT76xx SoCs
This patch adds the SPI driver for the MediaTek MT7688 SoC (and derivates). Its been tested on the LinkIt Smart 7688 and the Gardena Smart Gateway with and SPI NO
spi: Add SPI driver for MT76xx SoCs
This patch adds the SPI driver for the MediaTek MT7688 SoC (and derivates). Its been tested on the LinkIt Smart 7688 and the Gardena Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart Gateway additionally with an SPI NAND on CS1.
Note that the SPI controller only supports a max transfer size of 32 bytes. This driver implementes a workaround to enable bigger xfer sizes to speed up the transfer especially for the SPI NAND support.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Piotr Dymacz <pepe2k@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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592cd5de |
| 02-Oct-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.
[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig] Signed-off-by: Tom Rin
Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.
[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
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8a4791fa |
| 31-Aug-2018 |
Quentin Schulz <quentin.schulz@bootlin.com> |
spi: add support for ARM PL022 SPI controller
This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO.
A few
spi: add support for ARM PL022 SPI controller
This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO.
A few parts were borrowed from the Linux kernel driver.
Cc: Armando Visconti <armando.visconti@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
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d13f5b25 |
| 16-Aug-2018 |
Boris Brezillon <boris.brezillon@bootlin.com> |
spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the cu
spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general.
This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs).
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
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bb694d4e |
| 04-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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Revision tags: v2018.07, v2018.03 |
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7f25d817 |
| 06-Feb-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
arm: sunxi: Allwinner A10 SPI driver
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Reviewed-by: Jaga
arm: sunxi: Allwinner A10 SPI driver
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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