History log of /openbmc/u-boot/drivers/net/Kconfig (Results 1 – 25 of 123)
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# b78a9e22 18-Feb-2019 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga

- Misc Gen5 fixes
- stratix10 bugfix
- dwmmc bugfix


# 6fb1eb1b 13-Jan-2019 Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

arm: socfpga: gen5 enable designware_socfpga

Enable the socfpga specific designware ethernet driver by default for
socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a
MACH_SOCFPGA confi

arm: socfpga: gen5 enable designware_socfpga

Enable the socfpga specific designware ethernet driver by default for
socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a
MACH_SOCFPGA config.

This is required to remove the hacky reset and phy mode handling in
arch/arm/mach-socfpga.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

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# 4f1267ce 13-Jan-2019 Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

net: designware: socfpga: adapt to Gen5

This driver was written for Arria10, but it applies to Gen5, too.

The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
syscon bits are encoded

net: designware: socfpga: adapt to Gen5

This driver was written for Arria10, but it applies to Gen5, too.

The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
syscon bits are encoded in the same register, thus an offset is needed.

This offset is already read from the devicetree, but for Arria10 it is
always 0, which is probably why it has been ignored. By using this
offset when writing the phy mode into the syscon regiter, we can use
this driver to set the phy mode for both of the MACs on Gen5.

Since the PHY mode bits in sysmgr are the same even for Stratix10,
let's drop the detection of the sub-mach by checking compatible
version and just use the same code for all FPGAs.

To work correctly, this driver depends on SYSCON and REGMAP, so select
those via Kconfig when it is enabeld.

Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift
offset is required).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

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# 544d5e98 02-Feb-2019 Tom Rini <trini@konsulko.com>

Merge tag 'mips-pull-2019-02-01' of git://git.denx.de/u-boot-mips

- MIPS: mscc: jr2: small fixes
- MIPS: mscc: luton: add ethernet and switch driver
- MIPS: mt76xx: fix timer frequency


# 4c66157f 31-Jan-2019 Horatiu Vultur <horatiu.vultur@microchip.com>

net: mscc: Move ocelot_switch to mscc_eswitch folder

Move file ocelot_switch to mscc_eswitch to prepare to add
new net drivers for other MSCC SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@mic

net: mscc: Move ocelot_switch to mscc_eswitch folder

Move file ocelot_switch to mscc_eswitch to prepare to add
new net drivers for other MSCC SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>

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# aff66f22 23-Jan-2019 Tom Rini <trini@konsulko.com>

Merge tag 'mips-pull-2019-01-23' of git://git.denx.de/u-boot-mips

- MIPS: mscc: ocelot: add ethernet switch and network support
- MIPS: mscc: add support for ServalT SoC family
- MIPS: mscc: add sup

Merge tag 'mips-pull-2019-01-23' of git://git.denx.de/u-boot-mips

- MIPS: mscc: ocelot: add ethernet switch and network support
- MIPS: mscc: add support for ServalT SoC family
- MIPS: mscc: add support for Serval SoC family

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# c8546163 17-Jan-2019 Gregory CLEMENT <gregory.clement@bootlin.com>

net: add MSCC Ocelot switch support

This patch adds support for the Microsemi Ethernet switch present on
Ocelot SoCs.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Danie

net: add MSCC Ocelot switch support

This patch adds support for the Microsemi Ethernet switch present on
Ocelot SoCs.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

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# e807f6b5 15-Jan-2019 Tom Rini <trini@konsulko.com>

Merge branch '2019-01-14-master-imports'

- MediaTek improvements (eth support)
- DM conversion for HI6220
- ISEE, Toby Churchill, other platform updates
- Various format code printf fixes
- Build ra

Merge branch '2019-01-14-master-imports'

- MediaTek improvements (eth support)
- DM conversion for HI6220
- ISEE, Toby Churchill, other platform updates
- Various format code printf fixes
- Build race fixes
- Command repeat functionality enhanced, command autocomplete support
enhanced.

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# 23f17164 20-Dec-2018 Weijie Gao <weijie.gao@mediatek.com>

ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs

This patch adds ethernet support for Mediatek ARM-based SoCs, including
a minimum setup of the integrated switch.

Cc: Joe Hershbe

ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs

This patch adds ethernet support for Mediatek ARM-based SoCs, including
a minimum setup of the integrated switch.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mark Lee <Mark-MC.Lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-By: "Frank Wunderlich" <frank-w@public-files.de>

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# fd0135e3 21-Dec-2018 Tom Rini <trini@konsulko.com>

Merge tag 'mips-updates-for-2019.11' of git://git.denx.de/u-boot-mips

- mips: fix some DTC warnings
- bmips: bcm6348: add DMA driver
- bmips: bcm5348: add ethernet driver
- bmips: bcm6368: add ether

Merge tag 'mips-updates-for-2019.11' of git://git.denx.de/u-boot-mips

- mips: fix some DTC warnings
- bmips: bcm6348: add DMA driver
- bmips: bcm5348: add ethernet driver
- bmips: bcm6368: add ethernet driver
- mips: mt76xx: fix DMA problems, disable CONFIG_OF_EMBED
- mips: mscc: add support for Microsemi Ocelot and Luton SoCs
- mips: mscc: add support for Ocelot and Luton evaluation boards
- mips: jz47xx: add basic support for Ingenic JZ4780 SoC
- mips: jz47xx: add support for Imgtec Creator CI20 board

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# 9622972a 01-Dec-2018 Álvaro Fernández Rojas <noltari@gmail.com>

net: add support for bcm6368-enet

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>


# 55e55fe4 01-Dec-2018 Álvaro Fernández Rojas <noltari@gmail.com>

net: add support for bcm6348-enet

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>


# 208ecbad 14-Nov-2018 Tom Rini <trini@konsulko.com>

Merge branch 'next'

This brings in the u-boot-net PR from Joe.


# 9e2a9028 05-Nov-2018 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-net into next

- ftgmac100 improvements
- TI: CPSW improvements
- VSC8584 PHY support
- Add MT7628 ethernet driver


# ffad5fa0 31-Oct-2018 Grygorii Strashko <grygorii.strashko@ti.com>

driver: net: consolidate ti's code in separate folder

Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.

Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: J

driver: net: consolidate ti's code in separate folder

Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.

Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>

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# f95de0bd 29-Oct-2018 Cédric Le Goater <clg@kaod.org>

net: ftgmac100: convert to driver model

The driver is based on the previous one and the code is only adapted
to fit the driver model. The support for the Faraday ftgmac100
controller is the same wit

net: ftgmac100: convert to driver model

The driver is based on the previous one and the code is only adapted
to fit the driver model. The support for the Faraday ftgmac100
controller is the same with MAC and MDIO bus support for RGMII/RMII
modes.

Configuration is updated to enable compile again. At this stage, the
driver compiles but is not yet functional.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# c895ef46 26-Oct-2018 Stefan Roese <sr@denx.de>

net: Add MT7628 ethernet driver

This patch adds ethernet support for the MIPS based Mediatek MT76xx SoCs
(e.g. MT7628 and MT7688), including a minimum setup of the integrated
switch. This driver is

net: Add MT7628 ethernet driver

This patch adds ethernet support for the MIPS based Mediatek MT76xx SoCs
(e.g. MT7628 and MT7688), including a minimum setup of the integrated
switch. This driver is loosly based on the driver version included in
this MediaTek github repository:

https://github.com/MediaTek-Labs/linkit-smart-uboot.git

Tested on the MT7688 LinkIt smart-gateway and on the
Gardena-smart-gateway.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Frank Wunderlich <frankwu@gmx.de>
Cc: Weijie Gao <hackpascal@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# f749b618 25-Oct-2018 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-net


# 58ec4d33 18-Oct-2018 Anatolij Gustschin <agust@denx.de>

net: fec_mxc: add support for i.MX8X

Add compatible property and enable the FEC ipg clock when probing
on i.MX8X. Add specific function for reading FEC clock rate via
clock driver when configuring M

net: fec_mxc: add support for i.MX8X

Add compatible property and enable the FEC ipg clock when probing
on i.MX8X. Add specific function for reading FEC clock rate via
clock driver when configuring MII speed register. Allow FEC_MXC
selection for i.MX8.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# d0423c44 16-Oct-2018 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.11-rc2-v2

FPGA:
- Fix SPL fpga loading from FIT

ARM64:
- Fix gic accesses in EL2/EL1

Xilinx:
- Add dlc20 board support
- Add Ver

Merge git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.11-rc2-v2

FPGA:
- Fix SPL fpga loading from FIT

ARM64:
- Fix gic accesses in EL2/EL1

Xilinx:
- Add dlc20 board support
- Add Versal board support
- Sync defconfigs
- Enable MP via Kconfig
- Add missing efuse node
- Enable CDC for zcu100

cmd:
- Fix kgdb Kconfig dependency

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# ec48b6c9 22-Aug-2018 Michal Simek <michal.simek@xilinx.com>

arm64: versal: Add support for new Xilinx Versal ACAPs

Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Sc

arm64: versal: Add support for new Xilinx Versal ACAPs

Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency.

The patch is adding necessary infrastructure in place without enabling
platform which is done in separate patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# d7869b21 20-Jul-2018 Adam Ford <aford173@gmail.com>

Convert CONFIG_MII et al to Kconfig

This converts the following to Kconfig:
CONFIG_MII
CONFIG_DRIVER_TI_EMAC

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Jagan Teki <jagan@amarulas

Convert CONFIG_MII et al to Kconfig

This converts the following to Kconfig:
CONFIG_MII
CONFIG_DRIVER_TI_EMAC

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# 719afeb0 17-Aug-2018 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga


# 215a0656 13-Aug-2018 Marek Vasut <marex@denx.de>

net: designware: socfpga: Add Arria10 extras

Add wrapper around the designware MAC driver to handle the SoCFPGA
specific configuration bits. On Arria10, this is configuration of
syscon phy_intf.

Si

net: designware: socfpga: Add Arria10 extras

Add wrapper around the designware MAC driver to handle the SoCFPGA
specific configuration bits. On Arria10, this is configuration of
syscon phy_intf.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>

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# a57d45db 26-Jul-2018 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-net


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