xref: /openbmc/u-boot/drivers/usb/dwc3/Kconfig (revision 48d299a799f8e60342f10309dc3d4eb8e4b453a1)
1 config USB_DWC3
2 	bool "DesignWare USB3 DRD Core Support"
3 	depends on USB_HOST || USB_GADGET
4 	help
5 	  Say Y here if your system has a Dual Role SuperSpeed
6 	  USB controller based on the DesignWare USB3 IP Core.
7 
8 if USB_DWC3
9 
10 choice
11 	bool "DWC3 Mode Selection"
12 
13 config USB_DWC3_HOST
14 	bool "Host only mode"
15 	depends on USB
16 	help
17 	  Select this when you want to use DWC3 in host mode only,
18 	  thereby the gadget feature will be regressed.
19 
20 config USB_DWC3_GADGET
21 	bool "Gadget only mode"
22 	depends on USB_GADGET
23 	select USB_GADGET_DUALSPEED
24 	help
25 	  Select this when you want to use DWC3 in gadget mode only,
26 	  thereby the host feature will be regressed.
27 
28 endchoice
29 
30 comment "Platform Glue Driver Support"
31 
32 config USB_DWC3_OMAP
33 	bool "Texas Instruments OMAP5 and similar Platforms"
34 	help
35 	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
36 	  AM437x use this IP for USB2/3 functionality.
37 
38 	  Say 'Y' here if you have one such device
39 
40 config USB_DWC3_GENERIC
41 	bool "Generic implementation of a DWC3 wrapper (aka dwc3 glue)"
42 	depends on DM_USB && USB_DWC3 && MISC
43 	help
44 	  Select this for Xilinx ZynqMP and similar Platforms.
45 	  This wrapper supports Host and Peripheral operation modes.
46 
47 config USB_DWC3_UNIPHIER
48 	bool "DesignWare USB3 Host Support on UniPhier Platforms"
49 	depends on ARCH_UNIPHIER && USB_XHCI_DWC3
50 	help
51 	  Support of USB2/3 functionality in Socionext UniPhier platforms.
52 	  Say 'Y' here if you have one such device.
53 
54 menu "PHY Subsystem"
55 
56 config USB_DWC3_PHY_OMAP
57 	bool "TI OMAP SoC series USB DRD PHY driver"
58 	help
59 	  Enable single driver for both USB2 PHY programming and USB3 PHY
60 	  programming for TI SoCs.
61 
62 config USB_DWC3_PHY_SAMSUNG
63 	bool "Exynos5 SoC series USB DRD PHY driver"
64 	help
65 	  Enable USB DRD PHY support for Exynos 5 SoC series.
66 	  This driver provides PHY interface for USB 3.0 DRD controller
67 	  present on Exynos5 SoC series.
68 
69 endmenu
70 
71 endif
72