| /openbmc/u-boot/board/freescale/ls2080a/ |
| H A D | ddr.h | 28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
40 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
51 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
64 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
|
| /openbmc/u-boot/board/freescale/ls2080aqds/ |
| H A D | ddr.h | 28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
42 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
55 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
69 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
|
| /openbmc/u-boot/board/freescale/ls2080ardb/ |
| H A D | ddr.h | 28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
42 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
55 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
|
| /openbmc/u-boot/board/freescale/ls1046ardb/ |
| H A D | ddr.h | 30 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
47 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
|
| /openbmc/u-boot/board/freescale/t208xqds/ |
| H A D | ddr.h | 28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 |
48 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 |
|
| /openbmc/qemu/include/hw/i2c/ |
| H A D | npcm7xx_smbus.h | 53 * @ctl3: The control register 3.
86 uint8_t ctl3; member
|
| /openbmc/u-boot/board/freescale/t4rdb/ |
| H A D | ddr.h | 27 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
46 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
|
| /openbmc/qemu/tests/qtest/ |
| H A D | npcm7xx_smbus-test.c | 122 /* CTL3 fields */
163 uint8_t ctl3 = qtest_readb(qts, base_addr + OFFSET_CTL3); in choose_bank() local
166 ctl3 |= CTL3_BNK_SEL; in choose_bank()
168 ctl3 &= ~CTL3_BNK_SEL; in choose_bank()
171 qtest_writeb(qts, base_addr + OFFSET_CTL3, ctl3); in choose_bank()
|
| /openbmc/qemu/hw/i2c/ |
| H A D | npcm7xx_smbus.c | 119 /* CTL3 fields */
585 uint8_t old_ctl3 = s->ctl3; in npcm7xx_smbus_write_ctl3()
588 s->ctl3 = KEEP_OLD_BIT(old_ctl3, value, in npcm7xx_smbus_write_ctl3()
660 uint8_t bank = s->ctl3 & NPCM7XX_SMBCTL3_BNK_SEL; in npcm7xx_smbus_read()
693 value = s->ctl3; in npcm7xx_smbus_read()
821 uint8_t bank = s->ctl3 & NPCM7XX_SMBCTL3_BNK_SEL; in npcm7xx_smbus_write()
1001 s->ctl3 = NPCM7XX_SMB_CTL3_INIT_VAL; in npcm7xx_smbus_enter_reset()
1057 VMSTATE_UINT8(ctl3, NPCM7xxSMBusState),
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| /openbmc/u-boot/board/freescale/t4qds/ |
| H A D | ddr.h | 31 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay |
50 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay |
|
| /openbmc/u-boot/arch/arm/mach-keystone/include/mach/ |
| H A D | xhci-keystone.h | 17 unsigned int phy_param_ctrl_2; /* ctl3 */
|
| /openbmc/linux/drivers/dma/ |
| H A D | pch_dma.c | 228 val = dma_readl(pd, CTL3); in pdc_set_dir()
242 dma_writel(pd, CTL3, val); in pdc_set_dir()
272 val = dma_readl(pd, CTL3); in pdc_set_mode()
276 dma_writel(pd, CTL3, val); in pdc_set_mode()
747 pd->regs.dma_ctl3 = dma_readl(pd, CTL3); in pch_dma_save_regs()
770 dma_writel(pd, CTL3, pd->regs.dma_ctl3); in pch_dma_restore_regs()
|
| /openbmc/u-boot/board/freescale/ls1046aqds/ |
| H A D | ddr.h | 30 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 |
|
| /openbmc/u-boot/board/freescale/ls1088a/ |
| H A D | ddr.h | 28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
|
| /openbmc/u-boot/board/freescale/t208xrdb/ |
| H A D | ddr.h | 28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 |
|
| /openbmc/u-boot/board/freescale/t1040qds/ |
| H A D | ddr.h | 28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 |
|
| /openbmc/linux/drivers/hwmon/ |
| H A D | lm93.c | 1958 u8 ctl3, ctl4; in pwm_auto_spinup_min_show() local
1960 ctl3 = data->block9[nr][LM93_PWM_CTL3]; in pwm_auto_spinup_min_show()
1963 LM93_PWM_FROM_REG(ctl3 & 0x0f, (ctl4 & 0x07) ? in pwm_auto_spinup_min_show()
1974 u8 ctl3, ctl4; in pwm_auto_spinup_min_store() local
1983 ctl3 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3)); in pwm_auto_spinup_min_store()
1985 ctl3 = (ctl3 & 0xf0) | LM93_PWM_TO_REG(val, (ctl4 & 0x07) ? in pwm_auto_spinup_min_store()
1988 data->block9[nr][LM93_PWM_CTL3] = ctl3; in pwm_auto_spinup_min_store()
1989 lm93_write_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3), ctl3); in pwm_auto_spinup_min_store()
2014 u8 ctl3; in pwm_auto_spinup_time_store() local
2023 ctl3 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3)); in pwm_auto_spinup_time_store()
[all …]
|
| /openbmc/u-boot/board/freescale/ls1043aqds/ |
| H A D | ddr.h | 33 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay |
|
| /openbmc/u-boot/board/freescale/ls1021aqds/ |
| H A D | ddr.h | 33 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay |
|
| /openbmc/u-boot/board/freescale/ls1043ardb/ |
| H A D | ddr.h | 33 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay |
|
| /openbmc/linux/drivers/net/wireless/ath/ath9k/ |
| H A D | ar9003_mac.h | 75 u32 ctl3; /* DMA control 3 */ member
|
| H A D | mac.h | 284 u32 ctl3; member
322 #define ds_ctl3 u.tx.ctl3
|
| /openbmc/linux/Documentation/devicetree/bindings/display/ |
| H A D | lvds.yaml | 80 CTL3: 0
|
| /openbmc/u-boot/board/freescale/t102xqds/ |
| H A D | ddr.c | 34 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 |
|
| /openbmc/u-boot/board/freescale/t102xrdb/ |
| H A D | ddr.c | 34 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 |
|