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12

/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dallwinner,sun8i-a33-ths.yaml24 maxItems: 1
36 ths: ths@1c25000 {
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dallwinner,sun4i-a10-ts.yaml24 maxItems: 1
27 maxItems: 1
45 default: 1
51 1: 5/3
65 rtp: rtp@1c25000 {
/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dallwinner,sun8i-a83t-ths.yaml25 minItems: 1
31 minItems: 1
37 maxItems: 1
40 maxItems: 1
43 maxItems: 1
46 maxItems: 1
56 - 1
70 maxItems: 1
73 maxItems: 1
97 const: 1
[all …]
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5.dtsi10 #address-cells = <1>;
23 cpu1: cpu@1 {
26 reg = <1>;
82 syscon: system-control@1c00000 {
85 #address-cells = <1>;
86 #size-cells = <1>;
92 #address-cells = <1>;
93 #size-cells = <1>;
104 video-codec@1c0e000 {
112 allwinner,sram = <&ve_sram 1>;
[all …]
H A Dsun50i-a64.dtsi18 #address-cells = <1>;
19 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
46 #address-cells = <1>;
60 cpu1: cpu@1 {
63 reg = <1>;
152 #address-cells = <1>;
246 thermal-sensors = <&ths 1>;
259 #address-cells = <1>;
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsuniv-f1c100s.dtsi11 #address-cells = <1>;
12 #size-cells = <1>;
32 #address-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <1>;
48 sram-controller@1c00000 {
52 #address-cells = <1>;
53 #size-cells = <1>;
59 #address-cells = <1>;
60 #size-cells = <1>;
[all …]
H A Dsun8i-h3.dtsi71 #address-cells = <1>;
84 cpu1: cpu@1 {
87 reg = <1>;
166 syscon: system-control@1c00000 {
169 #address-cells = <1>;
170 #size-cells = <1>;
173 sram_c: sram@1d00000 {
176 #address-cells = <1>;
177 #size-cells = <1>;
188 video-codec@1c0e000 {
[all …]
H A Dsun8i-a33.dtsi134 cpu1: cpu@1 {
206 video-codec@1c0e000 {
214 allwinner,sram = <&ve_sram 1>;
217 crypto: crypto-engine@1c15000 {
227 dai: dai@1c22c00 {
240 codec: codec@1c22e00 {
241 #sound-dai-cells = <1>;
250 ths: ths@1c25000 {
257 dsi: dsi@1ca0000 {
268 #address-cells = <1>;
[all …]
H A Dsun5i.dtsi51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
67 #address-cells = <1>;
68 #size-cells = <1>;
92 #address-cells = <1>;
93 #size-cells = <1>;
112 #address-cells = <1>;
113 #size-cells = <1>;
128 #address-cells = <1>;
[all …]
H A Dsun4i-a10.dtsi50 #address-cells = <1>;
51 #size-cells = <1>;
59 #address-cells = <1>;
60 #size-cells = <1>;
110 #address-cells = <1>;
161 #address-cells = <1>;
162 #size-cells = <1>;
192 #address-cells = <1>;
193 #size-cells = <1>;
208 #address-cells = <1>;
[all …]
H A Dsun6i-a31.dtsi54 #address-cells = <1>;
55 #size-cells = <1>;
62 #address-cells = <1>;
63 #size-cells = <1>;
100 #address-cells = <1>;
118 cpu1: cpu@1 {
121 reg = <1>;
208 #address-cells = <1>;
209 #size-cells = <1>;
251 gmac_tx_clk: clk@1c200d0 {
[all …]
H A Dsun7i-a20.dtsi54 #address-cells = <1>;
55 #size-cells = <1>;
62 #address-cells = <1>;
63 #size-cells = <1>;
100 #address-cells = <1>;
121 cpu1: cpu@1 {
124 reg = <1>;
174 #address-cells = <1>;
175 #size-cells = <1>;
203 #address-cells = <1>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsun8i-a33.dtsi134 cpu@1 {
206 soc@1c00000 {
207 tcon0: lcd-controller@1c0c000 {
221 #address-cells = <1>;
225 #address-cells = <1>;
235 tcon0_out: port@1 {
236 #address-cells = <1>;
238 reg = <1>;
240 tcon0_out_dsi: endpoint@1 {
241 reg = <1>;
[all …]
H A Dsun5i.dtsi55 #address-cells = <1>;
67 #address-cells = <1>;
68 #size-cells = <1>;
80 framebuffer@1 {
92 #address-cells = <1>;
93 #size-cells = <1>;
96 osc24M: clk@1c20050 {
111 soc@1c00000 {
113 #address-cells = <1>;
114 #size-cells = <1>;
[all …]
H A Dsun4i-a10.dtsi50 #address-cells = <1>;
51 #size-cells = <1>;
59 #address-cells = <1>;
60 #size-cells = <1>;
110 #address-cells = <1>;
162 #address-cells = <1>;
163 #size-cells = <1>;
189 #address-cells = <1>;
190 #size-cells = <1>;
193 sram-controller@1c00000 {
[all …]
H A Dsun7i-a20.dtsi61 #address-cells = <1>;
62 #size-cells = <1>;
76 framebuffer@1 {
99 #address-cells = <1>;
121 cpu@1 {
124 reg = <1>;
179 #address-cells = <1>;
180 #size-cells = <1>;
183 osc24M: clk@1c20050 {
206 mii_phy_tx_clk: clk@1 {
[all …]
H A Dsun6i-a31.dtsi61 #address-cells = <1>;
62 #size-cells = <1>;
76 simplefb_lcd: framebuffer@1 {
99 #address-cells = <1>;
118 cpu@1 {
121 reg = <1>;
182 #address-cells = <1>;
183 #size-cells = <1>;
208 mii_phy_tx_clk: clk@1 {
222 gmac_tx_clk: clk@1c200d0 {
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi108 qcom,freq-domain = <&cpufreq_hw 1>;
129 qcom,freq-domain = <&cpufreq_hw 1>;
144 qcom,freq-domain = <&cpufreq_hw 1>;
159 qcom,freq-domain = <&cpufreq_hw 1>;
471 #clock-cells = <1>;
472 #reset-cells = <1>;
473 #power-domain-cells = <1>;
516 #address-cells = <1>;
537 #address-cells = <1>;
558 #address-cells = <1>;
[all …]
H A Dsm6350.dtsi206 clocks = <&cpufreq_hw 1>;
211 qcom,freq-domain = <&cpufreq_hw 1>;
231 clocks = <&cpufreq_hw 1>;
236 qcom,freq-domain = <&cpufreq_hw 1>;
297 CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
327 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
337 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
347 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
362 #reset-cells = <1>;
709 #qcom,smem-state-cells = <1>;
[all …]
H A Dsm8350.dtsi137 clocks = <&cpufreq_hw 1>;
140 qcom,freq-domain = <&cpufreq_hw 1>;
156 clocks = <&cpufreq_hw 1>;
159 qcom,freq-domain = <&cpufreq_hw 1>;
175 clocks = <&cpufreq_hw 1>;
178 qcom,freq-domain = <&cpufreq_hw 1>;
258 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
278 CLUSTER_SLEEP_AOSS_SLEEP: cluster-sleep-1 {
291 #reset-cells = <1>;
505 qcom,client-id = <1>;
[all …]
H A Dsc8180x.dtsi152 qcom,freq-domain = <&cpufreq_hw 1>;
159 clocks = <&cpufreq_hw 1>;
176 qcom,freq-domain = <&cpufreq_hw 1>;
183 clocks = <&cpufreq_hw 1>;
200 qcom,freq-domain = <&cpufreq_hw 1>;
207 clocks = <&cpufreq_hw 1>;
224 qcom,freq-domain = <&cpufreq_hw 1>;
231 clocks = <&cpufreq_hw 1>;
289 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
308 CLUSTER_SLEEP_AOSS_SLEEP: cluster-sleep-1 {
[all …]
H A Dsc7180.dtsi230 clocks = <&cpufreq_hw 1>;
241 qcom,freq-domain = <&cpufreq_hw 1>;
254 clocks = <&cpufreq_hw 1>;
265 qcom,freq-domain = <&cpufreq_hw 1>;
323 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
333 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
343 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
364 CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
690 qcom,client-id = <1>;
714 #qcom,smem-state-cells = <1>;
[all …]
H A Dsm8150.dtsi152 clocks = <&cpufreq_hw 1>;
157 qcom,freq-domain = <&cpufreq_hw 1>;
176 clocks = <&cpufreq_hw 1>;
181 qcom,freq-domain = <&cpufreq_hw 1>;
200 clocks = <&cpufreq_hw 1>;
205 qcom,freq-domain = <&cpufreq_hw 1>;
293 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
608 #reset-cells = <1>;
722 qcom,client-id = <1>;
811 #qcom,smem-state-cells = <1>;
[all …]
H A Dsc8280xp.dtsi143 clocks = <&cpufreq_hw 1>;
149 qcom,freq-domain = <&cpufreq_hw 1>;
165 clocks = <&cpufreq_hw 1>;
171 qcom,freq-domain = <&cpufreq_hw 1>;
187 clocks = <&cpufreq_hw 1>;
193 qcom,freq-domain = <&cpufreq_hw 1>;
209 clocks = <&cpufreq_hw 1>;
215 qcom,freq-domain = <&cpufreq_hw 1>;
276 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
718 #qcom,smem-state-cells = <1>;
[all …]
H A Dsc7280.dtsi159 qcom,client-id = <1>;
269 clocks = <&cpufreq_hw 1>;
278 qcom,freq-domain = <&cpufreq_hw 1>;
292 clocks = <&cpufreq_hw 1>;
301 qcom,freq-domain = <&cpufreq_hw 1>;
315 clocks = <&cpufreq_hw 1>;
324 qcom,freq-domain = <&cpufreq_hw 1>;
406 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
416 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
426 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
[all …]

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