Lines Matching +full:1 +full:c25000
159 qcom,client-id = <1>;
269 clocks = <&cpufreq_hw 1>;
278 qcom,freq-domain = <&cpufreq_hw 1>;
292 clocks = <&cpufreq_hw 1>;
301 qcom,freq-domain = <&cpufreq_hw 1>;
315 clocks = <&cpufreq_hw 1>;
324 qcom,freq-domain = <&cpufreq_hw 1>;
406 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
416 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
426 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
691 #qcom,smem-state-cells = <1>;
715 #qcom,smem-state-cells = <1>;
735 qcom,remote-pid = <1>;
739 #qcom,smem-state-cells = <1>;
750 #qcom,smem-state-cells = <1>;
774 #qcom,smem-state-cells = <1>;
785 #qcom,smem-state-cells = <1>;
868 #clock-cells = <1>;
869 #reset-cells = <1>;
870 #power-domain-cells = <1>;
892 #address-cells = <1>;
893 #size-cells = <1>;
895 gpu_speed_bin: gpu_speed_bin@1e9 {
905 pinctrl-1 = <&sdc1_clk_sleep>, <&sdc1_cmd_sleep>, <&sdc1_data_sleep>, <&sdc1_rclk_sleep>;
934 mmc-ddr-1_8v;
935 mmc-hs200-1_8v;
936 mmc-hs400-1_8v;
1002 #address-cells = <1>;
1012 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1025 #address-cells = <1>;
1033 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1062 #address-cells = <1>;
1071 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1072 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1085 #address-cells = <1>;
1092 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1093 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1122 #address-cells = <1>;
1132 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1145 #address-cells = <1>;
1153 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1182 #address-cells = <1>;
1192 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1205 #address-cells = <1>;
1213 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1242 #address-cells = <1>;
1252 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1265 #address-cells = <1>;
1273 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1302 #address-cells = <1>;
1312 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1325 #address-cells = <1>;
1333 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1362 #address-cells = <1>;
1372 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1385 #address-cells = <1>;
1393 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1422 #address-cells = <1>;
1432 <&gpi_dma0 1 7 QCOM_GPI_I2C>;
1445 #address-cells = <1>;
1453 <&gpi_dma0 1 7 QCOM_GPI_SPI>;
1517 #address-cells = <1>;
1527 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1540 #address-cells = <1>;
1548 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1577 #address-cells = <1>;
1586 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1587 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1600 #address-cells = <1>;
1607 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1608 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1637 #address-cells = <1>;
1647 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1660 #address-cells = <1>;
1668 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1697 #address-cells = <1>;
1707 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1720 #address-cells = <1>;
1728 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1757 #address-cells = <1>;
1767 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1780 #address-cells = <1>;
1788 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1817 #address-cells = <1>;
1827 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
1840 #address-cells = <1>;
1848 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
1877 #address-cells = <1>;
1887 <&gpi_dma1 1 6 QCOM_GPI_I2C>;
1900 #address-cells = <1>;
1908 <&gpi_dma1 1 6 QCOM_GPI_SPI>;
1937 #address-cells = <1>;
1947 <&gpi_dma1 1 7 QCOM_GPI_I2C>;
1960 #address-cells = <1>;
1968 <&gpi_dma1 1 7 QCOM_GPI_SPI>;
2082 pcie1: pci@1c08000 {
2092 linux,pci-domain = <1>;
2112 #interrupt-cells = <1>;
2114 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
2169 pcie1_phy: phy@1c0e000 {
2189 pcie1_lane: phy@1c0e200 {
2205 ipa: ipa@1e40000 {
2220 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
2237 <&ipa_smp2p_out 1>;
2244 tcsr_mutex: hwlock@1f40000 {
2247 #hwlock-cells = <1>;
2250 tcsr_1: syscon@1f60000 {
2255 tcsr_2: syscon@1fc0000 {
2267 #clock-cells = <1>;
2288 #sound-dai-cells = <1>;
2317 #sound-dai-cells = <1>;
2341 #sound-dai-cells = <1>;
2371 #sound-dai-cells = <1>;
2386 #clock-cells = <1>;
2387 #power-domain-cells = <1>;
2388 #reset-cells = <1>;
2406 #sound-dai-cells = <1>;
2418 #clock-cells = <1>;
2419 #power-domain-cells = <1>;
2429 #clock-cells = <1>;
2430 #power-domain-cells = <1>;
2479 #sound-dai-cells = <1>;
2480 #address-cells = <1>;
2500 #clock-cells = <1>;
2501 #power-domain-cells = <1>;
2572 <&adreno_smmu 1 0x400>;
2607 opp-550000000-1 {
2700 #clock-cells = <1>;
2701 #reset-cells = <1>;
2702 #power-domain-cells = <1>;
2756 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2786 qcom,remote-pid = <1>;
2824 #address-cells = <1>;
2852 #address-cells = <1>;
2880 #address-cells = <1>;
2890 port@1 {
2891 reg = <1>;
2957 #address-cells = <1>;
3194 #address-cells = <1>;
3204 port@1 {
3205 reg = <1>;
3283 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>;
3373 #clock-cells = <1>;
3374 #phy-cells = <1>;
3441 #address-cells = <1>;
3461 <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3522 opp-1 {
3561 opp-1 {
3613 #address-cells = <1>;
3765 #clock-cells = <1>;
3766 #reset-cells = <1>;
3767 #power-domain-cells = <1>;
3777 #clock-cells = <1>;
3778 #reset-cells = <1>;
3779 #power-domain-cells = <1>;
3788 <&mdss_dsi_phy 1>,
3792 <&mdss_edp_phy 1>;
3801 #clock-cells = <1>;
3802 #reset-cells = <1>;
3803 #power-domain-cells = <1>;
3822 #interrupt-cells = <1>;
3864 #address-cells = <1>;
3874 port@1 {
3875 reg = <1>;
3937 assigned-clock-parents = <&mdss_dsi_phy 0>, <&mdss_dsi_phy 1>;
3944 #address-cells = <1>;
3950 #address-cells = <1>;
3960 port@1 {
3961 reg = <1>;
3996 #clock-cells = <1>;
4031 assigned-clock-parents = <&mdss_edp_phy 0>, <&mdss_edp_phy 1>;
4042 #address-cells = <1>;
4052 port@1 {
4053 reg = <1>;
4096 #clock-cells = <1>;
4139 #address-cells = <1>;
4149 port@1 {
4150 reg = <1>;
4184 qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,
4186 <64 434 2>, <66 438 3>, <69 86 1>,
4187 <70 520 54>, <124 609 31>, <155 63 1>,
4197 #reset-cells = <1>;
4209 #thermal-sensor-cells = <1>;
4220 #thermal-sensor-cells = <1>;
4226 #reset-cells = <1>;
4255 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
5075 #address-cells = <1>;
5076 #size-cells = <1>;
5090 #global-interrupts = <1>;
5190 #msi-cells = <1>;
5204 #address-cells = <1>;
5205 #size-cells = <1>;
5219 frame-number = <1>;
5225 frame@17c25000 {
5266 reg-names = "drv-0", "drv-1", "drv-2";
5275 <CONTROL_TCS 1>;
5283 #power-domain-cells = <1>;
5331 #clock-cells = <1>;
5340 #interconnect-cells = <1>;
5353 "dcvsh-irq-1",
5358 #freq-domain-cells = <1>;
5359 #clock-cells = <1>;
5368 thermal-sensors = <&tsens0 1>;
5978 thermal-sensors = <&tsens1 1>;