a1ed1552 | 10-Dec-2015 |
Michael Schanz <michael.schanz@congatec.com> |
cgtqmx6eval: fix pad configuration for SPI bus
Use the macro SETUP_IOMUX_PAD(...) rather than imx_iomux_v3_setup_multiple_pads(...) in order to setup the pin configuration for ECSPI1.
ARRAY_SIZE(pa
cgtqmx6eval: fix pad configuration for SPI bus
Use the macro SETUP_IOMUX_PAD(...) rather than imx_iomux_v3_setup_multiple_pads(...) in order to setup the pin configuration for ECSPI1.
ARRAY_SIZE(pads) provides the wrong size for imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)) in case of MX6QDL. In the particular case, the content of GPR12 is overwritten and the IPG/AHB/ATB/ATP clocks are deactivated. Therefore, the connection to the system via JTAG is not possible anymore. Furthermore, kernel version 3.0.35 hangs during bootprocess in the function etm_init().
Signed-off-by: Michael Schanz <michael.schanz@congatec.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
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d7140351 | 19-Nov-2015 |
Otavio Salvador <otavio@ossystems.com.br> |
cgtqmx6eval: Add SPL support
Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
Add SPL support so that all the variants can be supported
Signed-off-by: Otavio Salvador <otav
cgtqmx6eval: Add SPL support
Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
Add SPL support so that all the variants can be supported
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
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