4376c40d | 13-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
kvm: introduce kvm_kernel_irqchip_* functions
The KVMState struct is opaque, so provide accessors for the fields that will be moved from current_machine to the accelerator. For now they just forwar
kvm: introduce kvm_kernel_irqchip_* functions
The KVMState struct is opaque, so provide accessors for the fields that will be moved from current_machine to the accelerator. For now they just forward to the machine object, but this will change.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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23b0898e | 13-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
kvm: convert "-machine kvm_shadow_mem" to an accelerator property
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
fe174132 | 13-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
tcg: add "-accel tcg,tb-size" and deprecate "-tb-size"
-tb-size fits nicely in the new framework for accelerator-specific options. It is a very niche option, so insta-deprecate it.
Signed-off-by:
tcg: add "-accel tcg,tb-size" and deprecate "-tb-size"
-tb-size fits nicely in the new framework for accelerator-specific options. It is a very niche option, so insta-deprecate it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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12ceaef6 | 13-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
tcg: convert "-accel threads" to a QOM property
Replace the ad-hoc qemu_tcg_configure with generic code invoking QOM property getters and setters. More properties (and thus more valid -accel subopt
tcg: convert "-accel threads" to a QOM property
Replace the ad-hoc qemu_tcg_configure with generic code invoking QOM property getters and setters. More properties (and thus more valid -accel suboptions) will be added in the next patches, which will move accelerator-related "-machine" options to accelerators.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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fc5cf826 | 13-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
accel: pass object to accel_init_machine
We will have to set QOM properties before accel_init_machine, based on the options provided to -accel. Construct the object outside it so that it will be po
accel: pass object to accel_init_machine
We will have to set QOM properties before accel_init_machine, based on the options provided to -accel. Construct the object outside it so that it will be possible to iterate on properties between object_new_with_class and accel_init_machine.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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3c75e12e | 13-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
qom: add object_new_with_class
Similar to CPU and machine classes, "-accel" class names are mangled, so we have to first get a class via accel_find and then instantiate it. Provide a new function to
qom: add object_new_with_class
Similar to CPU and machine classes, "-accel" class names are mangled, so we have to first get a class via accel_find and then instantiate it. Provide a new function to instantiate a class without going through object_class_get_name, and use it for CPUs and machines already.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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03a7a196 | 14-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
accel: compile accel/accel.c just once
Now that accel/accel.c does not use CONFIG_TCG or CONFIG_KVM anymore, it need not be compiled once for every softmmu target.
Signed-off-by: Paolo Bonzini <pbo
accel: compile accel/accel.c just once
Now that accel/accel.c does not use CONFIG_TCG or CONFIG_KVM anymore, it need not be compiled once for every softmmu target.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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28a09617 | 13-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
vl: merge -accel processing into configure_accelerators
The next step is to move the parsing of "-machine accel=..." into vl.c, unifying it with the configure_accelerators() function that has just b
vl: merge -accel processing into configure_accelerators
The next step is to move the parsing of "-machine accel=..." into vl.c, unifying it with the configure_accelerators() function that has just been introduced. This way, we will be able to desugar it into multiple "-accel" options, without polluting accel/accel.c.
The CONFIG_TCG and CONFIG_KVM symbols are not available in vl.c, but we can use accel_find instead to find their value at runtime. Once we know that the binary has one of TCG or KVM, the default accelerator can be expressed simply as "tcg:kvm", because TCG never fails to initialize.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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af0440ae | 14-Nov-2019 |
Paolo Bonzini <pbonzini@redhat.com> |
tcg: move qemu_tcg_configure to accel/tcg/tcg-all.c
Move everything related to mttcg_enabled in accel/tcg/tcg-all.c, which will make even more sense when "thread" becomes a QOM property.
For now, i
tcg: move qemu_tcg_configure to accel/tcg/tcg-all.c
Move everything related to mttcg_enabled in accel/tcg/tcg-all.c, which will make even more sense when "thread" becomes a QOM property.
For now, initializing mttcg_enabled in the instance_init function prepares for the next patch, which will only invoke qemu_tcg_configure when the command line includes a -accel option.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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9b3a31c7 | 21-Nov-2019 |
Dr. David Alan Gilbert <dgilbert@redhat.com> |
kvm: Reallocate dirty_bmap when we change a slot
kvm_set_phys_mem can be called to reallocate a slot by something the guest does (e.g. writing to PAM and other chipset registers). This can happen in
kvm: Reallocate dirty_bmap when we change a slot
kvm_set_phys_mem can be called to reallocate a slot by something the guest does (e.g. writing to PAM and other chipset registers). This can happen in the middle of a migration, and if we're unlucky it can now happen between the split 'sync' and 'clear'; the clear asserts if there's no bmap to clear. Recreate the bmap whenever we change the slot, keeping the clear path happy.
Typically this is triggered by the guest rebooting during a migrate.
Corresponds to: https://bugzilla.redhat.com/show_bug.cgi?id=1772774 https://bugzilla.redhat.com/show_bug.cgi?id=1771032
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com>
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3607715a | 16-Oct-2019 |
David Gibson <david@gibson.dropbear.id.au> |
kvm: Introduce KVM irqchip change notifier
Awareness of an in kernel irqchip is usually local to the machine and its top-level interrupt controller. However, in a few cases other things need to kno
kvm: Introduce KVM irqchip change notifier
Awareness of an in kernel irqchip is usually local to the machine and its top-level interrupt controller. However, in a few cases other things need to know about it. In particular vfio devices need this in order to accelerate interrupt delivery.
If interrupt routing is changed, such devices may need to readjust their connection to the KVM irqchip. pci_bus_fire_intx_routing_notifier() exists to do just this.
However, for the pseries machine type we have a situation where the routing remains constant but the top-level irq chip itself is changed. This occurs because of PAPR feature negotiation which allows the guest to decide between the older XICS and newer XIVE irq chip models (both of which are paravirtualized).
To allow devices like vfio to adjust to this change, introduce a new notifier for the purpose kvm_irqchip_change_notify().
Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Tested-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Acked-by: Alex Williamson <alex.williamson@redhat.com>
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894d354f | 11-Nov-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Remove unassigned_access CPU hook
All targets have now migrated away from the old unassigned_access hook to the new do_transaction_failed hook. This means we can remove the core-code infrastructure
Remove unassigned_access CPU hook
All targets have now migrated away from the old unassigned_access hook to the new do_transaction_failed hook. This means we can remove the core-code infrastructure for that hook and the code that calls it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20191108173732.11816-1-peter.maydell@linaro.org
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e4fbd37f | 17-May-2019 |
Alex Bennée <alex.bennee@linaro.org> |
accel/stubs: reduce headers from tcg-stub
We don't need much for these. However I do wonder why these aren't just null inlines in exec-all.h
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Revi
accel/stubs: reduce headers from tcg-stub
We don't need much for these. However I do wonder why these aren't just null inlines in exec-all.h
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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6ba6f818 | 07-Dec-2018 |
Emilio G. Cota <cota@braap.org> |
translator: inject instrumentation from plugins
Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@l
translator: inject instrumentation from plugins
Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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7dec71d5 | 21-Oct-2019 |
Alex Bennée <alex.bennee@linaro.org> |
cputlb: ensure _cmmu helper functions follow the naming standard
We document this in docs/devel/load-stores.rst so lets follow it. The 32 bit and 64 bit access functions have historically not includ
cputlb: ensure _cmmu helper functions follow the naming standard
We document this in docs/devel/load-stores.rst so lets follow it. The 32 bit and 64 bit access functions have historically not included the sign so we leave those as is. We also introduce some signed helpers which are used for loading immediate values in the translator.
Fixes: 282dffc8 Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20191021150910.23216-1-alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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5025bb7f | 21-Oct-2018 |
Emilio G. Cota <cota@braap.org> |
translate-all: notify plugin code of tb_flush
Plugins might allocate per-TB data that then they get passed each time a TB is executed (via the *userdata pointer).
Notify plugin code every time a co
translate-all: notify plugin code of tb_flush
Plugins might allocate per-TB data that then they get passed each time a TB is executed (via the *userdata pointer).
Notify plugin code every time a code cache flush occurs, so that plugins can then reclaim the memory of the per-TB data.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
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235537fa | 19-Jun-2019 |
Alex Bennée <alex.bennee@linaro.org> |
plugins: implement helpers for resolving hwaddr
We need to keep a local per-cpu copy of the data as other threads may be running. Currently we can provide insight as to if the access was IO or not a
plugins: implement helpers for resolving hwaddr
We need to keep a local per-cpu copy of the data as other threads may be running. Currently we can provide insight as to if the access was IO or not and give the offset into a given device (usually the main RAMBlock). We store enough information to get details such as the MemoryRegion which might be useful in later expansions to the API.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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e6d86bed | 21-Oct-2018 |
Emilio G. Cota <cota@braap.org> |
tcg: let plugins instrument virtual memory accesses
To capture all memory accesses we need hook into all the various helper functions that are involved in memory operations as well as the injected i
tcg: let plugins instrument virtual memory accesses
To capture all memory accesses we need hook into all the various helper functions that are involved in memory operations as well as the injected inline helper calls. A later commit will allow us to resolve the actual guest HW addresses by replaying the lookup.
Signed-off-by: Emilio G. Cota <cota@braap.org> [AJB: drop haddr handling, just deal in vaddr] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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cfec3885 | 20-Oct-2018 |
Emilio G. Cota <cota@braap.org> |
atomic_template: add inline trace/plugin helpers
In preparation for plugin support.
Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: R
atomic_template: add inline trace/plugin helpers
In preparation for plugin support.
Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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38b47b19 | 07-Dec-2018 |
Emilio G. Cota <cota@braap.org> |
plugin-gen: add module for TCG-related code
We first inject empty instrumentation from translator_loop. After translation, we go through the plugins to see what they want to register for, filling in
plugin-gen: add module for TCG-related code
We first inject empty instrumentation from translator_loop. After translation, we go through the plugins to see what they want to register for, filling in the empty instrumentation. If if turns out that some instrumentation remains unused, we remove it.
This approach supports the following features:
- Inlining TCG code for simple operations. Note that we do not export TCG ops to plugins. Instead, we give them a C API to insert inlined ops. So far we only support adding an immediate to a u64, e.g. to count events.
- "Direct" callbacks. These are callbacks that do not go via a helper. Instead, the helper is defined at run-time, so that the plugin code is directly called from TCG. This makes direct callbacks as efficient as possible; they are therefore used for very frequent events, e.g. memory callbacks.
- Passing the host address to memory callbacks. Most of this is implemented in a later patch though.
- Instrumentation of memory accesses performed from helpers. See the corresponding comment, as well as a later patch.
Signed-off-by: Emilio G. Cota <cota@braap.org> [AJB: add alloc_tcg_plugin_context, use glib, rm hwaddr] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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4b2190da | 03-Nov-2018 |
Emilio G. Cota <cota@braap.org> |
cputlb: introduce get_page_addr_code_hostp
This will be used by plugins to get the host address of instructions.
Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.benn
cputlb: introduce get_page_addr_code_hostp
This will be used by plugins to get the host address of instructions.
Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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136094d0 | 01-Dec-2017 |
Emilio G. Cota <cota@braap.org> |
translate-all: use cpu_in_exclusive_work_context() in tb_flush
tb_flush will be called by the plugin module from a safe work environment. Prepare for that.
Suggested-by: Alex Bennée <alex.bennee@li
translate-all: use cpu_in_exclusive_work_context() in tb_flush
tb_flush will be called by the plugin module from a safe work environment. Prepare for that.
Suggested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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cfbc3c60 | 26-Nov-2018 |
Emilio G. Cota <cota@braap.org> |
cpu: introduce cpu_in_exclusive_context()
Suggested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> [AJB: mo
cpu: introduce cpu_in_exclusive_context()
Suggested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> [AJB: moved inside start/end_exclusive fns + cleanup] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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504f73f7 | 28-Jun-2019 |
Alex Bennée <alex.bennee@linaro.org> |
trace: add mmu_index to mem_info
We are going to re-use mem_info later for plugins and will need to track the mmu_idx for softmmu code.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> |
fe9b676f | 23-Oct-2019 |
Richard Henderson <richard.henderson@linaro.org> |
translate-all: Remove tb_alloc
Since 2ac01d6dafab, this function does only two things: assert a lock is held, and call tcg_tb_alloc. It is used exactly once, and its user has already done the asser
translate-all: Remove tb_alloc
Since 2ac01d6dafab, this function does only two things: assert a lock is held, and call tcg_tb_alloc. It is used exactly once, and its user has already done the assert.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Clement Deschamps <clement.deschamps@greensocs.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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