arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level

TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmu

arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level

TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.

Disable the TSCADC nodes in the top-level dtsi files and only enable the
ones that are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-13-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level

TSCADC nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pin

arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level

TSCADC nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.

Disable the TSCADC nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-12-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level

GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux

arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level

GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-11-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j721s2: Enable GPIO nodes at the board level

GPIO nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmu

arm64: dts: ti: k3-j721s2: Enable GPIO nodes at the board level

GPIO nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-10-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level

GPIO nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux

arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level

GPIO nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-9-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level

OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux an

arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level

OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-8-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level

OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux

arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level

OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-7-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level

OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux

arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level

OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-6-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level

OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux a

arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level

OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-5-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j721s2: Enable SDHCI nodes at the board level

SDHCI nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and will not be functional unless they are extended.

As th

arm64: dts: ti: k3-j721s2: Enable SDHCI nodes at the board level

SDHCI nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-4-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level

SDHCI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the

arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level

SDHCI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-3-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level

SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the

arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level

SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-2-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j784s4: Fix interrupt ranges for wkup & main gpio

This patch fixes the interrupt range for wakeup and main domain gpio
interrupt routers. They were wrongly subtracted by 32 instea

arm64: dts: ti: k3-j784s4: Fix interrupt ranges for wkup & main gpio

This patch fixes the interrupt range for wakeup and main domain gpio
interrupt routers. They were wrongly subtracted by 32 instead of
following what is defined in the interrupt map in the TRM (Table 9-35).

Link: http://www.ti.com/lit/pdf/spruj52
Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com>
Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20230810-tps6594-v6-4-2b2e2399e2ef@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3: Add cfg reg region to ringacc node

Add register range of ringacc cfg node to all k3 SoC dtsi files. This is
normally under Device Management firmware control but some entities li

arm64: dts: ti: k3: Add cfg reg region to ringacc node

Add register range of ringacc cfg node to all k3 SoC dtsi files. This is
normally under Device Management firmware control but some entities like
bootloader have to access directly and thus required to be present in DT.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230809175932.2553156-3-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ADC

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for ADC nodes were not updated to align with new
regions,

arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ADC

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for ADC nodes were not updated to align with new
regions, due to this while probing ADC driver out of range
error was seen.

Pin mux offsets for ADC nodes are corrected in this patch.

Fixes: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230809050108.751164-1-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: verdin-am62: dahlia: add sound card

Add WM8904 based analog sound card to Dahlia carrier board.

Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco

arm64: dts: ti: verdin-am62: dahlia: add sound card

Add WM8904 based analog sound card to Dahlia carrier board.

Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-5-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: verdin-am62: dev: add sound card

Add NAU8822 based analog sound card to Development carrier board.

Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <france

arm64: dts: ti: verdin-am62: dev: add sound card

Add NAU8822 based analog sound card to Development carrier board.

Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-4-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: verdin-am62: Set I2S_1 MCLK rate

Set AUDIO_EXT_REFCLK1, used as I2S_1_MCLK on Verdin AM62 family, to 25MHz
(this is the only valid option according to TI [1]).

[1] https://e2e.ti.co

arm64: dts: ti: verdin-am62: Set I2S_1 MCLK rate

Set AUDIO_EXT_REFCLK1, used as I2S_1_MCLK on Verdin AM62 family, to 25MHz
(this is the only valid option according to TI [1]).

[1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322

Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-3-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-am62: Enable AUDIO_REFCLKx

On AM62-based SoCs the AUDIO_REFCLKx clocks can be used as an input to
external peripherals when configured through CTRL_MMR, so add the
clock nodes.

S

arm64: dts: ti: k3-am62: Enable AUDIO_REFCLKx

On AM62-based SoCs the AUDIO_REFCLKx clocks can be used as an input to
external peripherals when configured through CTRL_MMR, so add the
clock nodes.

Signed-off-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-2-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j721s2: correct pinmux offset for ospi

Due to non-addressable regions in J721S2 SOC wkup_pmx was split
into four regions from wkup_pmx0 to wkup_pmx3.

Correcting OSPI1 pin mux, wh

arm64: dts: ti: k3-j721s2: correct pinmux offset for ospi

Due to non-addressable regions in J721S2 SOC wkup_pmx was split
into four regions from wkup_pmx0 to wkup_pmx3.

Correcting OSPI1 pin mux, which now falls under wkup_pmx1.
Along with that removing unused pin mux for OSPI-0.

Fixes: 6bc829ceea41 ("arm64: dts: ti: k3-j721s2: Fix wkup pinmux range")

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230804075341.3858488-1-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ospi

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for OSPI nodes were not updated to align with new
regions

arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ospi

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for OSPI nodes were not updated to align with new
regions, due to this while setting ospi pin muxes out of range
error was seen.

Pin mux offsets for OSPI nodes are corrected in this patch.

Fixes: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230802114126.162445-1-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-am62a7: Add MCU MCAN nodes

On AM62ax there are no hardware interrupts routed to A53 GIC
interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
omitted from MCU dtsi.

Timer

arm64: dts: ti: k3-am62a7: Add MCU MCAN nodes

On AM62ax there are no hardware interrupts routed to A53 GIC
interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
omitted from MCU dtsi.

Timer polling was introduced in commits [1][2] enabling 3x MCAN
on AM62ax, so now add MCU MCAN nodes to the mcu dtsi for the Cortex A53.

[1] commit b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt")
[2] commit bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN")

Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20230804220137.425442-1-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-am68-sk-base-board: Add HDMI support

AM68-SK has an HDMI port. The bridge used is TI-TFP410.
Add support to enable the connection:
DSS => TI TFP410 DPI-to-DVI Bridge => HDMI conne

arm64: dts: ti: k3-am68-sk-base-board: Add HDMI support

AM68-SK has an HDMI port. The bridge used is TI-TFP410.
Add support to enable the connection:
DSS => TI TFP410 DPI-to-DVI Bridge => HDMI connector

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230803081800.368582-3-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3-j721s2-main: Add DSS node

Add DSS node for J721S2 SoC. DSS IP in J721S2 is
same as DSS IP in J721E, so same compatible is used.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.co

arm64: dts: ti: k3-j721s2-main: Add DSS node

Add DSS node for J721S2 SoC. DSS IP in J721S2 is
same as DSS IP in J721E, so same compatible is used.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230803081800.368582-2-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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arm64: dts: ti: k3: Fix epwm_tbclk node name to generic name

The name "clock" is not allowed for nodes, use "clock-controller" to
remove the DTS check warning.

Signed-off-by: Andrew Davis <afd@ti.c

arm64: dts: ti: k3: Fix epwm_tbclk node name to generic name

The name "clock" is not allowed for nodes, use "clock-controller" to
remove the DTS check warning.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230802174521.236255-3-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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