xref: /openbmc/linux/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts (revision 5f715be31638b62de560acab7fdc7ff3d9e01bf9)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
4 *
5 * Base Board: https://www.ti.com/lit/zip/SPRR463
6 */
7
8/dts-v1/;
9
10#include "k3-am68-sk-som.dtsi"
11#include <dt-bindings/net/ti-dp83867.h>
12#include <dt-bindings/phy/phy-cadence.h>
13#include <dt-bindings/phy/phy.h>
14
15#include "k3-serdes.h"
16
17/ {
18	compatible = "ti,am68-sk", "ti,j721s2";
19	model = "Texas Instruments AM68 SK";
20
21	chosen {
22		stdout-path = "serial2:115200n8";
23	};
24
25	aliases {
26		serial0 = &wkup_uart0;
27		serial1 = &mcu_uart0;
28		serial2 = &main_uart8;
29		mmc1 = &main_sdhci1;
30		can0 = &mcu_mcan0;
31		can1 = &mcu_mcan1;
32		can2 = &main_mcan6;
33		can3 = &main_mcan7;
34	};
35
36	vusb_main: regulator-vusb-main5v0 {
37		/* USB MAIN INPUT 5V DC */
38		compatible = "regulator-fixed";
39		regulator-name = "vusb-main5v0";
40		regulator-min-microvolt = <5000000>;
41		regulator-max-microvolt = <5000000>;
42		regulator-always-on;
43		regulator-boot-on;
44	};
45
46	vsys_3v3: regulator-vsys3v3 {
47		/* Output of LM5141 */
48		compatible = "regulator-fixed";
49		regulator-name = "vsys_3v3";
50		regulator-min-microvolt = <3300000>;
51		regulator-max-microvolt = <3300000>;
52		vin-supply = <&vusb_main>;
53		regulator-always-on;
54		regulator-boot-on;
55	};
56
57	vdd_mmc1: regulator-sd {
58		/* Output of TPS22918 */
59		compatible = "regulator-fixed";
60		regulator-name = "vdd_mmc1";
61		regulator-min-microvolt = <3300000>;
62		regulator-max-microvolt = <3300000>;
63		regulator-boot-on;
64		enable-active-high;
65		vin-supply = <&vsys_3v3>;
66		gpio = <&exp1 8 GPIO_ACTIVE_HIGH>;
67	};
68
69	vdd_sd_dv: regulator-tlv71033 {
70		/* Output of TLV71033 */
71		compatible = "regulator-gpio";
72		regulator-name = "tlv71033";
73		pinctrl-names = "default";
74		pinctrl-0 = <&vdd_sd_dv_pins_default>;
75		regulator-min-microvolt = <1800000>;
76		regulator-max-microvolt = <3300000>;
77		regulator-boot-on;
78		vin-supply = <&vsys_3v3>;
79		gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
80		states = <1800000 0x0>,
81			 <3300000 0x1>;
82	};
83
84	vsys_io_1v8: regulator-vsys-io-1v8 {
85		compatible = "regulator-fixed";
86		regulator-name = "vsys_io_1v8";
87		regulator-min-microvolt = <1800000>;
88		regulator-max-microvolt = <1800000>;
89		regulator-always-on;
90		regulator-boot-on;
91	};
92
93	vsys_io_1v2: regulator-vsys-io-1v2 {
94		compatible = "regulator-fixed";
95		regulator-name = "vsys_io_1v2";
96		regulator-min-microvolt = <1200000>;
97		regulator-max-microvolt = <1200000>;
98		regulator-always-on;
99		regulator-boot-on;
100	};
101
102	transceiver1: can-phy0 {
103		compatible = "ti,tcan1042";
104		#phy-cells = <0>;
105		max-bitrate = <5000000>;
106	};
107
108	transceiver2: can-phy1 {
109		compatible = "ti,tcan1042";
110		#phy-cells = <0>;
111		max-bitrate = <5000000>;
112	};
113
114	transceiver3: can-phy2 {
115		compatible = "ti,tcan1042";
116		#phy-cells = <0>;
117		max-bitrate = <5000000>;
118	};
119
120	transceiver4: can-phy3 {
121		compatible = "ti,tcan1042";
122		#phy-cells = <0>;
123		max-bitrate = <5000000>;
124	};
125
126	connector-hdmi {
127		compatible = "hdmi-connector";
128		label = "hdmi";
129		type = "a";
130		pinctrl-names = "default";
131		pinctrl-0 = <&hdmi_hpd_pins_default>;
132		ddc-i2c-bus = <&mcu_i2c1>;
133		/* HDMI_HPD */
134		hpd-gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>;
135
136		port {
137			hdmi_connector_in: endpoint {
138				remote-endpoint = <&tfp410_out>;
139			};
140		};
141	};
142
143	bridge-dvi {
144		compatible = "ti,tfp410";
145		/* HDMI_PDn */
146		powerdown-gpios = <&exp2 0 GPIO_ACTIVE_LOW>;
147		ti,deskew = <0>;
148
149		ports {
150			#address-cells = <1>;
151			#size-cells = <0>;
152
153			port@0 {
154				reg = <0>;
155
156				tfp410_in: endpoint {
157					remote-endpoint = <&dpi_out0>;
158					pclk-sample = <1>;
159				};
160			};
161
162			port@1 {
163				reg = <1>;
164
165				tfp410_out: endpoint {
166					remote-endpoint = <&hdmi_connector_in>;
167				};
168			};
169		};
170	};
171};
172
173&main_pmx0 {
174	main_uart8_pins_default: main-uart8-default-pins {
175		pinctrl-single,pins = <
176			J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
177			J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
178		>;
179	};
180
181	main_i2c0_pins_default: main-i2c0-default-pins {
182		pinctrl-single,pins = <
183			J721S2_IOPAD(0x0e0, PIN_INPUT, 0) /* (AH25) I2C0_SCL */
184			J721S2_IOPAD(0x0e4, PIN_INPUT, 0) /* (AE24) I2C0_SDA */
185		>;
186	};
187
188	main_mmc1_pins_default: main-mmc1-default-pins {
189		pinctrl-single,pins = <
190			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
191			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
192			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
193			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
194			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
195			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
196			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
197		>;
198	};
199
200	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
201		pinctrl-single,pins = <
202			J721S2_IOPAD(0x0c4, PIN_INPUT, 7) /* (AB26) ECAP0_IN_APWM_OUT.GPIO0_49 */
203		>;
204	};
205
206	main_usbss0_pins_default: main-usbss0-default-pins {
207		pinctrl-single,pins = <
208			J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
209		>;
210	};
211
212	main_mcan6_pins_default: main-mcan6-default-pins {
213		pinctrl-single,pins = <
214			J721S2_IOPAD(0x098, PIN_INPUT, 0) /* (V25) MCASP0_AXR10.MCAN6_RX */
215			J721S2_IOPAD(0x094, PIN_INPUT, 0) /* (AA25) MCASP0_AXR9.MCAN6_TX */
216		>;
217	};
218
219	main_mcan7_pins_default: main-mcan7-default-pins {
220		pinctrl-single,pins = <
221			J721S2_IOPAD(0x0a0, PIN_INPUT, 0) /* (AB25) MCASP0_AXR12.MCAN7_RX */
222			J721S2_IOPAD(0x09c, PIN_INPUT, 0) /* (T24) MCASP0_AXR11.MCAN7_TX */
223		>;
224	};
225
226	main_i2c4_pins_default: main-i2c4-default-pins {
227		pinctrl-single,pins = <
228			J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */
229			J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */
230		>;
231	};
232
233	rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
234		pinctrl-single,pins = <
235			J721S2_IOPAD(0x0a8, PIN_INPUT, 7) /* (U24)  MCASP0_AXR14.GPIO0_42 */
236			J721S2_IOPAD(0x090, PIN_INPUT, 7) /* (W24) MCASP0_AXR8.GPIO0_36 */
237			J721S2_IOPAD(0x0bc, PIN_INPUT, 7) /* (V28) MCASP1_AFSX.GPIO0_47 */
238			J721S2_IOPAD(0x06c, PIN_INPUT, 7) /* (V26) MCAN1_TX.GPIO0_27 */
239			J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
240			J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */
241			J721S2_IOPAD(0x0b8, PIN_INPUT, 7) /* (AA24) MCASP1_ACLKX.GPIO0_46 */
242			J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */
243			J721S2_IOPAD(0x034, PIN_INPUT, 7) /* (AD24) PMIC_WAKE0.GPIO0_13 */
244			J721S2_IOPAD(0x0a4, PIN_INPUT, 7) /* (T23) MCASP0_AXR13.GPIO0_41 */
245			J721S2_IOPAD(0x0c0, PIN_INPUT, 7) /* (T28) MCASP1_AXR0.GPIO0_48 */
246			J721S2_IOPAD(0x0b4, PIN_INPUT, 7) /* (U25) MCASP1_AXR4.GPIO0_45 */
247			J721S2_IOPAD(0x0cc, PIN_INPUT, 7) /* (AE27) SPI0_CS0.GPIO0_51 */
248			J721S2_IOPAD(0x08c, PIN_INPUT, 7) /* (T25) MCASP0_AXR7.GPIO0_35 */
249		>;
250	};
251
252	dss_vout0_pins_default: dss-vout0-default-pins {
253		pinctrl-single,pins = <
254			J721S2_IOPAD(0x074, PIN_OUTPUT, 2) /* (R28) MCAN2_TX.VOUT0_DATA0 */
255			J721S2_IOPAD(0x070, PIN_OUTPUT, 2) /* (R27) MCAN1_RX.VOUT0_DATA1 */
256			J721S2_IOPAD(0x04c, PIN_OUTPUT, 2) /* (V27) MCASP1_AXR1.VOUT0_DATA10 */
257			J721S2_IOPAD(0x048, PIN_OUTPUT, 2) /* (AB27) MCASP0_AXR2.VOUT0_DATA11 */
258			J721S2_IOPAD(0x044, PIN_OUTPUT, 2) /* (Y26) MCASP0_AXR1.VOUT0_DATA12 */
259			J721S2_IOPAD(0x040, PIN_OUTPUT, 2) /* (AC28) MCASP0_AXR0.VOUT0_DATA13 */
260			J721S2_IOPAD(0x03c, PIN_OUTPUT, 2) /* (U27) MCASP0_AFSX.VOUT0_DATA14 */
261			J721S2_IOPAD(0x038, PIN_OUTPUT, 2) /* (AB28) MCASP0_ACLKX.VOUT0_DATA15 */
262			J721S2_IOPAD(0x0c8, PIN_OUTPUT, 2) /* (AD28) EXT_REFCLK1.VOUT0_DATA16 */
263			J721S2_IOPAD(0x030, PIN_OUTPUT, 2) /* (T26) GPIO0_12.VOUT0_DATA17 */
264			J721S2_IOPAD(0x02c, PIN_OUTPUT, 2) /* (V23) GPIO0_11.VOUT0_DATA18 */
265			J721S2_IOPAD(0x028, PIN_OUTPUT, 2) /* (AB24) MCAN16_RX.VOUT0_DATA19 */
266			J721S2_IOPAD(0x07c, PIN_OUTPUT, 2) /* (T27) MCASP0_AXR3.VOUT0_DATA2 */
267			J721S2_IOPAD(0x024, PIN_OUTPUT, 2) /* (Y28) MCAN16_TX.VOUT0_DATA20 */
268			J721S2_IOPAD(0x020, PIN_OUTPUT, 2) /* (AA23) MCAN15_RX.VOUT0_DATA21 */
269			J721S2_IOPAD(0x01c, PIN_OUTPUT, 2) /* (Y24) MCAN15_TX.VOUT0_DATA22 */
270			J721S2_IOPAD(0x018, PIN_OUTPUT, 2) /* (W23) MCAN14_RX.VOUT0_DATA23 */
271			J721S2_IOPAD(0x068, PIN_OUTPUT, 2) /* (U28) MCAN0_RX.VOUT0_DATA3 */
272			J721S2_IOPAD(0x064, PIN_OUTPUT, 2) /* (W28) MCAN0_TX.VOUT0_DATA4 */
273			J721S2_IOPAD(0x060, PIN_OUTPUT, 2) /* (AC27) MCASP2_AXR1.VOUT0_DATA5 */
274			J721S2_IOPAD(0x05c, PIN_OUTPUT, 2) /* (AA26) MCASP2_AXR0.VOUT0_DATA6 */
275			J721S2_IOPAD(0x058, PIN_OUTPUT, 2) /* (AA27) MCASP2_AFSX.VOUT0_DATA7 */
276			J721S2_IOPAD(0x054, PIN_OUTPUT, 2) /* (Y27) MCASP2_ACLKX.VOUT0_DATA8 */
277			J721S2_IOPAD(0x050, PIN_OUTPUT, 2) /* (W27) MCASP1_AXR2.VOUT0_DATA9 */
278			J721S2_IOPAD(0x084, PIN_OUTPUT, 2) /* (AA28) MCASP0_AXR5.VOUT0_DE */
279			J721S2_IOPAD(0x080, PIN_OUTPUT, 2) /* (U26) MCASP0_AXR4.VOUT0_HSYNC */
280			J721S2_IOPAD(0x078, PIN_OUTPUT, 2) /* (Y25) MCAN2_RX.VOUT0_PCLK */
281			J721S2_IOPAD(0x088, PIN_OUTPUT, 2) /* (AD27) MCASP0_AXR6.VOUT0_VP0_VSYNC */
282		>;
283	};
284
285	hdmi_hpd_pins_default: hdmi-hpd-default-pins {
286		pinctrl-single,pins = <
287			J721S2_IOPAD(0x000, PIN_INPUT, 7) /* (AG24) EXTINTN.GPIO0_0  */
288		>;
289	};
290};
291
292&wkup_pmx2 {
293	wkup_uart0_pins_default: wkup-uart0-default-pins {
294		pinctrl-single,pins = <
295			J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */
296			J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */
297			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
298			J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
299		>;
300	};
301
302	mcu_cpsw_pins_default: mcu-cpsw-default-pins {
303		pinctrl-single,pins = <
304			J721S2_WKUP_IOPAD(0x02C, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
305			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
306			J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
307			J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
308			J721S2_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
309			J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
310			J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
311			J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
312			J721S2_WKUP_IOPAD(0x00C, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
313			J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
314			J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
315			J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
316		>;
317	};
318
319	mcu_mdio_pins_default: mcu-mdio-default-pins {
320		pinctrl-single,pins = <
321			J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
322			J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
323		>;
324	};
325
326	mcu_mcan0_pins_default: mcu-mcan0-default-pins {
327		pinctrl-single,pins = <
328			J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
329			J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
330		>;
331	};
332
333	mcu_mcan1_pins_default: mcu-mcan1-default-pins {
334		pinctrl-single,pins = <
335			J721S2_WKUP_IOPAD(0x06C, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
336			J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX*/
337		>;
338	};
339
340	mcu_i2c0_pins_default: mcu-i2c0-default-pins {
341		pinctrl-single,pins = <
342			J721S2_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (G24) MCU_I2C0_SCL */
343			J721S2_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (J25) MCU_I2C0_SDA */
344		>;
345	};
346
347	mcu_i2c1_pins_default: mcu-i2c1-default-pins {
348		pinctrl-single,pins = <
349			J721S2_WKUP_IOPAD(0x078, PIN_INPUT, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */
350			J721S2_WKUP_IOPAD(0x07c, PIN_INPUT, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */
351		>;
352	};
353
354	mcu_uart0_pins_default: mcu-uart0-default-pins {
355		pinctrl-single,pins = <
356			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */
357			J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */
358		>;
359	};
360
361	mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 {
362		pinctrl-single,pins = <
363			J721S2_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */
364			J721S2_WKUP_IOPAD(0x05C, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */
365			J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) MCU_SPI1_D1.WKUP_GPIO0_2 */
366			J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) MCU_SPI1_CLK.WKUP_GPIO0_0 */
367			J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0_15*/
368			J721S2_WKUP_IOPAD(0x0B8, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */
369			J721S2_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (J26) WKUP_GPIO0_57 */
370			J721S2_WKUP_IOPAD(0x11C, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */
371			J721S2_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (C27) MCU_SPI1_CS0.WKUP_GPIO0_3 */
372		>;
373	};
374};
375
376&wkup_pmx3 {
377	mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-default-pins-1 {
378		pinctrl-single,pins = <
379			J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */
380		>;
381	};
382};
383
384&main_gpio0 {
385	pinctrl-names = "default";
386	pinctrl-0 = <&rpi_header_gpio0_pins_default>;
387};
388
389&main_gpio2 {
390	status = "disabled";
391};
392
393&main_gpio4 {
394	status = "disabled";
395};
396
397&main_gpio6 {
398	status = "disabled";
399};
400
401&wkup_gpio0 {
402	pinctrl-names = "default";
403	pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>;
404};
405
406&wkup_gpio1 {
407	status = "disabled";
408};
409
410&wkup_uart0 {
411	status = "reserved";
412	pinctrl-names = "default";
413	pinctrl-0 = <&wkup_uart0_pins_default>;
414};
415
416&mcu_uart0 {
417	status = "okay";
418	pinctrl-names = "default";
419	pinctrl-0 = <&mcu_uart0_pins_default>;
420};
421
422&main_uart8 {
423	status = "okay";
424	pinctrl-names = "default";
425	pinctrl-0 = <&main_uart8_pins_default>;
426	/* Shared with TFA on this platform */
427	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
428};
429
430&main_i2c0 {
431	pinctrl-names = "default";
432	pinctrl-0 = <&main_i2c0_pins_default>;
433	clock-frequency = <400000>;
434
435	exp1: gpio@21 {
436		compatible = "ti,tca6416";
437		reg = <0x21>;
438		gpio-controller;
439		#gpio-cells = <2>;
440		gpio-line-names = " ", " ", " ", " ", " ",
441				  "BOARDID_EEPROM_WP", "CAN_STB", " ",
442				  "GPIO_uSD_PWR_EN", " ", "IO_EXP_PCIe1_M.2_RTSz",
443				  "IO_EXP_MCU_RGMII_RST#", " ", " ", " ", " ";
444	};
445};
446
447&main_i2c4 {
448	status = "okay";
449	pinctrl-names = "default";
450	pinctrl-0 = <&main_i2c4_pins_default>;
451	clock-frequency = <400000>;
452};
453
454&mcu_i2c0 {
455	status = "okay";
456	pinctrl-names = "default";
457	pinctrl-0 = <&mcu_i2c0_pins_default>;
458	clock-frequency = <400000>;
459};
460
461&mcu_i2c1 {
462	status = "okay";
463	pinctrl-names = "default";
464	pinctrl-0 = <&mcu_i2c1_pins_default>;
465	/* i2c1 is used for DVI DDC, so we need to use 100kHz */
466	clock-frequency = <100000>;
467
468	exp2: gpio@20 {
469		compatible = "ti,tca6408";
470		reg = <0x20>;
471		gpio-controller;
472		#gpio-cells = <2>;
473		gpio-line-names = "HDMI_PDn","HDMI_LS_OE",
474				  "DP0_3V3_EN","eDP_ENABLE";
475	};
476};
477
478&main_sdhci1 {
479	/* SD card */
480	status = "okay";
481	pinctrl-0 = <&main_mmc1_pins_default>;
482	pinctrl-names = "default";
483	disable-wp;
484	vmmc-supply = <&vdd_mmc1>;
485	vqmmc-supply = <&vdd_sd_dv>;
486};
487
488&mcu_cpsw {
489	pinctrl-names = "default";
490	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
491};
492
493&davinci_mdio {
494	phy0: ethernet-phy@0 {
495		reg = <0>;
496		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
497		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
498		ti,min-output-impedance;
499	};
500};
501
502&cpsw_port1 {
503	phy-mode = "rgmii-rxid";
504	phy-handle = <&phy0>;
505};
506
507&mcu_mcan0 {
508	status = "okay";
509	pinctrl-names = "default";
510	pinctrl-0 = <&mcu_mcan0_pins_default>;
511	phys = <&transceiver1>;
512};
513
514&mcu_mcan1 {
515	status = "okay";
516	pinctrl-names = "default";
517	pinctrl-0 = <&mcu_mcan1_pins_default>;
518	phys = <&transceiver2>;
519};
520
521&main_mcan6 {
522	status = "okay";
523	pinctrl-names = "default";
524	pinctrl-0 = <&main_mcan6_pins_default>;
525	phys = <&transceiver3>;
526};
527
528&main_mcan7 {
529	status = "okay";
530	pinctrl-names = "default";
531	pinctrl-0 = <&main_mcan7_pins_default>;
532	phys = <&transceiver4>;
533};
534
535&dss {
536	status = "okay";
537	pinctrl-names = "default";
538	pinctrl-0 = <&dss_vout0_pins_default>;
539	/*
540	 * These clock assignments are chosen to enable the following outputs:
541	 *
542	 * VP0 - DisplayPort SST
543	 * VP1 - DPI0
544	 * VP2 - DSI
545	 * VP3 - DPI1
546	 */
547	assigned-clocks = <&k3_clks 158 2>,
548			  <&k3_clks 158 5>,
549			  <&k3_clks 158 14>,
550			  <&k3_clks 158 18>;
551	assigned-clock-parents = <&k3_clks 158 3>,
552				 <&k3_clks 158 7>,
553				 <&k3_clks 158 16>,
554				 <&k3_clks 158 22>;
555};
556
557&dss_ports {
558	#address-cells = <1>;
559	#size-cells = <0>;
560
561	/* HDMI */
562	port@1 {
563		reg = <1>;
564
565		dpi_out0: endpoint {
566			remote-endpoint = <&tfp410_in>;
567		};
568	};
569};
570