Revision tags: v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47 |
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27e2c657 |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Add missing #phy-cells property to USB PHYs USB PHYs must have a #phy-cells property, so add one to the Tegra USB PHYs which don't have one. Signed-off-by: Thierry
arm64: tegra: Add missing #phy-cells property to USB PHYs USB PHYs must have a #phy-cells property, so add one to the Tegra USB PHYs which don't have one. Signed-off-by: Thierry Reding <treding@nvidia.com>
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4473b1e8 |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Tegra132 EMC is not compatible with Tegra124 The external memory controller found on Tegra132 is not fully compatible with the instantiation on Tegra124, so remove the corr
arm64: tegra: Tegra132 EMC is not compatible with Tegra124 The external memory controller found on Tegra132 is not fully compatible with the instantiation on Tegra124, so remove the corresponding string from the list of compatible strings. Signed-off-by: Thierry Reding <treding@nvidia.com>
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abc9c8a5 |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Use sor0_out clock on Tegra132 The sor0_out clock is required to make eDP work properly. Signed-off-by: Thierry Reding <treding@nvidia.com>
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ef126bc4 |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Do not mark host1x as simple bus The host1x is not a simple bus, so drop the corresponding compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
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644c569d |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Use proper tuple notation Tuple boundaries should be marked by < and > to make it clear which cells are part of the same tuple. This also helps the json-schema based va
arm64: tegra: Use proper tuple notation Tuple boundaries should be marked by < and > to make it clear which cells are part of the same tuple. This also helps the json-schema based validation tooling to properly parse this data. While at it, also remove the "immovable" bit from PCI addresses. All of these addresses are in fact "movable". Signed-off-by: Thierry Reding <treding@nvidia.com>
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574d9cff |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Enable XUSB on Norrin Use the XUSB controller instead of the legacy EHCI controller to enable USB 3.0 support. Signed-off-by: Thierry Reding <treding@nvidia.com>
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67bb17f6 |
| 11-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Rename sdhci nodes to mmc The new json-schema based validation tools require SD/MMC controller nodes to be named mmc. Rename all references to them. Signed-off-by:
arm64: tegra: Rename sdhci nodes to mmc The new json-schema based validation tools require SD/MMC controller nodes to be named mmc. Rename all references to them. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19 |
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352092b0 |
| 07-Feb-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove parent clock from display controllers The display controller's parent clock depends on the output that's consuming data from the display controller, so it needs to b
arm64: tegra: Remove parent clock from display controllers The display controller's parent clock depends on the output that's consuming data from the display controller, so it needs to be specified as the parent of the corresponding output. The device tree bindings do specify this, so just correct the existing device trees that get this wrong. Signed-off-by: Thierry Reding <treding@nvidia.com>
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052d3f65 |
| 07-Feb-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Add interrupt-names for host1x Interrupt names are used to distinguish between the syncpoint and general host1x interrupts. Make sure they are available in the DT so th
arm64: tegra: Add interrupt-names for host1x Interrupt names are used to distinguish between the syncpoint and general host1x interrupts. Make sure they are available in the DT so that drivers can use them if necessary. Signed-off-by: Thierry Reding <treding@nvidia.com>
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01a9d523 |
| 07-Feb-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Add Tegra132 compatible string for host1x While the host1x controller found on Tegra132 is the same as on Tegra124 it is good practice to also list a SoC-specific compatibl
arm64: tegra: Add Tegra132 compatible string for host1x While the host1x controller found on Tegra132 is the same as on Tegra124 it is good practice to also list a SoC-specific compatible string so any SoC-specific quirks can be implemented in drivers if necessary. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12 |
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359ae651 |
| 14-Jan-2020 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
arm64: tegra: Add clock-cells property to Tegra PMC node Tegra132 and Tegra210 PMC blocks have clk_out_1, clk_out_2, clk_out_3, and a blink clock as a part of the PMC. These clo
arm64: tegra: Add clock-cells property to Tegra PMC node Tegra132 and Tegra210 PMC blocks have clk_out_1, clk_out_2, clk_out_3, and a blink clock as a part of the PMC. These clocks were erroneously provided by the clock and reset controller and are now provided by the PMC instead because that's where the primary controls are. Clock IDs for these clocks are defined in the PMC dt-bindings. This patch updates the device tree to include the PMC dt-bindings header and adds the #clock-cells property with one clock specifier to the PMC node. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7 |
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47cd385e |
| 22-Dec-2019 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Rename EMC on Tegra132 Rename the EMC node to external-memory-controller according to device tree best practices. Signed-off-by: Thierry Reding <treding@nvidia.com>
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0bab86ab |
| 22-Dec-2019 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Let the EMC hardware use the EMC clock The EMC hardware block needs access to the EMC clock in order to scale the external memory frequency. Add the clocks property so that
arm64: tegra: Let the EMC hardware use the EMC clock The EMC hardware block needs access to the EMC clock in order to scale the external memory frequency. Add the clocks property so that drivers for the EMC can acquire a reference to the EMC clock. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16 |
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31af04cd |
| 14-Jan-2019 |
Rob Herring <robh@kernel.org> |
arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently u
arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9, v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17, v4.16, v4.15, v4.13.16, v4.14 |
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b2441318 |
| 01-Nov-2017 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools
License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v4.13.5, v4.13, v4.12, v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5 |
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475d99fc |
| 21-Mar-2017 |
Rob Herring <robh@kernel.org> |
arm64: dts: nvidia: fix PCI bus dtc warnings dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwd
arm64: dts: nvidia: fix PCI bus dtc warnings dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
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18236a14 |
| 28-Mar-2017 |
Jon Hunter <jonathanh@nvidia.com> |
arm64: tegra: Update the Tegra132 flowctrl compatible string Update the Tegra132 flowctrl compatible string to include "nvidia,tegra132-flowctrl" so it is aligned with the flowctrl bindi
arm64: tegra: Update the Tegra132 flowctrl compatible string Update the Tegra132 flowctrl compatible string to include "nvidia,tegra132-flowctrl" so it is aligned with the flowctrl binding documentation. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v4.10.4, v4.10.3, v4.10.2, v4.10.1, v4.10, v4.9, openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31, v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22, v4.4.21, v4.7.4, v4.7.3, v4.4.20, v4.7.2, v4.4.19, openbmc-4.4-20160819-1, v4.7.1, v4.4.18, v4.4.17, openbmc-4.4-20160804-1, v4.4.16, v4.7, openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4, v4.6.3, v4.4.14, v4.6.2, v4.4.13, openbmc-20160606-1, v4.6.1, v4.4.12, openbmc-20160521-1, v4.4.11, openbmc-20160518-1, v4.6 |
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f4357938 |
| 11-May-2016 |
Wei Ni <wni@nvidia.com> |
arm64: tegra: set hot trips for Tegra132 Enable throttle function for SOC_THERM. Set "hot" trips for cpu and gpu thermal zones, which can trigger the SOC_THERM hardware throttle.
arm64: tegra: set hot trips for Tegra132 Enable throttle function for SOC_THERM. Set "hot" trips for cpu and gpu thermal zones, which can trigger the SOC_THERM hardware throttle. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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a6ebde25 |
| 11-May-2016 |
Wei Ni <wni@nvidia.com> |
arm64: tegra: set critical trips for Tegra132 Set general "critical" trip temperatures for cpu, gpu, mem and pllx thermal zones on Tegra132, these trips can trigger shut down or reset.
arm64: tegra: set critical trips for Tegra132 Set general "critical" trip temperatures for cpu, gpu, mem and pllx thermal zones on Tegra132, these trips can trigger shut down or reset. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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0fa2bfcd |
| 11-May-2016 |
Wei Ni <wni@nvidia.com> |
arm64: tegra: use tegra132-soctherm for Tegra132 The Tegra132 has the specific settings for soctherm, so change to use campatible "nvidia,tegra132-soctherm" for it. And adds cpu, gpu
arm64: tegra: use tegra132-soctherm for Tegra132 The Tegra132 has the specific settings for soctherm, so change to use campatible "nvidia,tegra132-soctherm" for it. And adds cpu, gpu, mem and pllx thermal zones. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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Revision tags: v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9, v4.4.8, v4.4.7, openbmc-20160329-2, openbmc-20160329-1, openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3, openbmc-20160222-1, v4.4.2, openbmc-20160212-1, openbmc-20160210-1, openbmc-20160202-2, openbmc-20160202-1, v4.4.1 |
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68cd8b2e |
| 27-Jan-2016 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Fix copy/paste typo in several DTS includes The comment about the 8250 vs. APB DMA-enabled UART devices that was added for Tegra20 and Tegra30 in commit b6551bb933f9 ("ARM:
arm64: tegra: Fix copy/paste typo in several DTS includes The comment about the 8250 vs. APB DMA-enabled UART devices that was added for Tegra20 and Tegra30 in commit b6551bb933f9 ("ARM: tegra: dts: add aliases and DMA requestor for serial controller") introduced a typo that has since spread to various other DTS include files. Fix all occurrences of this typo. Suggested-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
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be70771d |
| 11-Apr-2016 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove 0, prefix from unit-addresses When Tegra124 support was first merged the unit-addresses of all devices were listed with a "0," prefix to encode the reg property's se
arm64: tegra: Remove 0, prefix from unit-addresses When Tegra124 support was first merged the unit-addresses of all devices were listed with a "0," prefix to encode the reg property's second cell. It turns out that this notation is not correct, and the "," separator is only used to separate fields in the unit address (such as the device and function number in PCI devices), not individual cells for addresses with more than one cell. Signed-off-by: Thierry Reding <treding@nvidia.com>
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ef769e32 |
| 24-Feb-2016 |
Adam Buchbinder <adam.buchbinder@gmail.com> |
arm64: Fix misspellings in comments. Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Revision tags: openbmc-20160127-1, openbmc-20160120-1, v4.4, openbmc-20151217-1, openbmc-20151210-1, openbmc-20151202-1, openbmc-20151123-1, openbmc-20151118-1, openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2, v4.2-rc1, v4.1, v4.1-rc8, v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4 |
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34b4f6d0 |
| 13-May-2015 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Add Tegra132 support NVIDIA Tegra132 (also known as Tegra K1 64-bit) is a variant of Tegra124 but with 2 Denver CPUs instead of the 4+1 Cortex-A15. This adds the DTSI f
arm64: tegra: Add Tegra132 support NVIDIA Tegra132 (also known as Tegra K1 64-bit) is a variant of Tegra124 but with 2 Denver CPUs instead of the 4+1 Cortex-A15. This adds the DTSI file for the SoC, which is mostly similar to the one for Tegra124. Based on work by Allen Martin <amartin@nvidia.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Allen Martin <amartin@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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