#
7dbe78e5 |
| 21-Sep-2017 |
Jerome Brunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gx: adjust gpio-ranges for TEST_N
TEST_N has moved from the EE controller to the AO controller so the gpio-ranges need to adjusted for it
Signed-off-by: Jerome Brunet <jbrunet@bay
ARM64: dts: meson-gx: adjust gpio-ranges for TEST_N
TEST_N has moved from the EE controller to the AO controller so the gpio-ranges need to adjusted for it
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
352f72b4 |
| 21-Sep-2017 |
Jerome Brunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gx: remove gpio offset
Remove pin offset on the EE controller. Meson pinctrl no longer has this quirk
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilm
ARM64: dts: meson-gx: remove gpio offset
Remove pin offset on the EE controller. Meson pinctrl no longer has this quirk
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.13 |
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#
67e7607f |
| 31-Aug-2017 |
Jerome Brunet <jbrunet@baylibre.com> |
ARM64: dts: meson: add mmc clk gate pins
Add the pinctrl to switch mmc clk pins in gpio (pulled down) mode. This is necessary to be able to gate the clk outside of the SoC while keeping it running i
ARM64: dts: meson: add mmc clk gate pins
Add the pinctrl to switch mmc clk pins in gpio (pulled down) mode. This is necessary to be able to gate the clk outside of the SoC while keeping it running in the controller
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
50662499 |
| 31-Aug-2017 |
Jerome Brunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gx: Use correct mmc clock source 0
Now that the clock source 0 is properly described in the CCF, use it instead of assuming the default value (xtal)
Signed-off-by: Jerome Brunet <
ARM64: dts: meson-gx: Use correct mmc clock source 0
Now that the clock source 0 is properly described in the CCF, use it instead of assuming the default value (xtal)
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
b16c71c9 |
| 04-Aug-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: Add AO CEC nodes
This patch adds the AO CEC node in all the HDMI enabled boards DTS.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilm
ARM64: dts: meson-gx: Add AO CEC nodes
This patch adds the AO CEC node in all the HDMI enabled boards DTS.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
7fd2c355 |
| 04-Aug-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: update AO clkc to new bindings
The AO clkc needs to be updated to new bindings with an system control parent node and moving the clkc node as subnode.
Also adds the SoC specif
ARM64: dts: meson-gx: update AO clkc to new bindings
The AO clkc needs to be updated to new bindings with an system control parent node and moving the clkc node as subnode.
Also adds the SoC specific compatible following the bindings requirements.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.12 |
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#
f72d6f60 |
| 21-Jun-2017 |
Helmut Klein <hgkr.klein@gmail.com> |
ARM64: dts: meson-gx: use stable UART bindings with correct gate clock
This patch switches to the stable UART bindings but also add the correct gate clock to the non-AO UART nodes for GXBB and GXL S
ARM64: dts: meson-gx: use stable UART bindings with correct gate clock
This patch switches to the stable UART bindings but also add the correct gate clock to the non-AO UART nodes for GXBB and GXL SoCs.
Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Helmut Klein <hgkr.klein@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
fa808631 |
| 29-May-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: Add SPICC nodes
Add nodes for the SPICC controller on GX common dtsi, GXBB and GXL dtsi files.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hil
ARM64: dts: meson-gx: Add SPICC nodes
Add nodes for the SPICC controller on GX common dtsi, GXBB and GXL dtsi files.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
ec0a8260 |
| 24-May-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gxbb: Add SPI pinctrl nodes
This patch adds the SPICC Controller pins nodes for Amlogic GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hil
ARM64: dts: meson-gxbb: Add SPI pinctrl nodes
This patch adds the SPICC Controller pins nodes for Amlogic GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
a679f5d2 |
| 24-May-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gxbb: Add CEC pins nodes
Add the AO and EE domain CEC pins nodes for the Amlogic Meson GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilm
ARM64: dts: meson-gxbb: Add CEC pins nodes
Add the AO and EE domain CEC pins nodes for the Amlogic Meson GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
9ef366a4 |
| 23-May-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: Fix GXBB periphs pinctrl pull-enable register base
The pull-enable register base was wrongly copied from the meson8b pinctrl node, but was not used yet.
Fixes: c328666d58aa ("ARM64: dts
ARM64: dts: Fix GXBB periphs pinctrl pull-enable register base
The pull-enable register base was wrongly copied from the meson8b pinctrl node, but was not used yet.
Fixes: c328666d58aa ("ARM64: dts: amlogic: Add Meson GX dtsi from GXBB") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.10.17, v4.10.16 |
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#
8d7c7711 |
| 13-May-2017 |
Andreas Färber <afaerber@suse.de> |
arm64: dts: meson-gxbb: Fix node order
Sort nodes referenced by label alphabetically.
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5 |
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#
6939db7e |
| 21-Mar-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: Add support for HDMI output
Add HDMI output and connector nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
07a4652f |
| 26-Mar-2017 |
jbrunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gxbb: add spdif output pins
Add EE and AO domains pins for the spdif output to the gxbb device tree.
Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jb
ARM64: dts: meson-gxbb: add spdif output pins
Add EE and AO domains pins for the spdif output to the gxbb device tree.
Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
552b1e56 |
| 26-Mar-2017 |
jbrunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gxbb: add i2s output pins
Add EE and AO domains pins for the i2s output clocks and data to the gxbb device tree.
Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerom
ARM64: dts: meson-gxbb: add i2s output pins
Add EE and AO domains pins for the i2s output clocks and data to the gxbb device tree.
Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
18ae17bc |
| 23-Mar-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gxbb: Add gpio-ranges properties
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@
ARM64: dts: meson-gxbb: Add gpio-ranges properties
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
57ef5798 |
| 22-Mar-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL
The same Mali-450 MP3 GPU is present in the GXBB and GXL SoCs.
The node is simply added in the meson-gxbb.dtsi file.
For GXL, since a lot is s
ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL
The same Mali-450 MP3 GPU is present in the GXBB and GXL SoCs.
The node is simply added in the meson-gxbb.dtsi file.
For GXL, since a lot is shared with the GXM that has a Mali-T820 IP, this patch adds a new meson-gxl-mali.dtsi and is included in the SoC specific dtsi files.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [khilman: s/MALI/Mali in changelog] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.10.4, v4.10.3 |
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#
04b36df4 |
| 13-Mar-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: Finally move common nodes to GX dtsi
Since we know the GXBB and GXL/GXM share more hardware, we can safely move the remaining peripheral nodes present in the GXBB dtsi to the c
ARM64: dts: meson-gx: Finally move common nodes to GX dtsi
Since we know the GXBB and GXL/GXM share more hardware, we can safely move the remaining peripheral nodes present in the GXBB dtsi to the common GX dtsi.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.10.2, v4.10.1 |
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#
1b3f6d14 |
| 22-Feb-2017 |
Heiner Kallweit <hkallweit1@gmail.com> |
ARM64: dts: meson-gx: add clock CLKID_RNG0 to hwrng node
Add clock CLKID_RNG0 to HW randon number generator node.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Herbert Xu <he
ARM64: dts: meson-gx: add clock CLKID_RNG0 to hwrng node
Add clock CLKID_RNG0 to HW randon number generator node.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Revision tags: v4.10 |
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#
bd80ef5e |
| 22-Jan-2017 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson: meson-gx: add the SAR ADC
Add the SAR ADC to meson-gxbb.dtsi and meson-gxl.dtsi. GXBB provides a 10-bit ADC while GXL and GXM provide a 12-bit ADC. Some boards use resistor ladder
ARM64: dts: meson: meson-gx: add the SAR ADC
Add the SAR ADC to meson-gxbb.dtsi and meson-gxl.dtsi. GXBB provides a 10-bit ADC while GXL and GXM provide a 12-bit ADC. Some boards use resistor ladder buttons connected through one of the ADC channels. On newer devices (GXL and GXM) some boards use pull-ups/downs to change the resistance (and thus the ADC value) on one of the ADC channels to indicate the board revision.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
b949165c |
| 17-Jan-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
Add pinctrl nodes for HDMI HPD and DDC pins modes for Amlogic Meson GXL and GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> A
ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
Add pinctrl nodes for HDMI HPD and DDC pins modes for Amlogic Meson GXL and GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
261e1d5c |
| 15-Jan-2017 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson-gx: add the serial CTS and RTS pin groups
This adds pinctrl group nodes for the CTS and RTS pins of each serial controller. This makes it possible to enable the CTS and RTS pins wh
ARM64: dts: meson-gx: add the serial CTS and RTS pin groups
This adds pinctrl group nodes for the CTS and RTS pins of each serial controller. This makes it possible to enable the CTS and RTS pins which are controlled by the serial controller hardware (through the meson_uart driver).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
890a96a2 |
| 15-Jan-2017 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson-gx: add the missing uart_AO_B
This adds the missing node for the uart_AO_B port to the meson-gx.dtsi (as this is supported by GXBB, GXL and GXM) along with the required pinctrl pin
ARM64: dts: meson-gx: add the missing uart_AO_B
This adds the missing node for the uart_AO_B port to the meson-gx.dtsi (as this is supported by GXBB, GXL and GXM) along with the required pinctrl pins. This is required as some boards are using it (the boards from the Khadas VIM series for example have it exposed on the pin headers).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
f7bcd4b6 |
| 06-Jan-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gxbb-odroidc2: Disable SCPI DVFS
The current hardware is not able to run with all cores enabled at a cluster frequency superior at 1536MHz. But the currently shipped u-boot for the
ARM64: dts: meson-gxbb-odroidc2: Disable SCPI DVFS
The current hardware is not able to run with all cores enabled at a cluster frequency superior at 1536MHz. But the currently shipped u-boot for the platform still reports an OPP table with possible DVFS frequency up to 2GHz, and will not change since the off-tree linux tree supports limiting the OPPs with a kernel parameter. A recent u-boot change reports the boot-time DVFS around 100MHz and the default performance cpufreq governor sets the maximum frequency. Previous version of u-boot reported to be already at the max OPP and left the OPP as is. Nevertheless, other governors like ondemand could setup the max frequency and make the system crash.
This patch disables the DVFS clock and disables cpufreq.
Fixes: 70db166a2baa ("ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Revision tags: v4.9 |
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#
47961f13 |
| 02-Dec-2016 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson-gx: move the SCPI and SRAM nodes to meson-gx
SCPI and SRAM are identical on GXBB and GXL. Moving the corresponding nodes to meson-gx adds support for the thermal sensor on GXL base
ARM64: dts: meson-gx: move the SCPI and SRAM nodes to meson-gx
SCPI and SRAM are identical on GXBB and GXL. Moving the corresponding nodes to meson-gx adds support for the thermal sensor on GXL based devices.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> [khilman: add scpi_clocks label] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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