1/* 2 * Copyright (c) 2016 Andreas Färber 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43#include "meson-gx.dtsi" 44#include <dt-bindings/gpio/meson-gxbb-gpio.h> 45#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 46#include <dt-bindings/clock/gxbb-clkc.h> 47#include <dt-bindings/clock/gxbb-aoclkc.h> 48#include <dt-bindings/reset/gxbb-aoclkc.h> 49 50/ { 51 compatible = "amlogic,meson-gxbb"; 52 53 soc { 54 usb0_phy: phy@c0000000 { 55 compatible = "amlogic,meson-gxbb-usb2-phy"; 56 #phy-cells = <0>; 57 reg = <0x0 0xc0000000 0x0 0x20>; 58 resets = <&reset RESET_USB_OTG>; 59 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; 60 clock-names = "usb_general", "usb"; 61 status = "disabled"; 62 }; 63 64 usb1_phy: phy@c0000020 { 65 compatible = "amlogic,meson-gxbb-usb2-phy"; 66 #phy-cells = <0>; 67 reg = <0x0 0xc0000020 0x0 0x20>; 68 resets = <&reset RESET_USB_OTG>; 69 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; 70 clock-names = "usb_general", "usb"; 71 status = "disabled"; 72 }; 73 74 usb0: usb@c9000000 { 75 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; 76 reg = <0x0 0xc9000000 0x0 0x40000>; 77 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 78 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; 79 clock-names = "otg"; 80 phys = <&usb0_phy>; 81 phy-names = "usb2-phy"; 82 dr_mode = "host"; 83 status = "disabled"; 84 }; 85 86 usb1: usb@c9100000 { 87 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; 88 reg = <0x0 0xc9100000 0x0 0x40000>; 89 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 90 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; 91 clock-names = "otg"; 92 phys = <&usb1_phy>; 93 phy-names = "usb2-phy"; 94 dr_mode = "host"; 95 status = "disabled"; 96 }; 97 }; 98}; 99 100&cbus { 101 spifc: spi@8c80 { 102 compatible = "amlogic,meson-gxbb-spifc"; 103 reg = <0x0 0x08c80 0x0 0x80>; 104 #address-cells = <1>; 105 #size-cells = <0>; 106 clocks = <&clkc CLKID_SPI>; 107 status = "disabled"; 108 }; 109}; 110 111ðmac { 112 clocks = <&clkc CLKID_ETH>, 113 <&clkc CLKID_FCLK_DIV2>, 114 <&clkc CLKID_MPLL2>; 115 clock-names = "stmmaceth", "clkin0", "clkin1"; 116}; 117 118&aobus { 119 pinctrl_aobus: pinctrl@14 { 120 compatible = "amlogic,meson-gxbb-aobus-pinctrl"; 121 #address-cells = <2>; 122 #size-cells = <2>; 123 ranges; 124 125 gpio_ao: bank@14 { 126 reg = <0x0 0x00014 0x0 0x8>, 127 <0x0 0x0002c 0x0 0x4>, 128 <0x0 0x00024 0x0 0x8>; 129 reg-names = "mux", "pull", "gpio"; 130 gpio-controller; 131 #gpio-cells = <2>; 132 }; 133 134 uart_ao_a_pins: uart_ao_a { 135 mux { 136 groups = "uart_tx_ao_a", "uart_rx_ao_a"; 137 function = "uart_ao"; 138 }; 139 }; 140 141 uart_ao_b_pins: uart_ao_b { 142 mux { 143 groups = "uart_tx_ao_b", "uart_rx_ao_b"; 144 function = "uart_ao_b"; 145 }; 146 }; 147 148 remote_input_ao_pins: remote_input_ao { 149 mux { 150 groups = "remote_input_ao"; 151 function = "remote_input_ao"; 152 }; 153 }; 154 155 i2c_ao_pins: i2c_ao { 156 mux { 157 groups = "i2c_sck_ao", 158 "i2c_sda_ao"; 159 function = "i2c_ao"; 160 }; 161 }; 162 163 pwm_ao_a_3_pins: pwm_ao_a_3 { 164 mux { 165 groups = "pwm_ao_a_3"; 166 function = "pwm_ao_a_3"; 167 }; 168 }; 169 170 pwm_ao_a_6_pins: pwm_ao_a_6 { 171 mux { 172 groups = "pwm_ao_a_6"; 173 function = "pwm_ao_a_6"; 174 }; 175 }; 176 177 pwm_ao_a_12_pins: pwm_ao_a_12 { 178 mux { 179 groups = "pwm_ao_a_12"; 180 function = "pwm_ao_a_12"; 181 }; 182 }; 183 184 pwm_ao_b_pins: pwm_ao_b { 185 mux { 186 groups = "pwm_ao_b"; 187 function = "pwm_ao_b"; 188 }; 189 }; 190 }; 191 192 clkc_AO: clock-controller@040 { 193 compatible = "amlogic,gxbb-aoclkc"; 194 reg = <0x0 0x00040 0x0 0x4>; 195 #clock-cells = <1>; 196 #reset-cells = <1>; 197 }; 198 199 pwm_ab_AO: pwm@550 { 200 compatible = "amlogic,meson-gxbb-pwm"; 201 reg = <0x0 0x0550 0x0 0x10>; 202 #pwm-cells = <3>; 203 status = "disabled"; 204 }; 205 206 i2c_AO: i2c@500 { 207 compatible = "amlogic,meson-gxbb-i2c"; 208 reg = <0x0 0x500 0x0 0x20>; 209 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 210 clocks = <&clkc CLKID_AO_I2C>; 211 #address-cells = <1>; 212 #size-cells = <0>; 213 status = "disabled"; 214 }; 215}; 216 217&periphs { 218 pinctrl_periphs: pinctrl@4b0 { 219 compatible = "amlogic,meson-gxbb-periphs-pinctrl"; 220 #address-cells = <2>; 221 #size-cells = <2>; 222 ranges; 223 224 gpio: bank@4b0 { 225 reg = <0x0 0x004b0 0x0 0x28>, 226 <0x0 0x004e8 0x0 0x14>, 227 <0x0 0x00120 0x0 0x14>, 228 <0x0 0x00430 0x0 0x40>; 229 reg-names = "mux", "pull", "pull-enable", "gpio"; 230 gpio-controller; 231 #gpio-cells = <2>; 232 }; 233 234 emmc_pins: emmc { 235 mux { 236 groups = "emmc_nand_d07", 237 "emmc_cmd", 238 "emmc_clk", 239 "emmc_ds"; 240 function = "emmc"; 241 }; 242 }; 243 244 nor_pins: nor { 245 mux { 246 groups = "nor_d", 247 "nor_q", 248 "nor_c", 249 "nor_cs"; 250 function = "nor"; 251 }; 252 }; 253 254 sdcard_pins: sdcard { 255 mux { 256 groups = "sdcard_d0", 257 "sdcard_d1", 258 "sdcard_d2", 259 "sdcard_d3", 260 "sdcard_cmd", 261 "sdcard_clk"; 262 function = "sdcard"; 263 }; 264 }; 265 266 sdio_pins: sdio { 267 mux { 268 groups = "sdio_d0", 269 "sdio_d1", 270 "sdio_d2", 271 "sdio_d3", 272 "sdio_cmd", 273 "sdio_clk"; 274 function = "sdio"; 275 }; 276 }; 277 278 sdio_irq_pins: sdio_irq { 279 mux { 280 groups = "sdio_irq"; 281 function = "sdio"; 282 }; 283 }; 284 285 uart_a_pins: uart_a { 286 mux { 287 groups = "uart_tx_a", 288 "uart_rx_a"; 289 function = "uart_a"; 290 }; 291 }; 292 293 uart_b_pins: uart_b { 294 mux { 295 groups = "uart_tx_b", 296 "uart_rx_b"; 297 function = "uart_b"; 298 }; 299 }; 300 301 uart_c_pins: uart_c { 302 mux { 303 groups = "uart_tx_c", 304 "uart_rx_c"; 305 function = "uart_c"; 306 }; 307 }; 308 309 i2c_a_pins: i2c_a { 310 mux { 311 groups = "i2c_sck_a", 312 "i2c_sda_a"; 313 function = "i2c_a"; 314 }; 315 }; 316 317 i2c_b_pins: i2c_b { 318 mux { 319 groups = "i2c_sck_b", 320 "i2c_sda_b"; 321 function = "i2c_b"; 322 }; 323 }; 324 325 i2c_c_pins: i2c_c { 326 mux { 327 groups = "i2c_sck_c", 328 "i2c_sda_c"; 329 function = "i2c_c"; 330 }; 331 }; 332 333 eth_rgmii_pins: eth-rgmii { 334 mux { 335 groups = "eth_mdio", 336 "eth_mdc", 337 "eth_clk_rx_clk", 338 "eth_rx_dv", 339 "eth_rxd0", 340 "eth_rxd1", 341 "eth_rxd2", 342 "eth_rxd3", 343 "eth_rgmii_tx_clk", 344 "eth_tx_en", 345 "eth_txd0", 346 "eth_txd1", 347 "eth_txd2", 348 "eth_txd3"; 349 function = "eth"; 350 }; 351 }; 352 353 eth_rmii_pins: eth-rmii { 354 mux { 355 groups = "eth_mdio", 356 "eth_mdc", 357 "eth_clk_rx_clk", 358 "eth_rx_dv", 359 "eth_rxd0", 360 "eth_rxd1", 361 "eth_tx_en", 362 "eth_txd0", 363 "eth_txd1"; 364 function = "eth"; 365 }; 366 }; 367 368 pwm_a_x_pins: pwm_a_x { 369 mux { 370 groups = "pwm_a_x"; 371 function = "pwm_a_x"; 372 }; 373 }; 374 375 pwm_a_y_pins: pwm_a_y { 376 mux { 377 groups = "pwm_a_y"; 378 function = "pwm_a_y"; 379 }; 380 }; 381 382 pwm_b_pins: pwm_b { 383 mux { 384 groups = "pwm_b"; 385 function = "pwm_b"; 386 }; 387 }; 388 389 pwm_d_pins: pwm_d { 390 mux { 391 groups = "pwm_d"; 392 function = "pwm_d"; 393 }; 394 }; 395 396 pwm_e_pins: pwm_e { 397 mux { 398 groups = "pwm_e"; 399 function = "pwm_e"; 400 }; 401 }; 402 403 pwm_f_x_pins: pwm_f_x { 404 mux { 405 groups = "pwm_f_x"; 406 function = "pwm_f_x"; 407 }; 408 }; 409 410 pwm_f_y_pins: pwm_f_y { 411 mux { 412 groups = "pwm_f_y"; 413 function = "pwm_f_y"; 414 }; 415 }; 416 }; 417}; 418 419&hiubus { 420 clkc: clock-controller@0 { 421 compatible = "amlogic,gxbb-clkc"; 422 #clock-cells = <1>; 423 reg = <0x0 0x0 0x0 0x3db>; 424 }; 425}; 426 427&i2c_A { 428 clocks = <&clkc CLKID_I2C>; 429}; 430 431&i2c_B { 432 clocks = <&clkc CLKID_I2C>; 433}; 434 435&i2c_C { 436 clocks = <&clkc CLKID_I2C>; 437}; 438 439&sd_emmc_a { 440 clocks = <&clkc CLKID_SD_EMMC_A>, 441 <&xtal>, 442 <&clkc CLKID_FCLK_DIV2>; 443 clock-names = "core", "clkin0", "clkin1"; 444}; 445 446&sd_emmc_b { 447 clocks = <&clkc CLKID_SD_EMMC_B>, 448 <&xtal>, 449 <&clkc CLKID_FCLK_DIV2>; 450 clock-names = "core", "clkin0", "clkin1"; 451}; 452 453&sd_emmc_c { 454 clocks = <&clkc CLKID_SD_EMMC_C>, 455 <&xtal>, 456 <&clkc CLKID_FCLK_DIV2>; 457 clock-names = "core", "clkin0", "clkin1"; 458}; 459 460&vpu { 461 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; 462}; 463