Home
last modified time | relevance | path

Searched refs:new_val (Results 1 – 25 of 115) sorted by relevance

12345

/openbmc/linux/arch/arm/include/asm/
H A Dfloppy.h14 int new_val = (val); \
16 if (new_val & 0xf0) \
17 new_val = (new_val & 0x0c) | \
18 floppy_selects[new_val & 3]; \
20 new_val &= 0x0c; \
22 outb(new_val, (base) + (reg)); \
/openbmc/u-boot/arch/arm/mach-mvebu/
H A Defuse.c69 struct efuse_val *new_val, u32 mask0, u32 mask1) in do_prog_efuse() argument
80 val.dwords.d[0] |= (new_val->dwords.d[0] & mask0); in do_prog_efuse()
81 val.dwords.d[1] |= (new_val->dwords.d[1] & mask1); in do_prog_efuse()
82 val.lock |= new_val->lock; in do_prog_efuse()
94 static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1) in prog_efuse() argument
107 if (!new_val) in prog_efuse()
111 if (!new_val->lock) in prog_efuse()
115 if (new_val->bytes.d[7] & 0xFE) in prog_efuse()
118 if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1)) in prog_efuse()
123 res = do_prog_efuse(efuse, new_val, mask0, mask1); in prog_efuse()
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_pm_irq.c36 u32 new_val; in gen6_gt_pm_update_irq() local
42 new_val = gt->pm_imr; in gen6_gt_pm_update_irq()
43 new_val &= ~interrupt_mask; in gen6_gt_pm_update_irq()
44 new_val |= ~enabled_irq_mask & interrupt_mask; in gen6_gt_pm_update_irq()
46 if (new_val != gt->pm_imr) { in gen6_gt_pm_update_irq()
47 gt->pm_imr = new_val; in gen6_gt_pm_update_irq()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dtrace.h276 TP_PROTO(int id, char *reg_name, unsigned int reg, unsigned int new_val,
279 TP_ARGS(id, reg_name, reg, new_val, old_val, changed),
285 __field(unsigned int, new_val)
294 __entry->new_val = new_val;
300 __entry->id, __entry->buf, __entry->reg, __entry->new_val,
348 unsigned int old_val, unsigned int new_val),
350 TP_ARGS(old_id, new_id, action, reg, old_val, new_val),
358 __field(unsigned int, new_val)
367 __entry->new_val = new_val;
373 __entry->old_val, __entry->new_val)
/openbmc/qemu/target/riscv/
H A Dcsr.c1783 uint64_t new_val, uint64_t wr_mask) in rmw_mideleg64() argument
1791 env->mideleg = (env->mideleg & ~mask) | (new_val & mask); in rmw_mideleg64()
1802 target_ulong new_val, target_ulong wr_mask) in rmw_mideleg() argument
1807 ret = rmw_mideleg64(env, csrno, &rval, new_val, wr_mask); in rmw_mideleg()
1817 target_ulong new_val, in rmw_midelegh() argument
1824 ((uint64_t)new_val) << 32, ((uint64_t)wr_mask) << 32); in rmw_midelegh()
1834 uint64_t new_val, uint64_t wr_mask) in rmw_mie64() argument
1842 env->mie = (env->mie & ~mask) | (new_val & mask); in rmw_mie64()
1853 target_ulong new_val, target_ulong wr_mask) in rmw_mie() argument
1858 ret = rmw_mie64(env, csrno, &rval, new_val, wr_mask); in rmw_mie()
[all …]
H A Ddebug.c528 target_ulong new_val; in type2_reg_write() local
532 new_val = type2_mcontrol_validate(env, val); in type2_reg_write()
533 if (new_val != env->tdata1[index]) { in type2_reg_write()
534 env->tdata1[index] = new_val; in type2_reg_write()
644 target_ulong new_val; in type6_reg_write() local
648 new_val = type6_mcontrol6_validate(env, val); in type6_reg_write()
649 if (new_val != env->tdata1[index]) { in type6_reg_write()
650 env->tdata1[index] = new_val; in type6_reg_write()
822 target_ulong new_val; in itrigger_reg_write() local
827 new_val = itrigger_validate(env, val); in itrigger_reg_write()
[all …]
/openbmc/qemu/hw/intc/
H A Driscv_imsic.c92 target_ulong new_val, in riscv_imsic_eidelivery_rmw() argument
102 imsic->eidelivery[page] = (old_val & ~wr_mask) | (new_val & wr_mask); in riscv_imsic_eidelivery_rmw()
110 target_ulong new_val, in riscv_imsic_eithreshold_rmw() argument
120 imsic->eithreshold[page] = (old_val & ~wr_mask) | (new_val & wr_mask); in riscv_imsic_eithreshold_rmw()
127 target_ulong *val, target_ulong new_val, in riscv_imsic_topei_rmw() argument
153 target_ulong new_val, target_ulong wr_mask) in riscv_imsic_eix_rmw() argument
183 if (new_val & mask) { in riscv_imsic_eix_rmw()
201 target_ulong new_val, target_ulong wr_mask) in riscv_imsic_rmw() argument
237 new_val, wr_mask); in riscv_imsic_rmw()
240 new_val, wr_mask); in riscv_imsic_rmw()
[all …]
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_dcb.c1712 u32 new_val; in i40e_dcb_hw_rx_pb_config() local
1723 new_val = new_pb_cfg->shared_pool_low_wm; in i40e_dcb_hw_rx_pb_config()
1724 if (new_val < old_val) { in i40e_dcb_hw_rx_pb_config()
1727 reg |= (new_val << I40E_PRTRPB_SLW_SLW_SHIFT) & in i40e_dcb_hw_rx_pb_config()
1737 new_val = new_pb_cfg->shared_pool_low_thresh[i]; in i40e_dcb_hw_rx_pb_config()
1738 if (new_val < old_val) { in i40e_dcb_hw_rx_pb_config()
1741 reg |= (new_val << I40E_PRTRPB_SLT_SLT_TCN_SHIFT) & in i40e_dcb_hw_rx_pb_config()
1747 new_val = new_pb_cfg->tc_pool_low_wm[i]; in i40e_dcb_hw_rx_pb_config()
1748 if (new_val < old_val) { in i40e_dcb_hw_rx_pb_config()
1751 reg |= (new_val << I40E_PRTRPB_DLW_DLW_TCN_SHIFT) & in i40e_dcb_hw_rx_pb_config()
[all …]
/openbmc/qemu/hw/timer/
H A Dhpet.c498 uint64_t old_val, new_val, cleared; in hpet_ram_write() local
516 new_val = deposit64(old_val, shift, len, value); in hpet_ram_write()
517 new_val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); in hpet_ram_write()
518 if (deactivating_bit(old_val, new_val, HPET_TN_TYPE_LEVEL)) { in hpet_ram_write()
525 timer->config = new_val; in hpet_ram_write()
526 if (activating_bit(old_val, new_val, HPET_TN_ENABLE) in hpet_ram_write()
530 if (new_val & HPET_TN_32BIT) { in hpet_ram_write()
575 new_val = deposit64(old_val, shift, len, value); in hpet_ram_write()
576 new_val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK); in hpet_ram_write()
577 s->config = new_val; in hpet_ram_write()
[all …]
/openbmc/qemu/hw/core/
H A Dregister.c74 uint64_t old_val, new_val, test, no_w_mask; in register_write() local
107 new_val = (val & ~no_w_mask) | (old_val & no_w_mask); in register_write()
108 new_val &= ~(val & ac->w1c); in register_write()
111 new_val = ac->pre_write(reg, new_val); in register_write()
116 new_val); in register_write()
119 register_write_val(reg, new_val); in register_write()
122 ac->post_write(reg, new_val); in register_write()
/openbmc/linux/arch/sparc/kernel/
H A Dprom_common.c54 void *new_val; in of_set_property() local
57 new_val = kmemdup(val, len, GFP_KERNEL); in of_set_property()
58 if (!new_val) in of_set_property()
77 prop->value = new_val; in of_set_property()
/openbmc/linux/tools/lib/bpf/
H A Drelo_core.c889 res->new_val = 0; in bpf_core_calc_relo()
901 &res->new_val, &res->new_sz, in bpf_core_calc_relo()
944 err = err ?: bpf_core_calc_type_relo(relo, targ_spec, &res->new_val, NULL); in bpf_core_calc_relo()
947 err = err ?: bpf_core_calc_enumval_relo(relo, targ_spec, &res->new_val); in bpf_core_calc_relo()
1028 __u64 orig_val, new_val; in bpf_core_patch_insn() local
1045 new_val = res->new_val; in bpf_core_patch_insn()
1056 (unsigned long long)new_val); in bpf_core_patch_insn()
1060 insn->imm = new_val; in bpf_core_patch_insn()
1063 (unsigned long long)orig_val, (unsigned long long)new_val); in bpf_core_patch_insn()
1071 (unsigned long long)new_val); in bpf_core_patch_insn()
[all …]
/openbmc/linux/drivers/mfd/
H A Dintel_pmc_bxt.c110 u32 new_val; in intel_pmc_gcr_update() local
116 new_val = readl(pmc->gcr_mem_base + offset); in intel_pmc_gcr_update()
118 new_val = (new_val & ~mask) | (val & mask); in intel_pmc_gcr_update()
119 writel(new_val, pmc->gcr_mem_base + offset); in intel_pmc_gcr_update()
121 new_val = readl(pmc->gcr_mem_base + offset); in intel_pmc_gcr_update()
125 return (new_val & mask) != (val & mask) ? -EIO : 0; in intel_pmc_gcr_update()
/openbmc/linux/arch/riscv/kvm/
H A Daia.c212 unsigned long new_val, in kvm_riscv_vcpu_aia_rmw_topei() argument
224 val, new_val, wr_mask); in kvm_riscv_vcpu_aia_rmw_topei()
333 unsigned long *val, unsigned long new_val, in aia_rmw_iprio() argument
358 new_val = (old_val & ~wr_mask) | (new_val & wr_mask); in aia_rmw_iprio()
360 prio = (new_val >> (TOPI_IPRIO_BITS * i)) & in aia_rmw_iprio()
370 unsigned long *val, unsigned long new_val, in kvm_riscv_vcpu_aia_rmw_ireg() argument
382 return aia_rmw_iprio(vcpu, isel, val, new_val, wr_mask); in kvm_riscv_vcpu_aia_rmw_ireg()
385 return kvm_riscv_vcpu_aia_imsic_rmw(vcpu, isel, val, new_val, in kvm_riscv_vcpu_aia_rmw_ireg()
H A Dvcpu_insn.c212 unsigned long *val, unsigned long new_val,
257 ulong val = 0, wr_mask = 0, new_val = 0; in csr_insn() local
263 new_val = rs1_val; in csr_insn()
267 new_val = -1UL; in csr_insn()
271 new_val = 0; in csr_insn()
275 new_val = rs1_num; in csr_insn()
279 new_val = -1UL; in csr_insn()
283 new_val = 0; in csr_insn()
295 run->riscv_csr.new_value = new_val; in csr_insn()
311 rc = cfn->func(vcpu, csr_num, &val, new_val, wr_mask); in csr_insn()
/openbmc/linux/drivers/gpio/
H A Dgpio-it87.c131 u8 new_val = curr_val | mask; in superio_set_mask() local
133 if (curr_val != new_val) in superio_set_mask()
134 superio_outb(new_val, reg); in superio_set_mask()
140 u8 new_val = curr_val & ~mask; in superio_clear_mask() local
142 if (curr_val != new_val) in superio_clear_mask()
143 superio_outb(new_val, reg); in superio_clear_mask()
H A Dgpio-ath79.c58 u32 old_val, new_val; in ath79_gpio_update_bits() local
61 new_val = (old_val & ~mask) | (bits & mask); in ath79_gpio_update_bits()
63 if (new_val != old_val) in ath79_gpio_update_bits()
64 ath79_gpio_write(ctrl, reg, new_val); in ath79_gpio_update_bits()
66 return new_val != old_val; in ath79_gpio_update_bits()
/openbmc/linux/drivers/base/regmap/
H A Dregmap-debugfs.c465 bool new_val, require_sync = false; in regmap_cache_only_write_file() local
468 err = kstrtobool_from_user(user_buf, count, &new_val); in regmap_cache_only_write_file()
479 if (new_val && !map->cache_only) { in regmap_cache_only_write_file()
482 } else if (!new_val && map->cache_only) { in regmap_cache_only_write_file()
486 map->cache_only = new_val; in regmap_cache_only_write_file()
512 bool new_val; in regmap_cache_bypass_write_file() local
515 err = kstrtobool_from_user(user_buf, count, &new_val); in regmap_cache_bypass_write_file()
526 if (new_val && !map->cache_bypass) { in regmap_cache_bypass_write_file()
529 } else if (!new_val && map->cache_bypass) { in regmap_cache_bypass_write_file()
532 map->cache_bypass = new_val; in regmap_cache_bypass_write_file()
/openbmc/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx1-core.c95 u32 new_val; in imx1_write_2bit() local
108 new_val = value & 0x3; /* Make sure value is really 2 bit */ in imx1_write_2bit()
109 new_val <<= offset; in imx1_write_2bit()
110 new_val |= old_val;/* Set new state for pin_id */ in imx1_write_2bit()
112 writel(new_val, reg); in imx1_write_2bit()
122 u32 new_val; in imx1_write_bit() local
128 new_val = value & 0x1; /* Make sure value is really 1 bit */ in imx1_write_bit()
129 new_val <<= offset; in imx1_write_bit()
130 new_val |= old_val;/* Set new state for pin_id */ in imx1_write_bit()
132 writel(new_val, reg); in imx1_write_bit()
/openbmc/linux/include/linux/
H A Dvmw_vmci_defs.h817 static inline void vmci_q_set_pointer(u64 *var, u64 new_val) in vmci_q_set_pointer() argument
820 WRITE_ONCE(*(unsigned long *)var, (unsigned long)new_val); in vmci_q_set_pointer()
829 u64 new_val = vmci_q_read_pointer(var); in vmci_qp_add_pointer() local
831 if (new_val >= size - add) in vmci_qp_add_pointer()
832 new_val -= size; in vmci_qp_add_pointer()
834 new_val += add; in vmci_qp_add_pointer()
836 vmci_q_set_pointer(var, new_val); in vmci_qp_add_pointer()
/openbmc/linux/drivers/ata/
H A Dahci_st.c41 unsigned long old_val, new_val; in st_ahci_configure_oob() local
43 new_val = (0x02 << ST_AHCI_OOBR_CWMIN_SHIFT) | in st_ahci_configure_oob()
50 writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR); in st_ahci_configure_oob()
51 writel(new_val, mmio + ST_AHCI_OOBR); in st_ahci_configure_oob()
/openbmc/qemu/hw/remote/
H A Dproxy.c295 uint32_t orig_val, new_val, base_class, val; in probe_pci_info() local
342 new_val = 0xffffffff; in probe_pci_info()
343 config_op_send(pdev, PCI_BASE_ADDRESS_0 + (4 * i), &new_val, 4, in probe_pci_info()
345 config_op_send(pdev, PCI_BASE_ADDRESS_0 + (4 * i), &new_val, 4, in probe_pci_info()
347 size = (~(new_val & 0xFFFFFFF0)) + 1; in probe_pci_info()
350 type = (new_val & 0x1) ? in probe_pci_info()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_irq.c42 u32 new_val; in ilk_update_display_irq() local
47 new_val = dev_priv->irq_mask; in ilk_update_display_irq()
48 new_val &= ~interrupt_mask; in ilk_update_display_irq()
49 new_val |= (~enabled_irq_mask & interrupt_mask); in ilk_update_display_irq()
51 if (new_val != dev_priv->irq_mask && in ilk_update_display_irq()
53 dev_priv->irq_mask = new_val; in ilk_update_display_irq()
78 u32 new_val; in bdw_update_port_irq() local
90 new_val = old_val; in bdw_update_port_irq()
91 new_val &= ~interrupt_mask; in bdw_update_port_irq()
92 new_val |= (~enabled_irq_mask & interrupt_mask); in bdw_update_port_irq()
[all …]
/openbmc/linux/drivers/regulator/
H A Dmax8997-regulator.c539 u8 new_val, int *best) in max8997_assess_side_effect() argument
575 if (new_val != (buckx_val[rid])[i]) { in max8997_assess_side_effect()
621 int new_val, new_idx, damage, tmp_val, tmp_idx, tmp_dmg; in max8997_set_voltage_buck() local
647 new_val = max8997_get_voltage_proper_val(desc, min_uV, max_uV); in max8997_set_voltage_buck()
648 if (new_val < 0) in max8997_set_voltage_buck()
649 return new_val; in max8997_set_voltage_buck()
655 damage = max8997_assess_side_effect(rdev, new_val, &new_idx); in max8997_set_voltage_buck()
661 tmp_val = new_val; in max8997_set_voltage_buck()
665 new_val++; in max8997_set_voltage_buck()
666 } while (desc->min + desc->step * new_val <= desc->max); in max8997_set_voltage_buck()
[all …]
/openbmc/linux/arch/riscv/include/asm/
H A Dkvm_aia.h98 unsigned long *val, unsigned long new_val,
142 unsigned long new_val,
145 unsigned long *val, unsigned long new_val,

12345