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Searched refs:bic (Results 1 – 25 of 211) sorted by relevance

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/openbmc/linux/arch/arm/mach-at91/
H A Dpm_suspend.S105 bic r9, r9, #AT91_SFRBU_25LDOCR_LP
138 bic tmp1, tmp1, #0x1
142 bic tmp1, tmp1, #0x1
146 bic tmp1, tmp1, #0x1
150 bic tmp1, tmp1, #0x1
154 bic tmp1, tmp1, #0x1
172 bic tmp1, tmp1, #~UDDRC_STAT_SELFREF_TYPE_MSK
182 bic tmp1, tmp1, DDR3PHY_ACDLLCR_DLLSRST
224 bic tmp1, tmp1, #DDR3PHY_DXCCR_DXPDR
229 bic tmp1, tmp1, #DDR3PHY_ACIORC_ACPDD
[all …]
/openbmc/linux/arch/arm/mach-sa1100/
H A Dsleep.S86 bic r3, r3, #FMsk(MSC_RT)
87 bic r3, r3, #FMsk(MSC_RT)<<16
90 bic r4, r4, #FMsk(MSC_RT)
91 bic r4, r4, #FMsk(MSC_RT)<<16
94 bic r5, r5, #FMsk(MSC_RT)
95 bic r5, r5, #FMsk(MSC_RT)<<16
98 bic r7, r7, #0x0000FF00
99 bic r7, r7, #0x000000F0
104 bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
105 bic r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
[all …]
/openbmc/u-boot/arch/arm/mach-orion5x/
H A Dlowlevel_init.S175 bic r0, r0, #SDRAM_PAD_CTRL_WR_EN
176 bic r0, r0, #SDRAM_PAD_CTRL_TUNE_EN
177 bic r0, r0, #SDRAM_PAD_CTRL_DRVN_MASK
178 bic r0, r0, #SDRAM_PAD_CTRL_DRVP_MASK
197 bic r0, r0, #SDRAM_PAD_CTRL_WR_EN
198 bic r0, r0, #SDRAM_PAD_CTRL_TUNE_EN
199 bic r0, r0, #SDRAM_PAD_CTRL_DRVN_MASK
200 bic r0, r0, #SDRAM_PAD_CTRL_DRVP_MASK
224 bic r0, r0, #SDRAM_PAD_CTRL_WR_EN
225 bic r0, r0, #SDRAM_PAD_CTRL_DRV_STR_MASK
[all …]
/openbmc/linux/arch/arm/mach-davinci/
H A Dsleep.S54 bic ip, ip, #DDR2_SRPD_BIT
74 bic ip, ip, #PLLDIV_EN
79 bic ip, ip, #PLLCTL_PLLENSRC
80 bic ip, ip, #PLLCTL_PLLEN
103 bic ip, ip, #DEEPSLEEP_SLEEPENABLE_BIT
110 bic ip, ip, #PLLCTL_PLLRST
115 bic ip, ip, #PLLCTL_PLLPWRDN
134 bic ip, ip, #PLLCTL_PLLENSRC
155 bic ip, ip, #DDR2_MCLKSTOPEN_BIT
159 bic ip, ip, #DDR2_LPMODEN_BIT
[all …]
/openbmc/u-boot/board/samsung/goni/
H A Dlowlevel_init.S56 bic r1, r1, #(0xf << 4) @ 1 * 4-bit
61 bic r1, r1, #(1 << 1)
88 bic r1, r1, #0x1
93 bic r1, r1, #0x1
98 bic r1, r1, #0x1
103 bic r1, r1, #0x1
108 bic r1, r1, #0x1
113 bic r1, r1, #0x1
118 bic r1, r1, #0x1
123 bic r1, r1, #0x1
[all …]
/openbmc/linux/block/
H A Dbfq-iosched.c379 struct bfq_queue *bic_to_bfqq(struct bfq_io_cq *bic, bool is_sync, in bic_to_bfqq() argument
383 return bic->bfqq[1][actuator_idx]; in bic_to_bfqq()
385 return bic->bfqq[0][actuator_idx]; in bic_to_bfqq()
390 void bic_set_bfqq(struct bfq_io_cq *bic, in bic_set_bfqq() argument
395 struct bfq_queue *old_bfqq = bic->bfqq[is_sync][actuator_idx]; in bic_set_bfqq()
399 * bic->bfqq and bfqq is happening here. This causes troubles in bic_set_bfqq()
400 * in the following case: bic->bfqq has also been scheduled in bic_set_bfqq()
401 * for a possible stable merge with bic->stable_merge_bfqq, in bic_set_bfqq()
402 * and bic->stable_merge_bfqq == bfqq happens to in bic_set_bfqq()
405 * bic in bic_set_bfqq()
436 bic_to_bfqd(struct bfq_io_cq * bic) bic_to_bfqd() argument
586 bfqq_request_over_limit(struct bfq_data * bfqd,struct bfq_io_cq * bic,blk_opf_t opf,unsigned int act_idx,int limit) bfqq_request_over_limit() argument
678 bfqq_request_over_limit(struct bfq_data * bfqd,struct bfq_io_cq * bic,blk_opf_t opf,unsigned int act_idx,int limit) bfqq_request_over_limit() argument
703 struct bfq_io_cq *bic = bfq_bic_lookup(data->q); bfq_limit_depth() local
1145 bfq_bfqq_resume_state(struct bfq_queue * bfqq,struct bfq_data * bfqd,struct bfq_io_cq * bic,bool bfq_already_existing) bfq_bfqq_resume_state() argument
2468 struct bfq_io_cq *bic = bfq_bic_lookup(q); bfq_bio_merge() local
2918 bfq_setup_cooperator(struct bfq_data * bfqd,struct bfq_queue * bfqq,void * io_struct,bool request,struct bfq_io_cq * bic) bfq_setup_cooperator() argument
3053 struct bfq_io_cq *bic = bfqq->bic; bfq_bfqq_save_state() local
3144 bfq_merge_bfqqs(struct bfq_data * bfqd,struct bfq_io_cq * bic,struct bfq_queue * bfqq) bfq_merge_bfqqs() argument
5464 bfq_exit_icq_bfqq(struct bfq_io_cq * bic,bool is_sync,unsigned int actuator_idx) bfq_exit_icq_bfqq() argument
5481 struct bfq_io_cq *bic = icq_to_bic(icq); bfq_exit_icq() local
5520 bfq_set_next_ioprio_data(struct bfq_queue * bfqq,struct bfq_io_cq * bic) bfq_set_next_ioprio_data() argument
5574 bfq_check_ioprio_change(struct bfq_io_cq * bic,struct bio * bio) bfq_check_ioprio_change() argument
5604 bfq_init_bfqq(struct bfq_data * bfqd,struct bfq_queue * bfqq,struct bfq_io_cq * bic,pid_t pid,int is_sync,unsigned int act_idx) bfq_init_bfqq() argument
5694 bfq_do_early_stable_merge(struct bfq_data * bfqd,struct bfq_queue * bfqq,struct bfq_io_cq * bic,struct bfq_queue * last_bfqq_created) bfq_do_early_stable_merge() argument
5766 bfq_do_or_sched_stable_merge(struct bfq_data * bfqd,struct bfq_queue * bfqq,struct bfq_io_cq * bic) bfq_do_or_sched_stable_merge() argument
5845 bfq_get_queue(struct bfq_data * bfqd,struct bio * bio,bool is_sync,struct bfq_io_cq * bic,bool respawn) bfq_get_queue() argument
5959 bfq_update_has_short_ttime(struct bfq_data * bfqd,struct bfq_queue * bfqq,struct bfq_io_cq * bic) bfq_update_has_short_ttime() argument
6732 bfq_split_bfqq(struct bfq_io_cq * bic,struct bfq_queue * bfqq) bfq_split_bfqq() argument
6752 bfq_get_bfqq_handle_split(struct bfq_data * bfqd,struct bfq_io_cq * bic,struct bio * bio,bool split,bool is_sync,bool * new_queue) bfq_get_bfqq_handle_split() argument
6887 struct bfq_io_cq *bic; bfq_init_rq() local
[all...]
/openbmc/linux/arch/arc/lib/
H A Dstrchr-700.S38 bic r12,r12,r6
47 bic r2,r7,r6
65 bic r12,r12,r6
75 bic r3,r3,r7
87 bic r3,r3,r6
103 bic r2,r7,r6
119 bic r12,r2,r12
120 bic.f r3,r4,r12
/openbmc/qemu/hw/arm/
H A Dfby35.c31 Aspeed10x0SoCState bic; member
124 object_initialize_child(OBJECT(s), "bic", &s->bic, "ast1030-a1"); in fby35_bic_init()
125 soc = ASPEED_SOC(&s->bic); in fby35_bic_init()
127 memory_region_init(&s->bic_memory, OBJECT(&s->bic), "bic-memory", in fby35_bic_init()
130 qdev_connect_clock_in(DEVICE(&s->bic), "sysclk", s->bic_sysclk); in fby35_bic_init()
131 object_property_set_link(OBJECT(&s->bic), "memory", OBJECT(&s->bic_memory), in fby35_bic_init()
134 qdev_realize(DEVICE(&s->bic), NULL, &error_abort); in fby35_bic_init()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/
H A Dstart.S41 bic r0,r0,#0x1f
90 bic r0, r0, #0x00000300 /* clear bits 9:8 (---- --RS) */
91 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
95 bic r0, r0, #0x00002000 /* clear bit 13 (--V- ----) */
/openbmc/linux/arch/arm64/lib/
H A Dstrncmp.S117 bic data1, data1, mask
118 bic data2, data2, mask
140 bic has_nul, tmp1, tmp2
164 bic src1, src1, #7
165 bic src2, src2, #7
234 bic src2, src2, #0xf
254 bic has_nul, has_nul, tmp3 /* Non-zero if NUL byte found in SRC1. */
274 bic has_nul, has_nul, tmp3 /* Non-zero if NUL terminator. */
280 bic syndrome, syndrome, mask /* Ignore later bytes. */
H A Dstrlen.S101 bic has_nul2, tmp3, tmp4
119 bic src, srcin, 15
141 bic has_nul2, tmp3, tmp4
156 bic has_nul1, tmp1, tmp2
175 bic has_nul2, tmp3, tmp4
184 bic has_nul2, tmp3, tmp4
193 bic src, srcin, 15
/openbmc/qemu/tests/tcg/aarch64/system/
H A Dboot.S108 bic x1, x1, #(1 << 30) - 1 /* 1GB alignment*/
121 bic x1, x1, #(1 << 21) - 1 /* 2mb block alignment */
131 bic x1, x1, #(1 << 21) - 1 /* 2mb block alignment */
141 bic x1, x1, #(1 << 21) - 1
184 bic x0, x0, #(1 << 1) /* clear bit A(1) */
185 bic x0, x0, #(1 << 19) /* clear WXN */
/openbmc/linux/arch/arm/mm/
H A Dtlb-v4wb.S39 bic r0, r0, #0x0ff
40 bic r0, r0, #0xf00
59 bic r0, r0, #0x0ff
60 bic r0, r0, #0xf00
H A Dtlb-v4wbi.S37 bic r0, r0, #0x0ff
38 bic r0, r0, #0xf00
50 bic r0, r0, #0x0ff
51 bic r0, r0, #0xf00
H A Dtlb-fa.S41 bic r0, r0, #0x0ff
42 bic r0, r0, #0xf00
54 bic r0, r0, #0x0ff
55 bic r0, r0, #0xf00
H A Dproc-arm720.S44 bic r0, r0, #0x1000 @ ...i............
45 bic r0, r0, #0x000e @ ............wca.
98 bic ip, ip, #0x000f @ ............wcam
99 bic ip, ip, #0x2100 @ ..v....s........
114 bic r0, r0, r5
143 bic r0, r0, r5
H A Dproc-arm1020e.S67 bic r0, r0, #0x1000 @ ...i............
68 bic r0, r0, #0x000e @ ............wca.
91 bic ip, ip, #0x000f @ ............wcam
92 bic ip, ip, #0x1100 @ ...i...s........
210 bic r0, r0, #CACHE_DLINESIZE - 1
263 bic r0, r0, #CACHE_DLINESIZE - 1
288 bic r0, r0, #CACHE_DLINESIZE - 1
308 bic r0, r0, #CACHE_DLINESIZE - 1
423 bic r0, r0, r5
H A Dproc-arm922.S61 bic r0, r0, #0x1000 @ ...i............
62 bic r0, r0, #0x000e @ ............wca.
85 bic ip, ip, #0x000f @ ............wcam
86 bic ip, ip, #0x1100 @ ...i...s........
194 bic r0, r0, #CACHE_DLINESIZE - 1
239 bic r0, r0, #CACHE_DLINESIZE - 1
261 bic r0, r0, #CACHE_DLINESIZE - 1
278 bic r0, r0, #CACHE_DLINESIZE - 1
388 bic r0, r0, r5
H A Dproc-arm1022.S67 bic r0, r0, #0x1000 @ ...i............
68 bic r0, r0, #0x000e @ ............wca.
91 bic ip, ip, #0x000f @ ............wcam
92 bic ip, ip, #0x1100 @ ...i...s........
210 bic r0, r0, #CACHE_DLINESIZE - 1
263 bic r0, r0, #CACHE_DLINESIZE - 1
288 bic r0, r0, #CACHE_DLINESIZE - 1
308 bic r0, r0, #CACHE_DLINESIZE - 1
416 bic r0, r0, r5
H A Dproc-arm1026.S67 bic r0, r0, #0x1000 @ ...i............
68 bic r0, r0, #0x000e @ ............wca.
91 bic ip, ip, #0x000f @ ............wcam
92 bic ip, ip, #0x1100 @ ...i...s........
204 bic r0, r0, #CACHE_DLINESIZE - 1
257 bic r0, r0, #CACHE_DLINESIZE - 1
282 bic r0, r0, #CACHE_DLINESIZE - 1
302 bic r0, r0, #CACHE_DLINESIZE - 1
410 bic r0, r0, r5
H A Dproc-fa526.S37 bic r0, r0, #0x1000 @ ...i............
38 bic r0, r0, #0x000e @ ............wca.
64 bic ip, ip, #0x000f @ ............wcam
65 bic ip, ip, #0x1100 @ ...i...s........
66 bic ip, ip, #0x0800 @ BTB off
157 bic r0, r0, r5
/openbmc/u-boot/arch/arm/cpu/pxa/
H A Dstart.S44 bic r0,r0,#0x1f
108 bic r0, r0, #0x00003300 @ clear bits 13:12, 9:8 (--VI --RS)
109 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
139 bic r0, #0x1b00
140 bic r0, #0x0087
/openbmc/u-boot/arch/arm/cpu/arm946es/
H A Dstart.S40 bic r0,r0,#0x1f
86 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
87 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
/openbmc/u-boot/arch/arm/mach-aspeed/ast2400/
H A Dplatform.S122 bic r1, r1, #0xFFFBFFFF
130 bic r1, r1, #0x00000F00
140 bic r2, r1, #0xFFFFFF00
144 bic r2, r1, #0xFFFF00FF
153 bic r2, r1, #0xFF00FFFF
158 bic r2, r1, #0x00FFFFFF
189 bic r1, r1, #0xFF
213 bic r1, r1, #0x0000F000
333 bic r1, r1, #0xFFFFFFBF
431 bic r1, r1, #0x00000F00
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dmx6_plugin.S94 bic r0, r0, #(1 << 2) /* disable D Cache */
95 bic r0, r0, #0x1 /* clear bit 0 ; MMU off */
97 bic r0, r0, #(0x1 << 11) /* disable Z, branch prediction */
98 bic r0, r0, #(0x1 << 1) /* disable A, Strict alignment */

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