1*d2912cb1SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 228853ac8SPaulius Zaleckas/* 328853ac8SPaulius Zaleckas * linux/arch/arm/mm/tlb-fa.S 428853ac8SPaulius Zaleckas * 528853ac8SPaulius Zaleckas * Copyright (C) 2005 Faraday Corp. 628853ac8SPaulius Zaleckas * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> 728853ac8SPaulius Zaleckas * 828853ac8SPaulius Zaleckas * Based on tlb-v4wbi.S: 928853ac8SPaulius Zaleckas * Copyright (C) 1997-2002 Russell King 1028853ac8SPaulius Zaleckas * 1128853ac8SPaulius Zaleckas * ARM architecture version 4, Faraday variation. 1228853ac8SPaulius Zaleckas * This assume an unified TLBs, with a write buffer, and branch target buffer (BTB) 1328853ac8SPaulius Zaleckas * 1428853ac8SPaulius Zaleckas * Processors: FA520 FA526 FA626 1528853ac8SPaulius Zaleckas */ 1628853ac8SPaulius Zaleckas#include <linux/linkage.h> 1728853ac8SPaulius Zaleckas#include <linux/init.h> 186ebbf2ceSRussell King#include <asm/assembler.h> 1928853ac8SPaulius Zaleckas#include <asm/asm-offsets.h> 2028853ac8SPaulius Zaleckas#include <asm/tlbflush.h> 2128853ac8SPaulius Zaleckas#include "proc-macros.S" 2228853ac8SPaulius Zaleckas 2328853ac8SPaulius Zaleckas 2428853ac8SPaulius Zaleckas/* 2528853ac8SPaulius Zaleckas * flush_user_tlb_range(start, end, mm) 2628853ac8SPaulius Zaleckas * 2728853ac8SPaulius Zaleckas * Invalidate a range of TLB entries in the specified address space. 2828853ac8SPaulius Zaleckas * 2928853ac8SPaulius Zaleckas * - start - range start address 3028853ac8SPaulius Zaleckas * - end - range end address 3128853ac8SPaulius Zaleckas * - mm - mm_struct describing address space 3228853ac8SPaulius Zaleckas */ 3328853ac8SPaulius Zaleckas .align 4 3428853ac8SPaulius ZaleckasENTRY(fa_flush_user_tlb_range) 3528853ac8SPaulius Zaleckas vma_vm_mm ip, r2 3628853ac8SPaulius Zaleckas act_mm r3 @ get current->active_mm 3728853ac8SPaulius Zaleckas eors r3, ip, r3 @ == mm ? 386ebbf2ceSRussell King retne lr @ no, we dont do anything 3928853ac8SPaulius Zaleckas mov r3, #0 4028853ac8SPaulius Zaleckas mcr p15, 0, r3, c7, c10, 4 @ drain WB 4128853ac8SPaulius Zaleckas bic r0, r0, #0x0ff 4228853ac8SPaulius Zaleckas bic r0, r0, #0xf00 4328853ac8SPaulius Zaleckas1: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry 4428853ac8SPaulius Zaleckas add r0, r0, #PAGE_SZ 4528853ac8SPaulius Zaleckas cmp r0, r1 4628853ac8SPaulius Zaleckas blo 1b 4728853ac8SPaulius Zaleckas mcr p15, 0, r3, c7, c10, 4 @ data write barrier 486ebbf2ceSRussell King ret lr 4928853ac8SPaulius Zaleckas 5028853ac8SPaulius Zaleckas 5128853ac8SPaulius ZaleckasENTRY(fa_flush_kern_tlb_range) 5228853ac8SPaulius Zaleckas mov r3, #0 5328853ac8SPaulius Zaleckas mcr p15, 0, r3, c7, c10, 4 @ drain WB 5428853ac8SPaulius Zaleckas bic r0, r0, #0x0ff 5528853ac8SPaulius Zaleckas bic r0, r0, #0xf00 5628853ac8SPaulius Zaleckas1: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry 5728853ac8SPaulius Zaleckas add r0, r0, #PAGE_SZ 5828853ac8SPaulius Zaleckas cmp r0, r1 5928853ac8SPaulius Zaleckas blo 1b 6028853ac8SPaulius Zaleckas mcr p15, 0, r3, c7, c10, 4 @ data write barrier 614348810aSRussell King mcr p15, 0, r3, c7, c5, 4 @ prefetch flush (isb) 626ebbf2ceSRussell King ret lr 6328853ac8SPaulius Zaleckas 6428853ac8SPaulius Zaleckas __INITDATA 6528853ac8SPaulius Zaleckas 6627eebe4cSDave Martin /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */ 6727eebe4cSDave Martin define_tlb_functions fa, fa_tlb_flags 68