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Searched refs:active_tc (Results 1 – 25 of 30) sorted by relevance

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/openbmc/qemu/linux-user/mips/
H A Dsignal.c113 __put_user(regs->active_tc.gpr[i], &sc->sc_regs[i]); in setup_sigcontext()
116 __put_user(regs->active_tc.HI[0], &sc->sc_mdhi); in setup_sigcontext()
117 __put_user(regs->active_tc.LO[0], &sc->sc_mdlo); in setup_sigcontext()
121 __put_user(regs->active_tc.HI[1], &sc->sc_hi1); in setup_sigcontext()
122 __put_user(regs->active_tc.HI[2], &sc->sc_hi2); in setup_sigcontext()
123 __put_user(regs->active_tc.HI[3], &sc->sc_hi3); in setup_sigcontext()
124 __put_user(regs->active_tc.LO[1], &sc->sc_lo1); in setup_sigcontext()
125 __put_user(regs->active_tc.LO[2], &sc->sc_lo2); in setup_sigcontext()
126 __put_user(regs->active_tc.LO[3], &sc->sc_lo3); in setup_sigcontext()
146 __get_user(regs->active_tc.HI[0], &sc->sc_mdhi); in restore_sigcontext()
[all …]
H A Dcpu_loop.c44 target_ulong pc = env->active_tc.PC; in do_tr_or_bp()
81 env->active_tc.PC += 4; in cpu_loop()
83 syscall_num = env->active_tc.gpr[2] - 4000; in cpu_loop()
98 sp_reg = env->active_tc.gpr[29]; in cpu_loop()
124 ret = do_syscall(env, env->active_tc.gpr[2], in cpu_loop()
125 env->active_tc.gpr[4], in cpu_loop()
126 env->active_tc.gpr[5], in cpu_loop()
127 env->active_tc.gpr[6], in cpu_loop()
128 env->active_tc.gpr[7], in cpu_loop()
133 ret = do_syscall(env, env->active_tc.gpr[2], in cpu_loop()
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H A Dtarget_cpu.h26 env->active_tc.gpr[29] = newsp; in cpu_clone_regs_child()
28 env->active_tc.gpr[7] = 0; in cpu_clone_regs_child()
29 env->active_tc.gpr[2] = 0; in cpu_clone_regs_child()
38 env->active_tc.CP0_UserLocal = newtls; in cpu_set_tls()
43 return state->active_tc.gpr[29]; in get_sp_from_cpustate()
/openbmc/qemu/target/mips/
H A Dmsa.c44 env->active_tc.msacsr = 0; in msa_reset()
50 &env->active_tc.msa_fp_status); in msa_reset()
67 &env->active_tc.msa_fp_status); in msa_reset()
70 set_float_exception_flags(0, &env->active_tc.msa_fp_status); in msa_reset()
73 set_default_nan_mode(0, &env->active_tc.msa_fp_status); in msa_reset()
76 set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); in msa_reset()
H A Dgdbstub.c31 return gdb_get_regl(mem_buf, env->active_tc.gpr[n]); in mips_cpu_gdb_read_register()
53 return gdb_get_regl(mem_buf, env->active_tc.LO[0]); in mips_cpu_gdb_read_register()
55 return gdb_get_regl(mem_buf, env->active_tc.HI[0]); in mips_cpu_gdb_read_register()
61 return gdb_get_regl(mem_buf, env->active_tc.PC | in mips_cpu_gdb_read_register()
86 env->active_tc.gpr[n] = tmp; in mips_cpu_gdb_write_register()
116 env->active_tc.LO[0] = tmp; in mips_cpu_gdb_write_register()
119 env->active_tc.HI[0] = tmp; in mips_cpu_gdb_write_register()
130 env->active_tc.PC = tmp & ~(target_ulong)1; in mips_cpu_gdb_write_register()
H A Dfpu_helper.h80 float_status *status = &env->active_tc.msa_fp_status; in restore_msa_fp_status()
81 int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM; in restore_msa_fp_status()
82 bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0; in restore_msa_fp_status()
H A Dcpu.c89 env->active_tc.PC, env->active_tc.HI[0], env->active_tc.LO[0], in mips_cpu_dump_state()
96 regnames[i], env->active_tc.gpr[i]); in mips_cpu_dump_state()
132 return cpu->env.active_tc.PC; in mips_cpu_get_pc()
288 env->CP0_ErrorEPC = (env->active_tc.PC in mips_cpu_reset_hold()
291 env->CP0_ErrorEPC = env->active_tc.PC; in mips_cpu_reset_hold()
293 env->active_tc.PC = env->exception_base; in mips_cpu_reset_hold()
339 env->active_tc.CP0_TCHalt = 1; in mips_cpu_reset_hold()
349 env->active_tc.CP0_TCHalt = 0; in mips_cpu_reset_hold()
352 env->active_tc.CP0_TCStatus = (1 << CP0TCSt_A); in mips_cpu_reset_hold()
418 env->active_tc.gpr[4] = -1; in mips_cpu_reset_hold()
H A Dkvm.c646 &env->active_tc.msacsr); in kvm_mips_put_fpu_registers()
723 &env->active_tc.msacsr); in kvm_mips_get_fpu_registers()
771 &env->active_tc.CP0_UserLocal); in kvm_mips_put_cp0_registers()
991 &env->active_tc.CP0_UserLocal); in kvm_mips_get_cp0_registers()
1184 regs.gpr[i] = (int64_t)(target_long)env->active_tc.gpr[i]; in kvm_arch_put_registers()
1187 regs.hi = (int64_t)(target_long)env->active_tc.HI[0]; in kvm_arch_put_registers()
1188 regs.lo = (int64_t)(target_long)env->active_tc.LO[0]; in kvm_arch_put_registers()
1189 regs.pc = (int64_t)(target_long)env->active_tc.PC; in kvm_arch_put_registers()
1225 env->active_tc.gpr[i] = regs.gpr[i]; in kvm_arch_get_registers()
1228 env->active_tc.HI[0] = regs.hi; in kvm_arch_get_registers()
[all …]
H A Dinternal.h178 !(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)); in cpu_mips_hw_interrupts_enabled()
220 env->active_tc.PC = value & ~(target_ulong)1; in mips_env_set_pc()
268 if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { in mips_vpe_active()
272 if (env->active_tc.CP0_TCHalt & 1) { in mips_vpe_active()
H A Dcpu.h529 TCState active_tc; member
1374 *pc = env->active_tc.PC; in cpu_get_tb_cpu_state()
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dcp0_helper.c194 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_entryhi()
251 return env->active_tc.CP0_TCStatus; in helper_mfc0_tcstatus()
260 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
268 return env->active_tc.CP0_TCBind; in helper_mfc0_tcbind()
277 return other->active_tc.CP0_TCBind; in helper_mftc0_tcbind()
285 return env->active_tc.PC; in helper_mfc0_tcrestart()
294 return other->active_tc.PC; in helper_mftc0_tcrestart()
302 return env->active_tc.CP0_TCHalt; in helper_mfc0_tchalt()
311 return other->active_tc.CP0_TCHalt; in helper_mftc0_tchalt()
319 return env->active_tc.CP0_TCContext; in helper_mfc0_tccontext()
[all …]
H A Dspecial_helper.c49 env->active_tc.PC, env->CP0_EPC); in debug_pre_eret()
64 env->active_tc.PC, env->CP0_EPC); in debug_post_eret()
96 && !tcg_cflags_has(cs, CF_PCREL) && env->active_tc.PC != tb->pc) { in mips_io_recompile_replay_branch()
97 env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); in mips_io_recompile_replay_branch()
H A Dmips-semi.c122 int op = env->active_tc.gpr[25]; in report_fault()
161 env->active_tc.gpr[2] = ret; in uhi_cb()
162 env->active_tc.gpr[3] = err; in uhi_cb()
171 target_ulong addr = env->active_tc.gpr[5]; in uhi_fstat_cb()
205 target_ulong *gpr = env->active_tc.gpr; in mips_semihosting()
H A Dtlb_helper.c1002 uint32_t instr = (cpu_lduw_code(env, env->active_tc.PC)) << 16; in set_badinstr_registers()
1004 instr |= cpu_lduw_code(env, env->active_tc.PC + 2); in set_badinstr_registers()
1009 instr = cpu_lduw_code(env, env->active_tc.PC + 4) << 16; in set_badinstr_registers()
1021 env->CP0_BadInstr = cpu_ldl_code(env, env->active_tc.PC); in set_badinstr_registers()
1025 env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC - 4); in set_badinstr_registers()
1041 __func__, env->active_tc.PC, env->CP0_EPC, in mips_cpu_do_interrupt()
1053 env->active_tc.PC += env->error_code; in mips_cpu_do_interrupt()
1063 env->CP0_DEPC = env->active_tc.PC | !!(env->hflags & MIPS_HFLAG_M16); in mips_cpu_do_interrupt()
1099 env->active_tc.PC = env->exception_base + 0x480; in mips_cpu_do_interrupt()
1127 env->active_tc.PC = env->exception_base; in mips_cpu_do_interrupt()
[all …]
/openbmc/qemu/target/mips/tcg/
H A Ddsp_helper.c57 env->active_tc.DSPControl |= (target_ulong)flag << position; in set_DSPControl_overflow_flag()
62 env->active_tc.DSPControl &= ~(1 << 13); in set_DSPControl_carryflag()
63 env->active_tc.DSPControl |= flag << 13; in set_DSPControl_carryflag()
68 return (env->active_tc.DSPControl >> 13) & 0x01; in get_DSPControl_carryflag()
78 env->active_tc.DSPControl &= filter; in set_DSPControl_24()
79 env->active_tc.DSPControl |= (target_ulong)flag << 24; in set_DSPControl_24()
86 dspc = env->active_tc.DSPControl; in set_DSPControl_pos()
94 env->active_tc.DSPControl = dspc; in set_DSPControl_pos()
102 dspc = env->active_tc.DSPControl; in get_DSPControl_pos()
115 env->active_tc.DSPControl &= 0xFFFFBFFF; in set_DSPControl_efi()
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H A Dvr54xx_helper.c29 return ((uint64_t)(env->active_tc.HI[0]) << 32) | in get_HILO()
30 (uint32_t)env->active_tc.LO[0]; in get_HILO()
35 env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF); in set_HIT0_LO()
36 return env->active_tc.HI[0] = (int32_t)(HILO >> 32); in set_HIT0_LO()
41 target_ulong tmp = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF); in set_HI_LOT0()
42 env->active_tc.HI[0] = (int32_t)(HILO >> 32); in set_HI_LOT0()
H A Dldst_helper.c225 env->active_tc.gpr[multiple_regs[i]] = in helper_lwm()
232 env->active_tc.gpr[31] = in helper_lwm()
247 cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], in helper_swm()
254 cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); in helper_swm()
269 env->active_tc.gpr[multiple_regs[i]] = in helper_ldm()
276 env->active_tc.gpr[31] = in helper_ldm()
291 cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], in helper_sdm()
298 cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); in helper_sdm()
H A Dop_helper.c162 env->active_tc.CP0_TCStatus & (1 << CP0TCSt_DT)) { in helper_yield()
238 if (env->active_tc.gpr[4] == 0) { in helper_pmon()
239 env->active_tc.gpr[2] = -1; in helper_pmon()
243 env->active_tc.gpr[2] = -1; in helper_pmon()
247 printf("%c", (char)(env->active_tc.gpr[4] & 0xFF)); in helper_pmon()
253 unsigned char *fmt = (void *)(uintptr_t)env->active_tc.gpr[4]; in helper_pmon()
H A Dexception.c34 bad_pc = env->active_tc.PC | isa_mode; in exception_resume_pc()
85 env->active_tc.PC = tb->pc; in mips_cpu_synchronize_from_tb()
H A Dmsa_helper.c5650 msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]); in MSA_BINOP_DF()
5825 msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]); in helper_msa_splat_df()
5937 env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n]; in helper_msa_copy_s_b()
5951 env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n]; in helper_msa_copy_s_h()
5965 env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n]; in helper_msa_copy_s_w()
5972 env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n]; in helper_msa_copy_s_d()
5986 env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n]; in helper_msa_copy_u_b()
6000 env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n]; in helper_msa_copy_u_h()
6014 env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n]; in helper_msa_copy_u_w()
6021 target_ulong rs = env->active_tc.gpr[rs_num]; in helper_msa_insert_b()
[all …]
/openbmc/linux/drivers/scsi/
H A Dinitio.c1144 struct target_control *active_tc; in tulip_scsi() local
1184 active_tc = &host->targets[scb->target]; in tulip_scsi()
1187 active_tc->drv_flags |= TCF_DRV_EN_TAG; in tulip_scsi()
1189 active_tc->drv_flags &= ~TCF_DRV_EN_TAG; in tulip_scsi()
1191 outb(active_tc->js_period, host->addr + TUL_SPeriod); in tulip_scsi()
1192 if ((active_tc->flags & (TCF_WDTR_DONE | TCF_NO_WDTR)) == 0) { /* do wdtr negotiation */ in tulip_scsi()
1195 …if ((active_tc->flags & (TCF_SYNC_DONE | TCF_NO_SYNC_NEGO)) == 0) { /* do sync negotiation … in tulip_scsi()
1295 struct target_control *active_tc = host->active_tc; in initio_state_1() local
1304 outb(active_tc->sconfig0, host->addr + TUL_SConfig ); in initio_state_1()
1314 if ((active_tc->flags & (TCF_WDTR_DONE | TCF_NO_WDTR)) == 0) { in initio_state_1()
[all …]
H A Dinitio.h500 struct target_control *active_tc; /* 34 */ member
/openbmc/qemu/hw/mips/
H A Dmipssim.c115 env->active_tc.PC = s->vector & ~(target_ulong)1; in main_cpu_reset()
169 reset_info->vector = env->active_tc.PC; in mips_mipssim_init()
195 env->active_tc.PC = (target_long)(int32_t)0xbfc00000; in mips_mipssim_init()
H A Dloongson3_virt.c412 env->active_tc.gpr[4] = loaderparams.a0; in main_cpu_reset()
413 env->active_tc.gpr[5] = loaderparams.a1; in main_cpu_reset()
414 env->active_tc.gpr[6] = loaderparams.a2; in main_cpu_reset()
415 env->active_tc.PC = loaderparams.kernel_entry; in main_cpu_reset()
/openbmc/qemu/target/mips/sysemu/
H A Dcp0.c51 tcst = &cpu->active_tc.CP0_TCStatus; in sync_c0_status()

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