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/openbmc/u-boot/board/armadeus/apf27/
H A Dfpga.cdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
/openbmc/u-boot/board/astro/mcf5373l/
H A Dfpga.cdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
/openbmc/u-boot/include/
H A Dvirtex2.hdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
H A Dspartan2.hdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
H A Dzynqpl.hdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
H A Dspartan3.hdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
H A Dxilinx.hdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
/openbmc/u-boot/drivers/fpga/
H A Dvirtex2.cdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
H A Dspartan2.cdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
H A Dspartan3.cdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
H A Dzynqpl.cdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
H A Dxilinx.cdiff 14cfc4f3735d9704cb6a630ef302be596d380684 Thu Mar 13 07:07:57 CDT 2014 Michal Simek <michal.simek@xilinx.com> fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>