History log of /openbmc/u-boot/include/zynqpl.h (Results 1 – 25 of 26)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04
# f7e48c54 19-Jul-2018 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.09

clk:
- Fix zynqmp clock driver

common:
- Handle CMD_RET_USAGE in cmd_process_error
- Use return m

Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.09

clk:
- Fix zynqmp clock driver

common:
- Handle CMD_RET_USAGE in cmd_process_error
- Use return macros in cmd_process_error
- Fix duplication of CONFIG_SYS_PROMPT_HUSH_PS2
- Support watchdog in usb_kbd.c
- Fix name usage in usb_kbd.c
- Support systems with non zero memory start initialized from DT only

gpio:
- Add support for manual relocation in uclass
- zynq - use live tree
- zynq - fix match data reading
- zynq - setup bank name
- xilinx - convert driver to DM

microblaze:
- Use generic iounmap/ioremap implementations
- Redesign reset logic with sysreset features
- Use watchdog and gpio over DM
- Remove unused macros and fix some checkpatch issues
- Fix timer initialization not to be called twice

serial:
- zynq - Use platdata intead of priv data

sysreset:
- Add support for manual relocation in uclass
- Add gpio-restart driver
- Add microblaze soft reset driver

watchdog:
- Add support for aliases in uclass
- Add support for manual relocation in uclass
- Convert xilinx driver to DM
- cadence - update info in the driver and not stop wdt in probe

xilinx:
- Enable LED gpio for some targets with gpio-leds DT node
- Setup variables via Kconfig

zynq:
- Add support for watchdog aliases
- Add support for mini nand/nor configurations
- Wire FPGA initalization in SPL

zynqmp:
- Enable mass storage for zcu100
- Handle external pmufw files
- Add support for secure images
- Some Kconfig movements and alignments
- Add support for watchdog aliases
- Use subcommands style for platform command
- Add mmio_read/write platform commands
- DT updates
- Add support for mini qspi configuration

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Revision tags: v2018.07
# 37e3a36a 26-Jun-2018 Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

xilinx: zynq: Add support to secure images

This patch basically adds two new commands for loadig secure
images.
1. zynq rsa adds support to load secure image which can be both
authenticated or en

xilinx: zynq: Add support to secure images

This patch basically adds two new commands for loadig secure
images.
1. zynq rsa adds support to load secure image which can be both
authenticated or encrypted or both authenticated and encrypted
image in xilinx bootimage(BOOT.bin) format.
2. zynq aes command adds support to decrypt and load encrypted
image back to DDR as per destination address. The image has
to be encrypted using xilinx bootgen tool and to get only the
encrypted image from tool use -split option while invoking
bootgen.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# 3b52847a 11-May-2018 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07

microblaze:
- Align defconfig

zynq:
- Rework fpga initialization and cpuinfo handling

zynqmp

Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07

microblaze:
- Align defconfig

zynq:
- Rework fpga initialization and cpuinfo handling

zynqmp:
- Add ZynqMP R5 support
- Wire and enable watchdog on zcu100-revC
- Setup MMU map for DDR at run time
- Show board info based on DT and cleanup IDENT_STRING

zynqmp tools:
- Add read partition support
- Add initial support for Xilinx bif format for boot.bin generation

mmc:
- Fix get_timer usage on 64bit cpus
- Add support for SD3.0 UHS mode

nand-zynq:
- Add support for 16bit buswidth
- Use address cycles from onfi params

scsi:
- convert ceva sata to UCLASS_AHCI

timer:
- Add Cadence TTC for ZynqMP r5

watchdog:
- Minor cadence driver cleanup

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Revision tags: v2018.03
# 4aba5fb8 17-Jan-2018 Michal Simek <michal.simek@xilinx.com>

arm: zynq: Rework FPGA initialization

This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>

arm: zynq: Rework FPGA initialization

This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Revision tags: v2018.01, v2017.11
# 2d221489 29-Nov-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# 05c59d0b 18-Oct-2016 Michal Simek <michal.simek@xilinx.com>

ARM: zynq: Add support for Zynq 7000S 7007s/7012s/7014s devices

Zynq 7000S (Single A9 core) devices is using different ID code.
This patch adds this new codes and assign them.

Signed-off-by: Michal

ARM: zynq: Add support for Zynq 7000S 7007s/7012s/7014s devices

Zynq 7000S (Single A9 core) devices is using different ID code.
This patch adds this new codes and assign them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Revision tags: v2016.07, openbmc-20160624-1, v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1, v2015.04, v2015.04-rc5, v2015.04-rc4, v2015.04-rc3, v2015.04-rc2
# e72d3443 13-Feb-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


Revision tags: v2015.04-rc1
# 4608f379 22-Jan-2015 Tom Rini <trini@ti.com>

Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze


Revision tags: v2015.01, v2015.01-rc4, v2015.01-rc3
# b9103809 25-Nov-2014 Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

fpga: zynqpl: Add support for zc7035

Added support for zc7035

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>


Revision tags: v2015.01-rc2, v2015.01-rc1, v2014.10, v2014.10-rc3, v2014.10-rc2, v2014.10-rc1
# 345f9e19 16-Jul-2014 Michal Simek <michal.simek@xilinx.com>

fpga: xilinx: zynqpl: Setup NULL fpga_op without driver

Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added

Signed-off-by: Michal Simek <michal.simek@xil

fpga: xilinx: zynqpl: Setup NULL fpga_op without driver

Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Revision tags: v2014.07, v2014.07-rc4, v2014.07-rc3, v2014.07-rc2
# 05d134b0 20-May-2014 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge remote-tracking branch 'u-boot/master'

Conflicts:
boards.cfg

Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatt

Merge remote-tracking branch 'u-boot/master'

Conflicts:
boards.cfg

Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).

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# 4180b3db 14-May-2014 Marek Vasut <marex@denx.de>

Merge remote-tracking branch 'u-boot/master' into test


# 27b4e4b9 13-May-2014 Tom Rini <trini@ti.com>

Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze


Revision tags: v2014.07-rc1, v2014.04, v2014.04-rc3
# 14cfc4f3 13-Mar-2014 Michal Simek <michal.simek@xilinx.com>

fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2

fpga: xilinx: Simplify load/dump/info function handling

Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# f8c1be98 13-Mar-2014 Michal Simek <michal.simek@xilinx.com>

fpga: xilinx: Avoid CamelCase for in Xilinx_desc

No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>


Revision tags: v2014.04-rc2
# 1ad6364e 05-Mar-2014 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-arm


Revision tags: v2014.04-rc1
# 6e94258e 06-Feb-2014 Tom Rini <trini@ti.com>

Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze


Revision tags: v2014.01, v2014.01-rc3, v2014.01-rc2, v2014.01-rc1, v2013.10, v2013.10-rc4
# 31993d6a 26-Sep-2013 Michal Simek <michal.simek@xilinx.com>

fpga: zynqpl: Add support for zc7015 device

Just extend tables with this new device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>


Revision tags: v2013.10-rc3, v2013.10-rc2, v2013.10-rc1
# 0daa1f69 12-Aug-2013 Tom Rini <trini@ti.com>

Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze


Revision tags: v2013.07, v2013.07-rc3, v2013.07-rc2
# fd2b10b6 17-Jun-2013 Michal Simek <michal.simek@xilinx.com>

fpga: zynqpl: Add support for zc7100 device.

- Add support for zc7100 device.
- FPGA programming on few of the SOC(zc7100) takes more
than 1sec, hence increased the program time by 4sec to
sync'

fpga: zynqpl: Add support for zc7100 device.

- Add support for zc7100 device.
- FPGA programming on few of the SOC(zc7100) takes more
than 1sec, hence increased the program time by 4sec to
sync' all soc's.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# 326ea986 31-Jul-2013 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <s

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <sbabic@denx.de>

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# 8b485ba1 25-Jul-2013 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into u-boot-arm/master


# 1a459660 08-Jul-2013 Wolfgang Denk <wd@denx.de>

Add GPL-2.0+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>


Revision tags: v2013.07-rc1
# 6631db47 26-Apr-2013 Michal Simek <michal.simek@xilinx.com>

fpga: Check device name against bitstream name

Ensure that wrong bitstream won't be loaded
to current device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.c

fpga: Check device name against bitstream name

Ensure that wrong bitstream won't be loaded
to current device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>

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