Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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f7e48c54 |
| 19-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.09
clk: - Fix zynqmp clock driver
common: - Handle CMD_RET_USAGE in cmd_process_error - Use return m
Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.09
clk: - Fix zynqmp clock driver
common: - Handle CMD_RET_USAGE in cmd_process_error - Use return macros in cmd_process_error - Fix duplication of CONFIG_SYS_PROMPT_HUSH_PS2 - Support watchdog in usb_kbd.c - Fix name usage in usb_kbd.c - Support systems with non zero memory start initialized from DT only
gpio: - Add support for manual relocation in uclass - zynq - use live tree - zynq - fix match data reading - zynq - setup bank name - xilinx - convert driver to DM
microblaze: - Use generic iounmap/ioremap implementations - Redesign reset logic with sysreset features - Use watchdog and gpio over DM - Remove unused macros and fix some checkpatch issues - Fix timer initialization not to be called twice
serial: - zynq - Use platdata intead of priv data
sysreset: - Add support for manual relocation in uclass - Add gpio-restart driver - Add microblaze soft reset driver
watchdog: - Add support for aliases in uclass - Add support for manual relocation in uclass - Convert xilinx driver to DM - cadence - update info in the driver and not stop wdt in probe
xilinx: - Enable LED gpio for some targets with gpio-leds DT node - Setup variables via Kconfig
zynq: - Add support for watchdog aliases - Add support for mini nand/nor configurations - Wire FPGA initalization in SPL
zynqmp: - Enable mass storage for zcu100 - Handle external pmufw files - Add support for secure images - Some Kconfig movements and alignments - Add support for watchdog aliases - Use subcommands style for platform command - Add mmio_read/write platform commands - DT updates - Add support for mini qspi configuration
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d600c4f6 |
| 19-Jul-2018 |
Luis Araneda <luaraneda@gmail.com> |
drivers: fpga: zynqpl: fix compilation with SPL
Disable the use of function zynq_loadfs when compiling the driver for the SPL, as the following filesystem functions are not found by the linker: - fs
drivers: fpga: zynqpl: fix compilation with SPL
Disable the use of function zynq_loadfs when compiling the driver for the SPL, as the following filesystem functions are not found by the linker: - fs_set_blk_dev - fs_read - fs_set_blk_dev - fs_read - fs_read
Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v2018.07 |
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37e3a36a |
| 26-Jun-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
xilinx: zynq: Add support to secure images
This patch basically adds two new commands for loadig secure images. 1. zynq rsa adds support to load secure image which can be both authenticated or en
xilinx: zynq: Add support to secure images
This patch basically adds two new commands for loadig secure images. 1. zynq rsa adds support to load secure image which can be both authenticated or encrypted or both authenticated and encrypted image in xilinx bootimage(BOOT.bin) format. 2. zynq aes command adds support to decrypt and load encrypted image back to DDR as per destination address. The image has to be encrypted using xilinx bootgen tool and to get only the encrypted image from tool use -split option while invoking bootgen.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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2600df4f |
| 09-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel - Various defconfig updates - Add SPL i
Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel - Various defconfig updates - Add SPL init for zcu102 revA - Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX and zc1751-dc3 - Net fixes - xlnx,phy-type - 64bit axi ethernet support - arasan: Fix nand write issue - fpga fixes - Maintainer file updates
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Revision tags: v2018.03 |
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71723aae |
| 06-Mar-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: zynq: Add delay after PCFG_PROG_B change
There is delay needed after PCFG_PROGB change if AES key source is efuse. This fixes the issue of encrypted bitstream loading with AES efuse as key sou
fpga: zynq: Add delay after PCFG_PROG_B change
There is delay needed after PCFG_PROGB change if AES key source is efuse. This fixes the issue of encrypted bitstream loading with AES efuse as key source.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v2018.01, v2017.11 |
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5b30997f |
| 11-Jan-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.03
- ATF handoff - DT syncups - gem: Use wait_for_bit(), add simple clk support - Simple clk driv
Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.03
- ATF handoff - DT syncups - gem: Use wait_for_bit(), add simple clk support - Simple clk driver for ZynqMP - Other small changes
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3d4eb334 |
| 16-Dec-2016 |
Michal Simek <michal.simek@xilinx.com> |
fpga: zynqmp: Remove empty functions
Xilinx core files will take care about it. There is no need to have these functions because they do nothing.
Signed-off-by: Michal Simek <michal.simek@xilinx.co
fpga: zynqmp: Remove empty functions
Xilinx core files will take care about it. There is no need to have these functions because they do nothing.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v2016.07, openbmc-20160624-1, v2016.01-rc1 |
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24b852a7 |
| 09-Nov-2015 |
Simon Glass <sjg@chromium.org> |
Move console definitions into a new console.h file
The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, mo
Move console definitions into a new console.h file
The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, move the definitions into their own header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1, v2015.04, v2015.04-rc5, v2015.04-rc4, v2015.04-rc3, v2015.04-rc2, v2015.04-rc1, v2015.01, v2015.01-rc4, v2015.01-rc3, v2015.01-rc2 |
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d455d878 |
| 17-Nov-2014 |
Suriyan Ramasami <suriyan.r@gmail.com> |
fs: API changes enabling extra parameter to return size of type loff_t
The sandbox/ext4/fat/generic fs commands do not gracefully deal with files greater than 2GB. Negative values are returned in su
fs: API changes enabling extra parameter to return size of type loff_t
The sandbox/ext4/fat/generic fs commands do not gracefully deal with files greater than 2GB. Negative values are returned in such cases.
To handle this, the fs functions have been modified to take an additional parameter of type "* loff_t" which is then populated. The return value of the fs functions are used only for error conditions.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> [trini: Update board/gdsys/p1022/controlcenterd-id.c, drivers/fpga/zynqpl.c for changes] Signed-off-by: Tom Rini <trini@ti.com>
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Revision tags: v2015.01-rc1, v2014.10, v2014.10-rc3, v2014.10-rc2, v2014.10-rc1, v2014.07, v2014.07-rc4, v2014.07-rc3, v2014.07-rc2 |
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4d16f67e |
| 22-May-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze
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Revision tags: v2014.07-rc1, v2014.04, v2014.04-rc3 |
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1a897668 |
| 14-Mar-2014 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: Added support to load bit stream from SD/MMC
Added support to load a bitstream image in chunks by reading it in chunks from SD/MMC. Command format: loadfs [dev] [address] [image size] [blocksi
fpga: Added support to load bit stream from SD/MMC
Added support to load a bitstream image in chunks by reading it in chunks from SD/MMC. Command format: loadfs [dev] [address] [image size] [blocksize] <interface> [<dev[:part]>] <filename> Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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5b815c9c |
| 02-May-2014 |
Michal Simek <michal.simek@xilinx.com> |
fpga: zynqpl: Clean partial bitstream handling
Do not do partial bitstream detection based on bitstream size and use bitstream_type argument which is passed from the fpga core.
Signed-off-by: Micha
fpga: zynqpl: Clean partial bitstream handling
Do not do partial bitstream detection based on bitstream size and use bitstream_type argument which is passed from the fpga core.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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7a78bd26 |
| 02-May-2014 |
Michal Simek <michal.simek@xilinx.com> |
fpga: Define bitstream type based on command selection
Clean up partial, full and compressed bitstream handling. U-Boot supports full bitstream loading and partial based on detection which is not 10
fpga: Define bitstream type based on command selection
Clean up partial, full and compressed bitstream handling. U-Boot supports full bitstream loading and partial based on detection which is not 100% correct. Extending fpga_load/fpga_loadbitstream() with one more argument which stores bitstream type.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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05d134b0 |
| 20-May-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master'
Conflicts: boards.cfg
Conflicts were trivial once u-boot-arm/master boards.cfg was reformatted (commit 6130c146) to match u-boot/master's own reformatt
Merge remote-tracking branch 'u-boot/master'
Conflicts: boards.cfg
Conflicts were trivial once u-boot-arm/master boards.cfg was reformatted (commit 6130c146) to match u-boot/master's own reformatting (commit 1b37fa83).
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4180b3db |
| 14-May-2014 |
Marek Vasut <marex@denx.de> |
Merge remote-tracking branch 'u-boot/master' into test
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27b4e4b9 |
| 13-May-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze
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31081859 |
| 13-Mar-2014 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: zynq: Use helper function zynq_validate_bitstream
Use helper function zynq_validate_bitstream so that the code can be reused easily for different cases of dma transfer.
Signed-off-by: Siva Du
fpga: zynq: Use helper function zynq_validate_bitstream
Use helper function zynq_validate_bitstream so that the code can be reused easily for different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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a0735a34 |
| 12-Mar-2014 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
fpga: zynq: Use helper functions for zynq dma
Use zynq_dma_xfer_init, zynq_align_dma_buffer, zynq_dma_transfer helper function performing dma transfers so that the code can be reused easily for diff
fpga: zynq: Use helper functions for zynq dma
Use zynq_dma_xfer_init, zynq_align_dma_buffer, zynq_dma_transfer helper function performing dma transfers so that the code can be reused easily for different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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42a74a08 |
| 25-Apr-2014 |
Michal Simek <michal.simek@xilinx.com> |
fpga: zynq: Remove sparse warnings
Warnings: drivers/fpga/zynqpl.c:150:32: warning: Using plain integer as NULL pointer drivers/fpga/zynqpl.c:152:16: warning: Using plain integer as NULL pointer
Si
fpga: zynq: Remove sparse warnings
Warnings: drivers/fpga/zynqpl.c:150:32: warning: Using plain integer as NULL pointer drivers/fpga/zynqpl.c:152:16: warning: Using plain integer as NULL pointer
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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14cfc4f3 |
| 13-Mar-2014 |
Michal Simek <michal.simek@xilinx.com> |
fpga: xilinx: Simplify load/dump/info function handling
Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2
fpga: xilinx: Simplify load/dump/info function handling
Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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f8c1be98 |
| 13-Mar-2014 |
Michal Simek <michal.simek@xilinx.com> |
fpga: xilinx: Avoid CamelCase for in Xilinx_desc
No functional changes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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1cad23c5 |
| 04-Apr-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm into master
Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic
Merge branch 'master' of git://git.denx.de/u-boot-arm into master
Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Revision tags: v2014.04-rc2 |
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1ad6364e |
| 05-Mar-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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1ace4022 |
| 26-Feb-2014 |
Alexey Brodkin <Alexey.Brodkin@synopsys.com> |
sizes.h - consolidate for all architectures
Copied from Linux sources "include/linux/sizes.h" commit 413541dd66d51f791a0b169d9b9014e4f56be13c
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
sizes.h - consolidate for all architectures
Copied from Linux sources "include/linux/sizes.h" commit 413541dd66d51f791a0b169d9b9014e4f56be13c
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Tom Rini <trini@ti.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com> Acked-by: Stefan Roese <sr@denx.de> [trini: Add bcm Kona platforms to the patch] Signed-off-by: Tom Rini <trini@ti.com>
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