| /openbmc/u-boot/drivers/ddr/fsl/ |
| H A D | options.c | 716 * Automatically seleect bank interleaving mode based on DIMMs
846 /* Pick interleaving mode. */ in populate_memctl_options()
849 * 0 = no interleaving in populate_memctl_options()
850 * 1 = interleaving between 2 controllers in populate_memctl_options()
858 * 3 = superbank (only if CS interleaving is enabled) in populate_memctl_options()
868 * NOTE: ba_intlv (rank interleaving) is independent of memory in populate_memctl_options()
869 * controller interleaving; it is only within a memory controller. in populate_memctl_options()
870 * Must use superbank interleaving if rank interleaving is used and in populate_memctl_options()
871 * memory controller interleaving is enabled. in populate_memctl_options()
1074 * Check interleaving configuration from environment. in populate_memctl_options()
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| H A D | main.c | 186 * memory controller interleaving feature, where accesses are interleaved
193 * cache line interleaving | 1 (CS0 only)
194 * page interleaving | 1 (CS0 only)
195 * bank interleaving | 1 (CS0 only)
197 * | interleraving [rank interleaving]
200 * Even further confusing is the existence of the interleaving feature
202 * documentation as chip select interleaving or bank interleaving,
207 * DDR_SDRAM_CFG[BA_INTLV_CTL] | Bank (chip select) | rank interleaving
208 * | interleaving
348 panic("Unknown interleaving mode"); in __step_assign_addresses()
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| H A D | util.c | 256 puts(" DDR Controller Interleaving Mode: "); in print_ddr_info()
277 puts(" DDR Controller Interleaving Mode: "); in print_ddr_info()
304 puts(" DDR Chip-Select Interleaving Mode: "); in print_ddr_info()
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| /openbmc/u-boot/doc/ |
| H A D | README.fsl-ddr | 1 Table of interleaving 2-4 controllers
25 Table of 2-way interleaving modes supported in cpu/8xxx/ddr/
28 | | Rank Interleaving |
32 |Interleaving | | {CS0+CS1} | {CS2+CS3} | {CS2+CS3} | CS2+CS3} |
49 interleaving using "2x2" rank interleaving, it only interleaves {CS0+CS1}
53 For memory controller interleaving, identical DIMMs are suggested. Software
56 The ways to configure the ddr interleaving mode
58 1. In board header file(e.g.MPC8572DS.h), add default interleaving setting
64 2. Run U-Boot "setenv" command to configure the memory interleaving mode.
67 # disable memory controller interleaving
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| /openbmc/linux/Documentation/userspace-api/media/ |
| H A D | frontend.h.rst.exceptions | 16 replace define DTV_ISDBT_LAYERA_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving
17 replace define DTV_ISDBT_LAYERB_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving
18 replace define DTV_ISDBT_LAYERC_TIME_INTERLEAVING dtv-isdbt-layer-time-interleaving
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| /openbmc/linux/Documentation/userspace-api/media/dvb/ |
| H A D | frontend-property-terrestrial-systems.rst | 160 - :ref:`DTV_ISDBT_LAYERA_TIME_INTERLEAVING <DTV-ISDBT-LAYER-TIME-INTERLEAVING>`
168 - :ref:`DTV_ISDBT_LAYERB_TIME_INTERLEAVING <DTV-ISDBT-LAYER-TIME-INTERLEAVING>`
176 - :ref:`DTV_ISDBT_LAYERC_TIME_INTERLEAVING <DTV-ISDBT-LAYER-TIME-INTERLEAVING>`
289 - :ref:`DTV_INTERLEAVING <DTV-INTERLEAVING>`
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| H A D | fe_property_parameters.rst | 558 .. _DTV-ISDBT-LAYER-TIME-INTERLEAVING:
569 Note: The real time interleaving length depends on the mode (fft-size).
576 .. flat-table:: ISDB-T time interleaving modes
969 .. _DTV-INTERLEAVING:
974 Time interleaving to be used.
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| /openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_mdss.h | 349 * @BLEND_3D_FRAME_INT : Frame interleaving
350 * @BLEND_3D_H_ROW_INT : Horizontal row interleaving
351 * @BLEND_3D_V_ROW_INT : vertical row interleaving
352 * @BLEND_3D_COL_INT : column interleaving
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | mp.c | 198 * Erratum A004468 has two parts. The 3-way interleaving applies to T4240, in determine_mp_bootpg()
199 * to be fixed in rev 2.0. The 2-way interleaving applies to many SoCs. But in determine_mp_bootpg()
201 * thw workaround for 3-way interleaving is needed. in determine_mp_bootpg()
203 * To make sure boot page translation works with 3-Way DDR interleaving in determine_mp_bootpg()
428 * 8K is used for the workaround of 3-way DDR interleaving in setup_mp()
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| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.soc | 22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
93 - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support
178 - One 64-bit DDR4 SDRAM memory controllers with ECC and interleaving
220 - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support
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| /openbmc/linux/drivers/media/dvb-frontends/ |
| H A D | as102_fe_types.h | 37 /* interleaving available values */
123 /* interleaving mode */
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| /openbmc/linux/Documentation/devicetree/bindings/arm/omap/ |
| H A D | dmm.txt | 6 interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
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| /openbmc/u-boot/include/ |
| H A D | fsl_ddr_sdram.h | 82 /* define bank(chip select) interleaving mode */
88 /* define memory controller interleaving mode */
97 /* placeholder for 4-way interleaving */
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| /openbmc/qemu/include/hw/cxl/ |
| H A D | cxl.h | 36 /* Todo: XOR based interleaving */
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| /openbmc/u-boot/arch/x86/cpu/quark/ |
| H A D | mrc.c | 21 * 03) Set Channel Interleaving Mode and Channel Stride to the most aggressive
30 * 11) Set Channel Interleaving Mode and Channel Stride to the desired settings
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| /openbmc/linux/include/media/ |
| H A D | dvb_frontend.h | 538 * @interleaving: interleaving
549 * @layer.interleaving: per layer interleaving.
613 enum fe_interleaving interleaving; member
626 u8 interleaving; member
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| /openbmc/linux/include/uapi/linux/dvb/ |
| H A D | frontend.h | 483 * enum fe_interleaving - Interleaving
484 * @INTERLEAVING_NONE: No interleaving.
485 * @INTERLEAVING_AUTO: Auto-detect interleaving.
486 * @INTERLEAVING_240: Interleaving of 240 symbols.
487 * @INTERLEAVING_720: Interleaving of 720 symbols.
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| /openbmc/u-boot/include/configs/ |
| H A D | smdkv310.h | 66 /* MIU (Memory Interleaving Unit) */
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| H A D | origen.h | 82 /* MIU (Memory Interleaving Unit) */
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| /openbmc/u-boot/arch/arm/mach-exynos/include/mach/ |
| H A D | spl.h | 41 u32 mem_iv_size; /* Memory channel interleaving size */
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| /openbmc/linux/Documentation/admin-guide/ |
| H A D | numastat.rst | 40 interleave_hit Interleaving wanted to allocate from this node
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| /openbmc/libcper/specification/json/sections/ |
| H A D | cper-memory2.json | 68 …e physical address which is dependent on the hardware implementation factors such as interleaving."
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| /openbmc/u-boot/board/ccv/xpress/ |
| H A D | spl.c | 58 .bi_on = 1, /* Bank interleaving enabled */
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | fsl_law.h | 105 /* place holder for 3-way and 4-way interleaving */
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| /openbmc/linux/Documentation/devicetree/bindings/arm/ |
| H A D | qcom,coresight-tpda.yaml | 14 master ATB interface. Performing an arbitrated ATB interleaving (funneling)
|