Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07 |
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#
20b016a3 |
| 13-Jun-2018 |
Michal Simek <michal.simek@xilinx.com> |
common: Fix cpu nr type which is always unsigned type
cpu_cmd() is reading cpu number via simple_strtoul() which is always unsigned type. Platform code implementations are not expecting that nr can
common: Fix cpu nr type which is always unsigned type
cpu_cmd() is reading cpu number via simple_strtoul() which is always unsigned type. Platform code implementations are not expecting that nr can be negative and there is not checking in the code for that too.
This patch is using u32 type for cpu number to make sure that platform code get proper value range.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Revision tags: v2018.03, v2018.01, v2017.11 |
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bfebc8c9 |
| 03-Aug-2017 |
Simon Glass <sjg@chromium.org> |
env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()
We are now using an env_ prefix for environment functions. Rename these for consistency. Also add function comments in common.h.
Suggested-b
env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()
We are now using an env_ prefix for environment functions. Rename these for consistency. Also add function comments in common.h.
Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
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62a3b7dd |
| 15-Jul-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Various, unrelated tree-wide typo fixes.
Fix a number of typos, including:
* "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" ->
Various, unrelated tree-wide typo fixes.
Fix a number of typos, including:
* "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable"
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
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Revision tags: v2016.07, openbmc-20160624-1, v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1, v2015.04, v2015.04-rc5, v2015.04-rc4, v2015.04-rc3, v2015.04-rc2, v2015.04-rc1, v2015.01, v2015.01-rc4, v2015.01-rc3, v2015.01-rc2, v2015.01-rc1, v2014.10, v2014.10-rc3, v2014.10-rc2, v2014.10-rc1, v2014.07, v2014.07-rc4, v2014.07-rc3, v2014.07-rc2, v2014.07-rc1, v2014.04, v2014.04-rc3, v2014.04-rc2, v2014.04-rc1, v2014.01, v2014.01-rc3, v2014.01-rc2 |
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f15ea6e1 |
| 10-Dec-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compul
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
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77fdd6d1 |
| 02-Dec-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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Revision tags: v2014.01-rc1, v2013.10, v2013.10-rc4 |
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5614e71b |
| 30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs.
Signed
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
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Revision tags: v2013.10-rc3, v2013.10-rc2, v2013.10-rc1 |
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#
326ea986 |
| 31-Jul-2013 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <s
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
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8b485ba1 |
| 25-Jul-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into u-boot-arm/master
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Revision tags: v2013.07, v2013.07-rc3 |
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1a459660 |
| 08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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Revision tags: v2013.07-rc2, v2013.07-rc1 |
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a19b0dd6 |
| 30-May-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
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Revision tags: v2013.04, v2013.04-rc3, v2013.04-rc2 |
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0c9ab437 |
| 25-Mar-2013 |
York Sun <yorksun@freescale.com> |
powerpc/mpc85xx: check if core is disabled for showing status
"cpu <num> status" should check if core is disabled before printing the spin table location.
Signed-off-by: York Sun <yorksun@freescale
powerpc/mpc85xx: check if core is disabled for showing status
"cpu <num> status" should check if core is disabled before printing the spin table location.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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Revision tags: v2013.04-rc1, v2013.01.01, v2013.01, v2013.01-rc3 |
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96764df1 |
| 22-Dec-2012 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge samsung, imx, tegra into u-boot-arm/master
This commit merges branches from samsung, imx and tegra meant to fix merge issues between u-boot/master and u-boot-arm/master, as well as a few manua
Merge samsung, imx, tegra into u-boot-arm/master
This commit merges branches from samsung, imx and tegra meant to fix merge issues between u-boot/master and u-boot-arm/master, as well as a few manual merge fixes.
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a098cf41 |
| 19-Dec-2012 |
Allen Martin <amartin@nvidia.com> |
Merge remote-tracking branch 'u-boot/master' into u-boot-arm-merged
Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/po
Merge remote-tracking branch 'u-boot/master' into u-boot-arm-merged
Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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88c5c68f |
| 14-Dec-2012 |
Scott Wood <scottwood@freescale.com> |
Merge remote-tracking branch 'origin/master'
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Revision tags: v2013.01-rc2 |
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ec8a252c |
| 11-Dec-2012 |
Joe Hershberger <joe.hershberger@ni.com> |
env: Use getenv_yesno() more generally
Move the getenv_yesno() to env_common.c and change most checks for 'y' or 'n' to use this helper.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
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3e4d27b0 |
| 10-Nov-2012 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot
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Revision tags: v2013.01-rc1 |
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c7656bab |
| 22-Oct-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
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Revision tags: v2012.10, v2012.10-rc3 |
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ffd06e02 |
| 08-Oct-2012 |
York Sun <yorksun@freescale.com> |
powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1
Move spin table to cached memory to comply with ePAPR v1.1. Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.
'M' bit is set fo
powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1
Move spin table to cached memory to comply with ePAPR v1.1. Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.
'M' bit is set for DDR TLB to maintain cache coherence.
See details in doc/README.mpc85xx-spin-table.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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3f0997b3 |
| 08-Oct-2012 |
York Sun <yorksun@freescale.com> |
powerpc/mpc85xx: Remove R6 from spin table
R6 was in ePAPR draft version but was dropped in official spec. Removing it to comply.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy
powerpc/mpc85xx: Remove R6 from spin table
R6 was in ePAPR draft version but was dropped in official spec. Removing it to comply.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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eb539412 |
| 08-Oct-2012 |
York Sun <yorksun@freescale.com> |
powerpc/mpc85xx: software workaround for DDR erratum A-004468
Boot space translation utilizes the pre-translation address to select the DDR controller target. However, the post-translation address w
powerpc/mpc85xx: software workaround for DDR erratum A-004468
Boot space translation utilizes the pre-translation address to select the DDR controller target. However, the post-translation address will be presented to the selected DDR controller. It is possible that the pre- translation address selects one DDR controller but the post-translation address exists in a different DDR controller when using certain DDR controller interleaving modes. The device may fail to boot under these circumstances. Note that a DDR MSE error will not be detected since DDR controller bounds registers are programmed to be the same when configured for DDR controller interleaving.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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Revision tags: v2012.10-rc2, v2012.10-rc1, v2012.07, v2012.07-rc3, v2012.07-rc2, v2012.07-rc1, v2012.04.01, v2012.04, v2012.04-rc3, v2012.04-rc2, v2012.04-rc1, v2011.12, v2011.12-rc3, v2011.12-rc2, v2011.12-rc1 |
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1fed668b |
| 04-Oct-2011 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
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Revision tags: v2011.09, v2011.09-rc2, v2011.09-rc1 |
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#
fbb9ecf7 |
| 05-Aug-2011 |
Timur Tabi <timur@freescale.com> |
powerpc/mp: add support for discontiguous cores
Some SOCs have discontiguously-numbered cores, and so we can't determine the valid core numbers via the FRR register any more. We define CPU_TYPE_ENT
powerpc/mp: add support for discontiguous cores
Some SOCs have discontiguously-numbered cores, and so we can't determine the valid core numbers via the FRR register any more. We define CPU_TYPE_ENTRY_MASK to specify a discontiguous core mask, and helper functions to process the mask and enumerate over the set of valid cores.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Revision tags: v2011.06, v2011.06-rc3, v2011.06-rc2, v2011.06-rc1, v2011.03, v2011.03-rc2 |
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7afc45ad |
| 13-Mar-2011 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Fix synchronization of timebase on MP boot
There is a small ordering issue in the master core in that we need to make sure the disabling of the timebase in the SoC is visible before we
powerpc/85xx: Fix synchronization of timebase on MP boot
There is a small ordering issue in the master core in that we need to make sure the disabling of the timebase in the SoC is visible before we set the value to 0. We can simply just read back the value to synchronizatize the write, before we set TB to 0.
Reported-by: Dan Hettena Tested-by: Dan Hettena Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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e81241af |
| 03-Mar-2011 |
Ed Swarthout <Ed.Swarthout@freescale.com> |
powerpc/85xx: Fix plat_mp_up() disabling of BPTR for CoreNet Platforms
Copying directly from ECM/PQ3 is not correct for how CoreNet based platforms handle boot page translation.
Signed-off-by: Ed S
powerpc/85xx: Fix plat_mp_up() disabling of BPTR for CoreNet Platforms
Copying directly from ECM/PQ3 is not correct for how CoreNet based platforms handle boot page translation.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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