1*1a5fe3caSArchit TanejaOMAP Dynamic Memory Manager (DMM) bindings 2*1a5fe3caSArchit Taneja 3*1a5fe3caSArchit TanejaThe dynamic memory manager (DMM) is a module located immediately in front of the 4*1a5fe3caSArchit TanejaSDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory 5*1a5fe3caSArchit Tanejaaccesses such as priority generation amongst initiators, configuration of SDRAM 6*1a5fe3caSArchit Tanejainterleaving, optimizing transfer of 2D block objects, and provide MMU-like page 7*1a5fe3caSArchit Tanejatranslation for initiators which need contiguous dma bus addresses. 8*1a5fe3caSArchit Taneja 9*1a5fe3caSArchit TanejaRequired properties: 10*1a5fe3caSArchit Taneja- compatible: Should contain "ti,omap4-dmm" for OMAP4 family 11*1a5fe3caSArchit Taneja Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family 12*1a5fe3caSArchit Taneja- reg: Contains DMM register address range (base address and length) 13*1a5fe3caSArchit Taneja- interrupts: Should contain an interrupt-specifier for DMM_IRQ. 14*1a5fe3caSArchit Taneja- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm" 15*1a5fe3caSArchit Taneja 16*1a5fe3caSArchit TanejaExample: 17*1a5fe3caSArchit Taneja 18*1a5fe3caSArchit Tanejadmm@4e000000 { 19*1a5fe3caSArchit Taneja compatible = "ti,omap4-dmm"; 20*1a5fe3caSArchit Taneja reg = <0x4e000000 0x800>; 21*1a5fe3caSArchit Taneja ti,hwmods = "dmm"; 22*1a5fe3caSArchit Taneja}; 23