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/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Daspeed,ast2500-hace.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/aspeed,ast2500-hace.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED HACE hash and crypto Hardware Accelerator Engines
10 - Neal Liu <neal_liu@aspeedtech.com>
13 The Hash and Crypto Engine (HACE) is designed to accelerate the throughput
14 of hash data digest, encryption, and decryption. Basically, HACE can be
15 divided into two independently engines - Hash Engine and Crypto Engine.
20 - aspeed,ast2500-hace
[all …]
/openbmc/qemu/tests/qtest/
H A Daspeed_hace-test.c4 * SPDX-License-Identifier: GPL-2.0-or-later
37 /* Scatter-Gather Hash */
49 * echo -n -e 'abc' | dd of=/tmp/test
73 * The Scatter-Gather Test vector is the ascii "abc" "def" "ghi", broken
78 * echo -n -e 'abcdefghijkl' | dd of=/tmp/test
107 * echo -n -e 'abc' | dd of=/tmp/test
485 g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), ==, expected->src); in test_addresses()
488 g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==, expected->dest); in test_addresses()
491 g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, expected->len); in test_addresses()
506 /* ast2600 */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dast2600-ampere.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
8 model = "AST2600 Ampere BMC";
9 compatible = "aspeed,ast2600-ampere", "aspeed,ast2600";
17 stdout-path = &uart5;
27 clock-frequency = <800000000>;
30 clock-frequency = <800000000>;
36 u-boot,dm-pre-reloc;
41 clock-frequency = <400000000>;
[all …]
H A Dast2600-x4tf.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
8 model = "AST2600 ASUS X4TF";
9 compatible = "aspeed,ast2600-asus", "aspeed,ast2600";
17 stdout-path = &uart5;
28 clock-frequency = <800000000>;
32 clock-frequency = <800000000>;
42 clock-frequency = <400000000>;
59 phy-mode = "rmii";
[all …]
H A Dast2600-facebook.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 …compatible = "facebook,harma-bmc", "facebook,minerva-bmc", "facebook,catalina-bmc", "aspeed,ast260…
17 stdout-path = &uart5;
26 clock-frequency = <800000000>;
29 clock-frequency = <800000000>;
35 u-boot,dm-pre-reloc;
40 clock-frequency = <400000000>;
46 pinctrl-names = "default";
[all …]
H A Dast2600-tacoma.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
29 clock-frequency = <800000000>;
32 clock-frequency = <800000000>;
38 u-boot,dm-pre-reloc;
43 clock-frequency = <400000000>;
47 u-boot,dm-pre-reloc;
[all …]
H A Dast2600-p10bmc.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "ibm,everest-bmc", "ibm,rainier-bmc", "ibm,p10bmc", "aspeed,ast2600";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 no-map;
28 stdout-path = &uart5;
40 clock-frequency = <800000000>;
[all …]
H A Dast2600-qcom-dc-scm-v1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
8 model = "Qualcomm DC-SCM V1 BMC";
9 compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
28 clock-frequency = <800000000>;
31 clock-frequency = <800000000>;
37 u-boot,dm-pre-reloc;
[all …]
H A Dast2600-greatlakes.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "facebook,greatlakes-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
27 clock-frequency = <800000000>;
30 clock-frequency = <800000000>;
36 u-boot,dm-pre-reloc;
41 clock-frequency = <400000000>;
58 pinctrl-names = "default";
[all …]
H A Dast2600-s6q.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "quanta,s6q-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
29 clock-frequency = <800000000>;
32 clock-frequency = <800000000>;
38 u-boot,dm-pre-reloc;
43 clock-frequency = <400000000>;
47 u-boot,dm-pre-reloc;
[all …]
H A Dast2600-bletchley.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
35 clock-frequency = <800000000>;
38 clock-frequency = <800000000>;
44 u-boot,dm-pre-reloc;
49 clock-frequency = <400000000>;
66 pinctrl-names = "default";
[all …]
H A Dast2600-pfr.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /dts-v1/;
4 #include "ast2600-u-boot.dtsi"
7 model = "AST2600 EVB";
8 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
16 stdout-path = &uart5;
34 clock-frequency = <800000000>;
37 clock-frequency = <800000000>;
43 u-boot,dm-pre-reloc;
48 clock-frequency = <400000000>;
[all …]
H A Dast2600-intel.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "ast2600-u-boot.dtsi"
7 model = "AST2600 Intel EGS server board";
8 compatible = "aspeed,ast2600-intel", "aspeed,ast2600";
16 stdout-path = &uart5;
34 clock-frequency = <1200000000>;
37 clock-frequency = <1200000000>;
43 u-boot,dm-pre-reloc;
48 clock-frequency = <400000000>;
[all …]
H A Dast2600-evb.dts1 /dts-v1/;
3 #include "ast2600-u-boot.dtsi"
6 model = "AST2600 EVB";
7 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
15 stdout-path = &uart5;
33 clock-frequency = <800000000>;
36 clock-frequency = <800000000>;
42 u-boot,dm-pre-reloc;
47 clock-frequency = <400000000>;
64 pinctrl-names = "default";
[all …]
H A Dast2600.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
3 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "aspeed,ast2600";
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
46 #address-cells = <1>;
47 #size-cells = <0>;
48 enable-method = "aspeed,ast2600-smp";
[all …]
/openbmc/u-boot/drivers/crypto/
H A Daspeed_hace_v1.c5 * SPDX-License-Identifier: GPL-2.0-or-later
79 debug("HACE src out of bounds: can only copy from SDRAM\n"); in digest_object()
80 return -EINVAL; in digest_object()
84 debug("HACE dest alignment incorrect: %p\n", digest); in digest_object()
85 return -EINVAL; in digest_object()
90 debug("HACE error: engine busy\n"); in digest_object()
91 return -EBUSY; in digest_object()
124 debug("HACE failure: %d\n", rc); in hw_sha1()
134 debug("HACE failure: %d\n", rc); in hw_sha256()
144 debug("HACE failure: %d\n", rc); in hw_sha384()
[all …]
H A Daspeed_hace.c1 // SPDX-License-Identifier: GPL-2.0-or-later
114 if (ctx->block_size == 64) { in aspeed_ahash_fill_padding()
115 bits[0] = cpu_to_be64(ctx->digcnt[0] << 3); in aspeed_ahash_fill_padding()
116 index = (ctx->bufcnt + remainder) & 0x3f; in aspeed_ahash_fill_padding()
117 padlen = (index < 56) ? (56 - index) : ((64 + 56) - index); in aspeed_ahash_fill_padding()
118 *(ctx->buffer + ctx->bufcnt) = 0x80; in aspeed_ahash_fill_padding()
119 memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1); in aspeed_ahash_fill_padding()
120 memcpy(ctx->buffer + ctx->bufcnt + padlen, bits, 8); in aspeed_ahash_fill_padding()
121 ctx->bufcnt += padlen + 8; in aspeed_ahash_fill_padding()
123 bits[1] = cpu_to_be64(ctx->digcnt[0] << 3); in aspeed_ahash_fill_padding()
[all …]
/openbmc/qemu/hw/arm/
H A Daspeed_ast2600.c4 * Copyright (c) 2016-2019, IBM Corporation.
7 * the COPYING file in the top-level directory.
15 #include "qemu/error-report.h"
19 #include "target/arm/cpu-qom.h"
96 /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
138 [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */
139 [ASPEED_DEV_PCIE] = 167, /* 167 -> 168 */
146 [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */
150 [ASPEED_DEV_I3C] = 102, /* 102 -> 107 */
158 return qdev_get_gpio_in(DEVICE(&a->a7mpcore), sc->irqmap[dev]); in aspeed_soc_ast2600_get_irq()
[all …]
H A Daspeed_ast10x0.c7 * the COPYING file in the top-level directory.
9 * Implementation extracted from the AST2600 and adapted for Ast10x0.
14 #include "exec/address-spaces.h"
16 #include "hw/qdev-clock.h"
93 [ASPEED_DEV_I3C] = 102, /* 102 -> 105 */
95 [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */
107 return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]); in aspeed_soc_ast1030_get_irq()
119 if (sscanf(sc->name, "%7s", socname) != 1) { in aspeed_soc_ast1030_init()
123 object_initialize_child(obj, "armv7m", &a->armv7m, TYPE_ARMV7M); in aspeed_soc_ast1030_init()
125 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in aspeed_soc_ast1030_init()
[all …]
H A Daspeed_ast2400.c10 * the COPYING file in the top-level directory.
18 #include "hw/char/serial-mm.h"
20 #include "qemu/error-report.h"
24 #include "target/arm/cpu-qom.h"
148 return qdev_get_gpio_in(DEVICE(&a->vic), sc->irqmap[dev]); in aspeed_soc_ast2400_get_irq()
160 if (sscanf(sc->name, "%7s", socname) != 1) { in aspeed_ast2400_soc_init()
164 for (i = 0; i < sc->num_cpus; i++) { in aspeed_ast2400_soc_init()
165 object_initialize_child(obj, "cpu[*]", &a->cpu[i], in aspeed_ast2400_soc_init()
169 snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); in aspeed_ast2400_soc_init()
170 object_initialize_child(obj, "scu", &s->scu, typename); in aspeed_ast2400_soc_init()
[all …]
/openbmc/linux/drivers/crypto/aspeed/
H A Daspeed-hace.c1 // SPDX-License-Identifier: GPL-2.0+
6 #include "aspeed-hace.h"
9 #include <linux/dma-mapping.h>
23 dev_info((d)->dev, "%s() " fmt, __func__, ##__VA_ARGS__)
26 dev_dbg((d)->dev, "%s() " fmt, __func__, ##__VA_ARGS__)
29 /* HACE interrupt service routine */
33 struct aspeed_engine_crypto *crypto_engine = &hace_dev->crypto_engine; in aspeed_hace_irq()
34 struct aspeed_engine_hash *hash_engine = &hace_dev->hash_engine; in aspeed_hace_irq()
43 if (hash_engine->flags & CRYPTO_FLAGS_BUSY) in aspeed_hace_irq()
44 tasklet_schedule(&hash_engine->done_task); in aspeed_hace_irq()
[all …]
/openbmc/qemu/include/hw/misc/
H A Daspeed_hace.h7 * SPDX-License-Identifier: GPL-2.0-or-later
16 #define TYPE_ASPEED_HACE "aspeed.hace"
17 #define TYPE_ASPEED_AST2400_HACE TYPE_ASPEED_HACE "-ast2400"
18 #define TYPE_ASPEED_AST2500_HACE TYPE_ASPEED_HACE "-ast2500"
19 #define TYPE_ASPEED_AST2600_HACE TYPE_ASPEED_HACE "-ast2600"
20 #define TYPE_ASPEED_AST1030_HACE TYPE_ASPEED_HACE "-ast1030"
/openbmc/qemu/docs/system/arm/
H A Daspeed.rst1 …-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280…
6 Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
7 AST2500 with an ARM1176JZS CPU (800MHz), the AST2600
8 with dual cores ARM Cortex-A7 CPUs (1.2GHz) and more recently the AST2700
9 with quad cores ARM Cortex-A35 64 bits CPUs (1.6GHz)
16 - ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
17 - ``quanta-q71l-bmc`` OpenBMC Quanta BMC
18 - ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S)
19 - ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176)
23 - ``ast2500-evb`` Aspeed AST2500 Evaluation board
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
[all …]
/openbmc/qemu/hw/misc/
H A Daspeed_hace.c9 * SPDX-License-Identifier: GPL-2.0-or-later
14 #include "qemu/error-report.h"
19 #include "hw/qdev-properties.h"
62 /* Scatter-gather data list */
95 return -1; in hash_algo_lookup()
101 * @param s aspeed hace state object
111 *total_msg_len = (uint32_t)(ldq_be_p(iov->iov_base + req_len - 8) / 8); in has_padding()
121 * 3. Current request len - padding_size to get padding offset. in has_padding()
124 if (*total_msg_len <= s->total_req_len) { in has_padding()
125 uint32_t padding_size = s->total_req_len - *total_msg_len; in has_padding()
[all …]

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