aarch64 - OpenGrok history log for /openbmc/qemu/tcg/aarch64

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b04574d4	15-May-2024	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Support TCG_TARGET_HAS_tst_vec Signed-off-by: Richard Henderson <richard.henderson@linaro.org> tcg-target.c.inc tcg-target.h /openbmc/qemu/tcg/tcg-op-vec.c
af8c14a2	15-May-2024	Richard Henderson <richard.henderson@linaro.org>	tcg: Introduce TCG_TARGET_HAS_tst_vec Prelude to supporting TCG_COND_TST* in vector comparisons. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.he tcg: Introduce TCG_TARGET_HAS_tst_vec Prelude to supporting TCG_COND_TST* in vector comparisons. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/.gitlab-ci.d/base.yml /openbmc/qemu/.gitlab-ci.d/buildtest-template.yml /openbmc/qemu/.gitlab-ci.d/buildtest.yml /openbmc/qemu/.gitlab-ci.d/cirrus.yml /openbmc/qemu/.gitlab-ci.d/container-core.yml /openbmc/qemu/.gitlab-ci.d/crossbuild-template.yml /openbmc/qemu/.gitlab-ci.d/crossbuilds.yml /openbmc/qemu/.gitlab-ci.d/custom-runners.yml /openbmc/qemu/.gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml /openbmc/qemu/.gitlab-ci.d/windows.yml /openbmc/qemu/.mailmap /openbmc/qemu/.travis.yml /openbmc/qemu/Kconfig.host /openbmc/qemu/MAINTAINERS /openbmc/qemu/Makefile /openbmc/qemu/VERSION /openbmc/qemu/accel/hvf/hvf-accel-ops.c /openbmc/qemu/accel/kvm/kvm-accel-ops.c /openbmc/qemu/accel/kvm/kvm-all.c /openbmc/qemu/accel/kvm/trace-events /openbmc/qemu/accel/stubs/kvm-stub.c /openbmc/qemu/accel/stubs/tcg-stub.c /openbmc/qemu/accel/tcg/cpu-exec.c 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4fe19bbb	09-Mar-2024	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Fix tcg_out_brcond for test comparisons When converting test vs UINT32_MAX to compare vs 0, we need to adjust the condition to match. Fixes: 34aff3c2e06 ("tcg/aarch64: Generate CBNZ fo tcg/aarch64: Fix tcg_out_brcond for test comparisons When converting test vs UINT32_MAX to compare vs 0, we need to adjust the condition to match. Fixes: 34aff3c2e06 ("tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... tcg-target.c.inc
1d24c36b	09-Mar-2024	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Fix tcg_out_cmp for test comparisons Pass the type to tcg_out_logicali; remove the assert, duplicated at the start of tcg_out_logicali. Fixes: 339adf2f38e ("tcg/aarch64: Support TCG_CO tcg/aarch64: Fix tcg_out_cmp for test comparisons Pass the type to tcg_out_logicali; remove the assert, duplicated at the start of tcg_out_logicali. Fixes: 339adf2f38e ("tcg/aarch64: Support TCG_COND_TST{EQ,NE}") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/.gitlab-ci.d/base.yml /openbmc/qemu/.gitlab-ci.d/buildtest.yml /openbmc/qemu/.gitlab-ci.d/cirrus.yml /openbmc/qemu/.gitlab-ci.d/opensbi.yml /openbmc/qemu/MAINTAINERS /openbmc/qemu/accel/tcg/cpu-exec.c /openbmc/qemu/accel/tcg/cputlb.c /openbmc/qemu/accel/tcg/plugin-gen.c /openbmc/qemu/accel/tcg/translate-all.c /openbmc/qemu/accel/tcg/user-exec.c /openbmc/qemu/accel/xen/xen-all.c /openbmc/qemu/blockdev.c /openbmc/qemu/bsd-user/bsd-file.h /openbmc/qemu/bsd-user/freebsd/os-proc.h /openbmc/qemu/bsd-user/main.c /openbmc/qemu/bsd-user/qemu.h /openbmc/qemu/bsd-user/signal.c /openbmc/qemu/chardev/char-fe.c /openbmc/qemu/chardev/char-socket.c /openbmc/qemu/configs/devices/mips-softmmu/common.mak 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7f89fdf8	16-Feb-2024	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Apple does not align __int128_t in even registers From https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms When passing an argument with 16-byte al tcg/aarch64: Apple does not align __int128_t in even registers From https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms When passing an argument with 16-byte alignment in integer registers, Apple platforms allow the argument to start in an odd-numbered xN register. The standard ABI requires it to begin in an even-numbered xN register. Cc: qemu-stable@nongnu.org Fixes: 5427a9a7604 ("tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2169 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <9fc0c2c7-dd57-459e-aecb-528edb74b4a7@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> show more ... /openbmc/qemu/.gitlab-ci.d/buildtest.yml /openbmc/qemu/.gitlab-ci.d/cirrus/build.yml /openbmc/qemu/.gitlab-ci.d/container-cross.yml /openbmc/qemu/.gitlab-ci.d/crossbuilds.yml /openbmc/qemu/.gitlab-ci.d/windows.yml /openbmc/qemu/MAINTAINERS /openbmc/qemu/accel/Kconfig /openbmc/qemu/accel/kvm/kvm-all.c /openbmc/qemu/accel/stubs/kvm-stub.c /openbmc/qemu/accel/tcg/ldst_atomicity.c.inc /openbmc/qemu/accel/tcg/plugin-gen.c /openbmc/qemu/accel/tcg/plugin-helpers.h /openbmc/qemu/audio/meson.build /openbmc/qemu/backends/hostmem.c /openbmc/qemu/block.c /openbmc/qemu/block/blkio.c /openbmc/qemu/block/block-backend.c /openbmc/qemu/block/crypto.c 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34aff3c2	27-Oct-2023	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX ... and the inverse, CBZ for TSTEQ. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Sign tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX ... and the inverse, CBZ for TSTEQ. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... tcg-target.c.inc
92a11b93	19-Jan-2024	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Generate TBZ, TBNZ Test the sign bit for LT/GE vs 0, and TSTNE/EQ vs a power of 2. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240119224737.48943-2-philmd@ tcg/aarch64: Generate TBZ, TBNZ Test the sign bit for LT/GE vs 0, and TSTNE/EQ vs a power of 2. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240119224737.48943-2-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... tcg-target.c.inc
a0f5b3fc	19-Jan-2024	Philippe Mathieu-Daudé <philmd@linaro.org>	tcg/aarch64: Massage tcg_out_brcond() In order to ease next commit review, modify tcg_out_brcond() to switch over TCGCond. No logical change intended. Signed-off-by: Philippe Mathieu-Daudé <philmd@ tcg/aarch64: Massage tcg_out_brcond() In order to ease next commit review, modify tcg_out_brcond() to switch over TCGCond. No logical change intended. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240119224737.48943-1-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... tcg-target.c.inc
339adf2f	23-Oct-2023	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Support TCG_COND_TST{EQ,NE} Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> tcg-target-con-set.h tcg-target-con-str.h tcg-target.c.inc tcg-target.h
21e9a8ae	27-Oct-2023	Richard Henderson <richard.henderson@linaro.org>	tcg: Add TCGConst argument to tcg_target_const_match Fill the new argument from any condition within the opcode. Not yet used within any backend. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro. tcg: Add TCGConst argument to tcg_target_const_match Fill the new argument from any condition within the opcode. Not yet used within any backend. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/target/alpha/translate.c /openbmc/qemu/target/m68k/translate.c /openbmc/qemu/target/s390x/tcg/translate.c /openbmc/qemu/target/sparc/translate.c tcg-target.c.inc /openbmc/qemu/tcg/arm/tcg-target.c.inc /openbmc/qemu/tcg/i386/tcg-target.c.inc /openbmc/qemu/tcg/loongarch64/tcg-target.c.inc /openbmc/qemu/tcg/mips/tcg-target.c.inc /openbmc/qemu/tcg/optimize.c /openbmc/qemu/tcg/ppc/tcg-target.c.inc /openbmc/qemu/tcg/riscv/tcg-target.c.inc /openbmc/qemu/tcg/s390x/tcg-target.c.inc /openbmc/qemu/tcg/sparc64/tcg-target.c.inc /openbmc/qemu/tcg/tcg-internal.h /openbmc/qemu/tcg/tcg.c /openbmc/qemu/tcg/tci/tcg-target.c.inc
caf3eacc	08-Jan-2024	Richard Henderson <richard.henderson@linaro.org>	tcg: Introduce TCG_TARGET_HAS_tst Define as 0 for all tcg backends. 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b701f195	25-Oct-2023	Richard Henderson <richard.henderson@linaro.org>	tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231026041404.1 tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231026041404.1229328-7-richard.henderson@linaro.org> show more ... /openbmc/qemu/include/tcg/tcg-opc.h /openbmc/qemu/include/tcg/tcg.h tcg-target.h /openbmc/qemu/tcg/arm/tcg-target.h /openbmc/qemu/tcg/i386/tcg-target.h /openbmc/qemu/tcg/loongarch64/tcg-target.c.inc /openbmc/qemu/tcg/loongarch64/tcg-target.h /openbmc/qemu/tcg/mips/tcg-target.c.inc /openbmc/qemu/tcg/mips/tcg-target.h /openbmc/qemu/tcg/optimize.c /openbmc/qemu/tcg/ppc/tcg-target.h /openbmc/qemu/tcg/riscv/tcg-target.h /openbmc/qemu/tcg/s390x/tcg-target.h /openbmc/qemu/tcg/sparc64/tcg-target.h /openbmc/qemu/tcg/tcg-op.c /openbmc/qemu/tcg/tcg.c /openbmc/qemu/tcg/tci.c /openbmc/qemu/tcg/tci/tcg-target.h
3871be75	25-Oct-2023	Richard Henderson <richard.henderson@linaro.org>	tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64} The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <202310260414 tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64} The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231026041404.1229328-4-richard.henderson@linaro.org> show more ... /openbmc/qemu/.gitlab-ci.d/buildtest.yml /openbmc/qemu/.gitlab-ci.d/container-cross.yml /openbmc/qemu/MAINTAINERS /openbmc/qemu/Makefile /openbmc/qemu/accel/kvm/kvm-all.c /openbmc/qemu/accel/stubs/kvm-stub.c /openbmc/qemu/accel/tcg/cputlb.c /openbmc/qemu/accel/tcg/internal-common.h /openbmc/qemu/accel/tcg/ldst_atomicity.c.inc /openbmc/qemu/accel/tcg/monitor.c /openbmc/qemu/accel/tcg/plugin-gen.c /openbmc/qemu/accel/tcg/translate-all.c /openbmc/qemu/audio/audio.c /openbmc/qemu/backends/dbus-vmstate.c /openbmc/qemu/backends/tpm/tpm_emulator.c /openbmc/qemu/block.c /openbmc/qemu/block/blkio.c /openbmc/qemu/block/io_uring.c /openbmc/qemu/block/linux-aio.c /openbmc/qemu/block/meson.build /openbmc/qemu/block/mirror.c /openbmc/qemu/block/monitor/block-hmp-cmds.c /openbmc/qemu/block/nvme.c /openbmc/qemu/block/parallels.c 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e2b7a40d	01-Oct-2023	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Use tcg_use_softmmu Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> /openbmc/qemu/.gitlab-ci.d/buildtest.yml /openbmc/qemu/.gitlab-ci.d/cirrus/macos-12.vars /openbmc/qemu/.gitlab-ci.d/container-cross.yml /openbmc/qemu/.mailmap /openbmc/qemu/MAINTAINERS /openbmc/qemu/accel/accel-system.c /openbmc/qemu/accel/accel-system.h /openbmc/qemu/accel/accel-target.c /openbmc/qemu/accel/kvm/kvm-all.c /openbmc/qemu/accel/meson.build /openbmc/qemu/accel/stubs/kvm-stub.c /openbmc/qemu/accel/stubs/meson.build /openbmc/qemu/accel/tcg/icount-common.c /openbmc/qemu/accel/tcg/plugin-gen.c /openbmc/qemu/accel/tcg/translator.c /openbmc/qemu/audio/audio.c /openbmc/qemu/audio/audio.h /openbmc/qemu/audio/ossaudio.c /openbmc/qemu/backends/tpm/tpm_emulator.c /openbmc/qemu/block.c /openbmc/qemu/block/backup.c /openbmc/qemu/block/block-backend.c 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7893e42d	04-Oct-2023	Philippe Mathieu-Daudé <philmd@linaro.org>	tcg: Correct invalid mentions of 'softmmu' by 'system-mode' Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004090629.37473-6-philmd@linaro.org> Signed-off-by: Paolo Bonz tcg: Correct invalid mentions of 'softmmu' by 'system-mode' Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004090629.37473-6-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> show more ... /openbmc/qemu/.travis.yml /openbmc/qemu/MAINTAINERS /openbmc/qemu/accel/accel-target.c /openbmc/qemu/accel/meson.build /openbmc/qemu/accel/tcg/cpu-exec-common.c /openbmc/qemu/accel/tcg/cpu-exec.c /openbmc/qemu/accel/tcg/cputlb.c /openbmc/qemu/accel/tcg/icount-common.c /openbmc/qemu/accel/tcg/internal-common.h /openbmc/qemu/accel/tcg/internal-target.h /openbmc/qemu/accel/tcg/ldst_common.c.inc /openbmc/qemu/accel/tcg/meson.build /openbmc/qemu/accel/tcg/monitor.c /openbmc/qemu/accel/tcg/tb-maint.c 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623912cc	13-Sep-2023	Anton Johansson <anjo@rev.ng>	accel/tcg: Remove env_tlb() The function is no longer used to access the TLB, and has been replaced by cpu->neg.tlb. Signed-off-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230912153428.17816-9 accel/tcg: Remove env_tlb() The function is no longer used to access the TLB, and has been replaced by cpu->neg.tlb. Signed-off-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230912153428.17816-9-anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> [rth: Merge comment update patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/.gitlab-ci.d/base.yml /openbmc/qemu/.gitlab-ci.d/cirrus.yml /openbmc/qemu/.gitlab-ci.d/cirrus/build.yml /openbmc/qemu/MAINTAINERS /openbmc/qemu/accel/accel-common.c /openbmc/qemu/accel/dummy-cpus.c /openbmc/qemu/accel/hvf/hvf-accel-ops.c /openbmc/qemu/accel/kvm/kvm-accel-ops.c /openbmc/qemu/accel/kvm/kvm-all.c /openbmc/qemu/accel/tcg/atomic_template.h /openbmc/qemu/accel/tcg/cpu-exec-common.c /openbmc/qemu/accel/tcg/cpu-exec.c /openbmc/qemu/accel/tcg/cputlb.c /openbmc/qemu/accel/tcg/internal.h /openbmc/qemu/accel/tcg/ldst_atomicity.c.inc /openbmc/qemu/accel/tcg/plugin-gen.c /openbmc/qemu/accel/tcg/tb-maint.c /openbmc/qemu/accel/tcg/tcg-accel-ops-icount.c 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5826a0db	15-Aug-2023	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Emit BTI insns at jump landing pads The prologue is entered via "call"; the epilogue, each tb, and each goto_tb continuation point are all reached via "jump". As tcg_out_goto_long is o tcg/aarch64: Emit BTI insns at jump landing pads The prologue is entered via "call"; the epilogue, each tb, and each goto_tb continuation point are all reached via "jump". As tcg_out_goto_long is only used by tcg_out_exit_tb, merge the two functions. Change the indirect register used to TCG_REG_TMP1, aka X17, so that the BTI condition created is "jump" instead of "jump or call". Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/host/include/aarch64/host/cpuinfo.h tcg-target.c.inc /openbmc/qemu/util/cpuinfo-aarch64.c
9358fbbf	15-Aug-2023	Richard Henderson <richard.henderson@linaro.org>	tcg: Add tcg_out_tb_start backend hook This hook may emit code at the beginning of the TB. Suggested-by: Jordan Niethe <jniethe5@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> S tcg: Add tcg_out_tb_start backend hook This hook may emit code at the beginning of the TB. Suggested-by: Jordan Niethe <jniethe5@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/accel/tcg/cputlb.c /openbmc/qemu/accel/tcg/tcg-runtime-gvec.c /openbmc/qemu/accel/tcg/tcg-runtime.h /openbmc/qemu/fpu/softfloat-parts.c.inc /openbmc/qemu/fpu/softfloat.c /openbmc/qemu/include/fpu/softfloat.h /openbmc/qemu/include/hw/core/cpu.h /openbmc/qemu/include/qemu/plugin-memory.h /openbmc/qemu/include/qemu/typedefs.h /openbmc/qemu/include/tcg/tcg-op-gvec-common.h /openbmc/qemu/plugins/api.c /openbmc/qemu/target/arm/tcg/translate.c tcg-target.c.inc /openbmc/qemu/tcg/arm/tcg-target.c.inc /openbmc/qemu/tcg/i386/tcg-target.c.inc /openbmc/qemu/tcg/loongarch64/tcg-target-con-set.h /openbmc/qemu/tcg/loongarch64/tcg-target-con-str.h /openbmc/qemu/tcg/loongarch64/tcg-target.c.inc /openbmc/qemu/tcg/loongarch64/tcg-target.h /openbmc/qemu/tcg/mips/tcg-target.c.inc /openbmc/qemu/tcg/ppc/tcg-target.c.inc /openbmc/qemu/tcg/riscv/tcg-target.c.inc /openbmc/qemu/tcg/s390x/tcg-target.c.inc /openbmc/qemu/tcg/sparc64/tcg-target.c.inc /openbmc/qemu/tcg/tcg-op-gvec.c /openbmc/qemu/tcg/tcg.c /openbmc/qemu/tcg/tci/tcg-target.c.inc /openbmc/qemu/tests/tcg/m68k/Makefile.target /openbmc/qemu/tests/tcg/m68k/denormal.c
ebe92db2	07-Sep-2023	Jiajie Chen <c@jia.je>	tcg: pass vece to tcg_target_const_match() Pass vece to tcg_target_const_match() to allow correct interpretation of const args of vector ops. Signed-off-by: Jiajie Chen <c@jia.je> Reviewed-by: Rich tcg: pass vece to tcg_target_const_match() Pass vece to tcg_target_const_match() to allow correct interpretation of const args of vector ops. Signed-off-by: Jiajie Chen <c@jia.je> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230908022302.180442-4-c@jia.je> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/.gitlab-ci.d/buildtest-template.yml /openbmc/qemu/.gitlab-ci.d/buildtest.yml /openbmc/qemu/.gitlab-ci.d/cirrus.yml /openbmc/qemu/.gitlab-ci.d/cirrus/freebsd-13.vars /openbmc/qemu/.gitlab-ci.d/cirrus/macos-12.vars /openbmc/qemu/.gitlab-ci.d/crossbuild-template.yml /openbmc/qemu/.gitlab-ci.d/windows.yml /openbmc/qemu/MAINTAINERS /openbmc/qemu/Makefile /openbmc/qemu/accel/Kconfig /openbmc/qemu/accel/kvm/kvm-all.c /openbmc/qemu/accel/stubs/meson.build /openbmc/qemu/accel/tcg/cpu-exec-common.c /openbmc/qemu/accel/tcg/cputlb.c /openbmc/qemu/accel/tcg/meson.build /openbmc/qemu/accel/tcg/tb-maint.c /openbmc/qemu/accel/tcg/tcg-accel-ops-mttcg.c /openbmc/qemu/audio/mixeng.h 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4daad8d9	23-Aug-2023	Michael Tokarev <mjt@tls.msk.ru>	tcg: spelling fixes Acked-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Message-Id: <20230823065335.1919380-4-mjt@tls.msk.ru> Signed-off-by: Richard Hender tcg: spelling fixes Acked-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Message-Id: <20230823065335.1919380-4-mjt@tls.msk.ru> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/docs/devel/tcg-ops.rst /openbmc/qemu/target/cris/translate.c tcg-target.c.inc /openbmc/qemu/tcg/arm/tcg-target.c.inc /openbmc/qemu/tcg/arm/tcg-target.h /openbmc/qemu/tcg/i386/tcg-target.c.inc /openbmc/qemu/tcg/i386/tcg-target.h /openbmc/qemu/tcg/riscv/tcg-target.c.inc /openbmc/qemu/tcg/riscv/tcg-target.h /openbmc/qemu/tcg/s390x/tcg-target.c.inc /openbmc/qemu/tcg/s390x/tcg-target.h /openbmc/qemu/tcg/sparc64/tcg-target.c.inc /openbmc/qemu/tcg/sparc64/tcg-target.h /openbmc/qemu/tcg/tcg-op.c
f58a7dea	05-Aug-2023	Richard Henderson <richard.henderson@linaro.org>	tcg/aarch64: Implement negsetcond_* Trivial, as aarch64 has an instruction for this: CSETM. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson tcg/aarch64: Implement negsetcond_* Trivial, as aarch64 has an instruction for this: CSETM. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/target/alpha/translate.c /openbmc/qemu/target/arm/tcg/translate-a64.c /openbmc/qemu/target/arm/tcg/translate.c /openbmc/qemu/target/m68k/translate.c /openbmc/qemu/target/openrisc/translate.c /openbmc/qemu/target/ppc/translate/fixedpoint-impl.c.inc /openbmc/qemu/target/ppc/translate/vmx-impl.c.inc /openbmc/qemu/target/sparc/translate.c /openbmc/qemu/target/tricore/translate.c tcg-target.c.inc tcg-target.h /openbmc/qemu/tcg/ppc/tcg-target.c.inc /openbmc/qemu/tcg/ppc/tcg-target.h /openbmc/qemu/tcg/tcg-op-gvec.c /openbmc/qemu/tcg/tcg-op.c
3635502d	04-Aug-2023	Richard Henderson <richard.henderson@linaro.org>	tcg: Introduce negsetcond opcodes Introduce a new opcode for negative setcond. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> /openbmc/qemu/docs/devel/tcg-ops.rst /openbmc/qemu/include/tcg/tcg-op-common.h /openbmc/qemu/include/tcg/tcg-op.h /openbmc/qemu/include/tcg/tcg-opc.h /openbmc/qemu/include/tcg/tcg.h tcg-target.h /openbmc/qemu/tcg/arm/tcg-target.h /openbmc/qemu/tcg/i386/tcg-target.h /openbmc/qemu/tcg/loongarch64/tcg-target.h /openbmc/qemu/tcg/mips/tcg-target.h /openbmc/qemu/tcg/optimize.c /openbmc/qemu/tcg/ppc/tcg-target.h /openbmc/qemu/tcg/riscv/tcg-target.h /openbmc/qemu/tcg/s390x/tcg-target.h /openbmc/qemu/tcg/sparc64/tcg-target.h /openbmc/qemu/tcg/tcg-op.c /openbmc/qemu/tcg/tcg.c /openbmc/qemu/tcg/tci/tcg-target.h
13d885b0	22-Aug-2023	Richard Henderson <richard.henderson@linaro.org>	tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 Replace the separate defines with TCG_TARGET_HAS_extr_i64_i32, so that the two parts of backend-specific type changing cannot be out of sync. Reported-by: tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 Replace the separate defines with TCG_TARGET_HAS_extr_i64_i32, so that the two parts of backend-specific type changing cannot be out of sync. Reported-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: <20230822175127.1173698-1-richard.henderson@linaro.org> show more ... /openbmc/qemu/.gitignore /openbmc/qemu/.gitlab-ci.d/base.yml /openbmc/qemu/.gitlab-ci.d/buildtest-template.yml /openbmc/qemu/.gitlab-ci.d/buildtest.yml /openbmc/qemu/.gitlab-ci.d/cirrus/kvm-build.yml /openbmc/qemu/.gitlab-ci.d/container-template.yml /openbmc/qemu/.gitlab-ci.d/crossbuild-template.yml /openbmc/qemu/.gitlab-ci.d/crossbuilds.yml /openbmc/qemu/.gitlab-ci.d/opensbi.yml /openbmc/qemu/.gitlab-ci.d/static_checks.yml /openbmc/qemu/.gitlab-ci.d/windows.yml /openbmc/qemu/.gitmodules /openbmc/qemu/.mailmap /openbmc/qemu/MAINTAINERS /openbmc/qemu/Makefile /openbmc/qemu/VERSION /openbmc/qemu/accel/hvf/hvf-accel-ops.c /openbmc/qemu/accel/hvf/hvf-all.c /openbmc/qemu/accel/kvm/kvm-all.c /openbmc/qemu/accel/meson.build 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d46259c0	01-May-2023	Richard Henderson <richard.henderson@linaro.org>	tcg: Split out tcg-target-reg-bits.h Often, the only thing we need to know about the TCG host is the register size. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard He tcg: Split out tcg-target-reg-bits.h Often, the only thing we need to know about the TCG host is the register size. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/accel/tcg/monitor.c /openbmc/qemu/accel/tcg/tcg-accel-ops-mttcg.c /openbmc/qemu/accel/tcg/tcg-accel-ops-rr.c /openbmc/qemu/include/tcg/tcg.h /openbmc/qemu/target/avr/cpu.c /openbmc/qemu/target/avr/helper.c /openbmc/qemu/target/i386/helper.c /openbmc/qemu/target/openrisc/sys_helper.c /openbmc/qemu/target/rx/cpu.c /openbmc/qemu/target/rx/op_helper.c /openbmc/qemu/target/tricore/cpu.c tcg-target-reg-bits.h /openbmc/qemu/tcg/arm/tcg-target-reg-bits.h /openbmc/qemu/tcg/i386/tcg-target-reg-bits.h /openbmc/qemu/tcg/i386/tcg-target.h /openbmc/qemu/tcg/loongarch64/tcg-target-reg-bits.h /openbmc/qemu/tcg/loongarch64/tcg-target.h /openbmc/qemu/tcg/mips/tcg-target-reg-bits.h /openbmc/qemu/tcg/mips/tcg-target.h /openbmc/qemu/tcg/ppc/tcg-target-reg-bits.h /openbmc/qemu/tcg/ppc/tcg-target.h /openbmc/qemu/tcg/riscv/tcg-target-reg-bits.h /openbmc/qemu/tcg/riscv/tcg-target.h /openbmc/qemu/tcg/s390x/tcg-target-reg-bits.h /openbmc/qemu/tcg/s390x/tcg-target.c.inc /openbmc/qemu/tcg/sparc64/tcg-target-reg-bits.h /openbmc/qemu/tcg/tci/tcg-target-reg-bits.h /openbmc/qemu/tcg/tci/tcg-target.h
d0a9bb5e	27-Mar-2023	Richard Henderson <richard.henderson@linaro.org>	tcg: Add tlb_fast_offset to TCGContext Disconnect the layout of ArchCPU from TCG compilation. Pass the relative offset of 'env' and 'neg.tlb.f' as a parameter. Reviewed-by: Philippe Mathieu-Daudé < tcg: Add tlb_fast_offset to TCGContext Disconnect the layout of ArchCPU from TCG compilation. Pass the relative offset of 'env' and 'neg.tlb.f' as a parameter. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> show more ... /openbmc/qemu/accel/tcg/translate-all.c /openbmc/qemu/include/exec/cpu-defs.h /openbmc/qemu/include/exec/tlb-common.h /openbmc/qemu/include/tcg/tcg.h tcg-target.c.inc /openbmc/qemu/tcg/arm/tcg-target.c.inc /openbmc/qemu/tcg/i386/tcg-target.c.inc /openbmc/qemu/tcg/loongarch64/tcg-target.c.inc /openbmc/qemu/tcg/mips/tcg-target.c.inc /openbmc/qemu/tcg/ppc/tcg-target.c.inc /openbmc/qemu/tcg/riscv/tcg-target.c.inc /openbmc/qemu/tcg/s390x/tcg-target.c.inc /openbmc/qemu/tcg/sparc64/tcg-target.c.inc /openbmc/qemu/tcg/tcg.c
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