Home
last modified time | relevance | path

Searched refs:input_clk (Results 1 – 23 of 23) sorted by relevance

/openbmc/u-boot/drivers/i2c/
H A Di2c-uniphier.c43 unsigned long input_clk; /* master clock (Hz) */ member
60 priv->input_clk = IOBUS_FREQ; in uniphier_i2c_probe()
186 writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed), in uniphier_i2c_set_bus_speed()
H A Di2c-cdns.c161 static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk, in cdns_i2c_calc_divs() argument
169 temp = input_clk / (22 * fscl); in cdns_i2c_calc_divs()
180 div_b = DIV_ROUND_UP(input_clk, 22 * fscl * (div_a + 1)); in cdns_i2c_calc_divs()
186 actual_fscl = input_clk / (22 * (div_a + 1) * (div_b + 1)); in cdns_i2c_calc_divs()
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsnps,hsdk-pll-clock.txt17 input_clk: input-clk {
27 clocks = <&input_clk>;
/openbmc/linux/drivers/i2c/busses/
H A Di2c-cadence.c205 unsigned long input_clk; member
1014 static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk, in cdns_i2c_calc_divs() argument
1022 temp = input_clk / (22 * fscl); in cdns_i2c_calc_divs()
1033 div_b = DIV_ROUND_UP(input_clk, 22 * fscl * (div_a + 1)); in cdns_i2c_calc_divs()
1039 actual_fscl = input_clk / (22 * (div_a + 1) * (div_b + 1)); in cdns_i2c_calc_divs()
1129 unsigned long input_clk = ndata->new_rate; in cdns_i2c_clk_notifier_cb() local
1134 ret = cdns_i2c_calc_divs(&fscl, input_clk, &div_a, &div_b); in cdns_i2c_clk_notifier_cb()
1148 id->input_clk = ndata->new_rate; in cdns_i2c_clk_notifier_cb()
1359 id->input_clk = clk_get_rate(id->clk); in cdns_i2c_probe()
1378 ret = cdns_i2c_setclk(id->input_clk, id); in cdns_i2c_probe()
H A Di2c-xiic.c97 unsigned long input_clk; member
379 __func__, i2c->input_clk, i2c->i2c_clk); in xiic_setclk()
382 if (!i2c->i2c_clk || !i2c->input_clk) in xiic_setclk()
385 clk_in_mhz = DIV_ROUND_UP(i2c->input_clk, 1000000); in xiic_setclk()
410 reg_val = (DIV_ROUND_UP(i2c->input_clk, 2 * i2c->i2c_clk)) - 7; in xiic_setclk()
1273 i2c->input_clk = clk_get_rate(i2c->clk); in xiic_i2c_probe()
/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_led.c60 u32 input_clk = 27e6; /* PDISPLAY.SOR[1].PWM is connected to the crystal */ in nouveau_led_set_brightness() local
64 div = input_clk / freq; in nouveau_led_set_brightness()
/openbmc/qemu/hw/char/
H A Dcadence_uart.c177 unsigned int baud_rate, packet_size, input_clk; in uart_parameters_setup() local
178 input_clk = clock_get_hz(s->refclk); in uart_parameters_setup()
180 baud_rate = (s->r[R_MR] & UART_MR_CLKS) ? input_clk / 8 : input_clk; in uart_parameters_setup()
/openbmc/linux/arch/arc/boot/dts/
H A Dhsdk.dts62 input_clk: input-clk { label
127 clocks = <&input_clk>;
273 clocks = <&input_clk>;
H A Daxc003.dtsi24 input_clk: input-clk { label
34 clocks = <&input_clk>;
H A Daxc003_idu.dtsi24 input_clk: input-clk { label
34 clocks = <&input_clk>;
H A Daxc001.dtsi31 input_clk: input-clk { label
H A Daxs10x_mb.dtsi70 clocks = <&input_clk>;
/openbmc/u-boot/drivers/mmc/
H A Ddavinci_mmc.c37 uint input_clk; /* Input clock to MMC controller */ member
71 sysclk2 = host->input_clk;
511 priv->input_clk = clk_get(DAVINCI_MMCSD_CLKID);
/openbmc/u-boot/board/lego/ev3/
H A Dlegoev3.c51 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); in board_mmc_init()
/openbmc/u-boot/arch/arm/mach-davinci/include/mach/
H A Dsdmmc_defs.h149 uint input_clk; /* Input clock to MMC controller */ member
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c2965 int32_t input_clk, input_vol, i; in vega20_odn_edit_dpm_table() local
2989 input_clk = input[i + 1]; in vega20_odn_edit_dpm_table()
3000 input_clk, in vega20_odn_edit_dpm_table()
3011 od_table->GfxclkFmin = input_clk; in vega20_odn_edit_dpm_table()
3013 od_table->GfxclkFmax = input_clk; in vega20_odn_edit_dpm_table()
3032 input_clk = input[i + 1]; in vega20_odn_edit_dpm_table()
3043 input_clk, in vega20_odn_edit_dpm_table()
3052 od_table->UclkFmax = input_clk; in vega20_odn_edit_dpm_table()
3076 input_clk = input[i + 1]; in vega20_odn_edit_dpm_table()
3090 input_clk, in vega20_odn_edit_dpm_table()
[all …]
H A Dsmu7_hwmgr.c5494 uint32_t input_clk; in smu7_odn_edit_dpm_table() local
5535 input_clk = input[i+1] * 100; in smu7_odn_edit_dpm_table()
5538 if (smu7_check_clk_voltage_valid(hwmgr, type, input_clk, input_vol)) { in smu7_odn_edit_dpm_table()
5539 podn_dpm_table_in_backend->entries[input_level].clock = input_clk; in smu7_odn_edit_dpm_table()
5540 podn_vdd_dep_in_backend->entries[input_level].clk = input_clk; in smu7_odn_edit_dpm_table()
H A Dvega10_hwmgr.c5564 uint32_t input_clk; in vega10_odn_edit_dpm_table() local
5607 input_clk = input[i+1] * 100; in vega10_odn_edit_dpm_table()
5610 if (vega10_check_clk_voltage_valid(hwmgr, type, input_clk, input_vol)) { in vega10_odn_edit_dpm_table()
5611 dpm_table->dpm_levels[input_level].value = input_clk; in vega10_odn_edit_dpm_table()
5612 podn_vdd_dep_table->entries[input_level].clk = input_clk; in vega10_odn_edit_dpm_table()
/openbmc/linux/drivers/media/i2c/
H A Dov5670.c2686 u32 input_clk = 0; in ov5670_probe() local
2696 input_clk = clk_get_rate(ov5670->xvclk); in ov5670_probe()
2699 &input_clk); in ov5670_probe()
2704 if (input_clk != OV5670_XVCLK_FREQ) { in ov5670_probe()
2706 "Unsupported clock frequency %u\n", input_clk); in ov5670_probe()
/openbmc/linux/drivers/clk/
H A Dclk-si5341.c75 struct clk *input_clk[SI5341_NUM_INPUTS]; member
1415 m_den = clk_get_rate(data->input_clk[sel]) / 10; in si5341_initialize_pll()
1434 if (!data->input_clk[res]) { in si5341_clk_select_active_input()
1439 if (data->input_clk[i]) { in si5341_clk_select_active_input()
1456 err = clk_prepare_enable(data->input_clk[res]); in si5341_clk_select_active_input()
1582 data->input_clk[i] = input; in si5341_probe()
/openbmc/u-boot/board/davinci/da8xxevm/
H A Domapl138_lcdk.c367 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); in board_mmc_init()
H A Dda850evm.c245 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); in board_mmc_init()
/openbmc/linux/sound/soc/codecs/
H A Dsma1303.c38 .input_clk = _input_clk,\
52 unsigned int input_clk; member
944 if (sma1303->pll_matches[i].input_clk == bclk) in sma1303_setup_pll()