1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
226f820f3SMasahiro Yamada /*
34e3d8406SMasahiro Yamada * Copyright (C) 2014 Panasonic Corporation
44e3d8406SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc.
54e3d8406SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
626f820f3SMasahiro Yamada */
726f820f3SMasahiro Yamada
8804cf1c4SMasahiro Yamada #include <linux/delay.h>
9804cf1c4SMasahiro Yamada #include <linux/errno.h>
10f6e7f07cSMasahiro Yamada #include <linux/io.h>
11336399fbSMasahiro Yamada #include <linux/sizes.h>
12804cf1c4SMasahiro Yamada #include <linux/types.h>
13804cf1c4SMasahiro Yamada #include <dm.h>
1426f820f3SMasahiro Yamada #include <fdtdec.h>
15804cf1c4SMasahiro Yamada #include <i2c.h>
1626f820f3SMasahiro Yamada
1726f820f3SMasahiro Yamada struct uniphier_i2c_regs {
1826f820f3SMasahiro Yamada u32 dtrm; /* data transmission */
1926f820f3SMasahiro Yamada #define I2C_DTRM_STA (1 << 10)
2026f820f3SMasahiro Yamada #define I2C_DTRM_STO (1 << 9)
2126f820f3SMasahiro Yamada #define I2C_DTRM_NACK (1 << 8)
2226f820f3SMasahiro Yamada #define I2C_DTRM_RD (1 << 0)
2326f820f3SMasahiro Yamada u32 drec; /* data reception */
2426f820f3SMasahiro Yamada #define I2C_DREC_STS (1 << 12)
2526f820f3SMasahiro Yamada #define I2C_DREC_LRB (1 << 11)
2626f820f3SMasahiro Yamada #define I2C_DREC_LAB (1 << 9)
2726f820f3SMasahiro Yamada u32 myad; /* slave address */
2826f820f3SMasahiro Yamada u32 clk; /* clock frequency control */
2926f820f3SMasahiro Yamada u32 brst; /* bus reset */
3026f820f3SMasahiro Yamada #define I2C_BRST_FOEN (1 << 1)
3126f820f3SMasahiro Yamada #define I2C_BRST_BRST (1 << 0)
3226f820f3SMasahiro Yamada u32 hold; /* hold time control */
3326f820f3SMasahiro Yamada u32 bsts; /* bus status monitor */
3426f820f3SMasahiro Yamada u32 noise; /* noise filter control */
3526f820f3SMasahiro Yamada u32 setup; /* setup time control */
3626f820f3SMasahiro Yamada };
3726f820f3SMasahiro Yamada
3826f820f3SMasahiro Yamada #define IOBUS_FREQ 100000000
3926f820f3SMasahiro Yamada
40804cf1c4SMasahiro Yamada struct uniphier_i2c_priv {
41804cf1c4SMasahiro Yamada struct udevice *dev;
4226f820f3SMasahiro Yamada struct uniphier_i2c_regs __iomem *regs; /* register base */
4326f820f3SMasahiro Yamada unsigned long input_clk; /* master clock (Hz) */
4426f820f3SMasahiro Yamada unsigned long wait_us; /* wait for every byte transfer (us) */
4526f820f3SMasahiro Yamada };
4626f820f3SMasahiro Yamada
uniphier_i2c_probe(struct udevice * dev)4726f820f3SMasahiro Yamada static int uniphier_i2c_probe(struct udevice *dev)
4826f820f3SMasahiro Yamada {
4926f820f3SMasahiro Yamada fdt_addr_t addr;
50804cf1c4SMasahiro Yamada struct uniphier_i2c_priv *priv = dev_get_priv(dev);
5126f820f3SMasahiro Yamada
52a821c4afSSimon Glass addr = devfdt_get_addr(dev);
53336399fbSMasahiro Yamada if (addr == FDT_ADDR_T_NONE)
54336399fbSMasahiro Yamada return -EINVAL;
5526f820f3SMasahiro Yamada
564e3d8406SMasahiro Yamada priv->regs = devm_ioremap(dev, addr, SZ_64);
5726f820f3SMasahiro Yamada if (!priv->regs)
5826f820f3SMasahiro Yamada return -ENOMEM;
5926f820f3SMasahiro Yamada
6026f820f3SMasahiro Yamada priv->input_clk = IOBUS_FREQ;
6126f820f3SMasahiro Yamada
62804cf1c4SMasahiro Yamada priv->dev = dev;
63804cf1c4SMasahiro Yamada
6426f820f3SMasahiro Yamada /* deassert reset */
6526f820f3SMasahiro Yamada writel(0x3, &priv->regs->brst);
6626f820f3SMasahiro Yamada
6726f820f3SMasahiro Yamada return 0;
6826f820f3SMasahiro Yamada }
6926f820f3SMasahiro Yamada
send_and_recv_byte(struct uniphier_i2c_priv * priv,u32 dtrm)70804cf1c4SMasahiro Yamada static int send_and_recv_byte(struct uniphier_i2c_priv *priv, u32 dtrm)
7126f820f3SMasahiro Yamada {
72804cf1c4SMasahiro Yamada writel(dtrm, &priv->regs->dtrm);
7326f820f3SMasahiro Yamada
7426f820f3SMasahiro Yamada /*
7526f820f3SMasahiro Yamada * This controller only provides interruption to inform the completion
7626f820f3SMasahiro Yamada * of each byte transfer. (No status register to poll it.)
7726f820f3SMasahiro Yamada * Unfortunately, U-Boot does not have a good support of interrupt.
7826f820f3SMasahiro Yamada * Wait for a while.
7926f820f3SMasahiro Yamada */
80804cf1c4SMasahiro Yamada udelay(priv->wait_us);
8126f820f3SMasahiro Yamada
82804cf1c4SMasahiro Yamada return readl(&priv->regs->drec);
8326f820f3SMasahiro Yamada }
8426f820f3SMasahiro Yamada
send_byte(struct uniphier_i2c_priv * priv,u32 dtrm,bool * stop)85804cf1c4SMasahiro Yamada static int send_byte(struct uniphier_i2c_priv *priv, u32 dtrm, bool *stop)
8626f820f3SMasahiro Yamada {
8726f820f3SMasahiro Yamada int ret = 0;
8826f820f3SMasahiro Yamada u32 drec;
8926f820f3SMasahiro Yamada
90804cf1c4SMasahiro Yamada drec = send_and_recv_byte(priv, dtrm);
9126f820f3SMasahiro Yamada
9226f820f3SMasahiro Yamada if (drec & I2C_DREC_LAB) {
93804cf1c4SMasahiro Yamada dev_dbg(priv->dev, "uniphier_i2c: bus arbitration failed\n");
9426f820f3SMasahiro Yamada *stop = false;
9526f820f3SMasahiro Yamada ret = -EREMOTEIO;
9626f820f3SMasahiro Yamada }
9726f820f3SMasahiro Yamada if (drec & I2C_DREC_LRB) {
98804cf1c4SMasahiro Yamada dev_dbg(priv->dev, "uniphier_i2c: slave did not return ACK\n");
9926f820f3SMasahiro Yamada ret = -EREMOTEIO;
10026f820f3SMasahiro Yamada }
10126f820f3SMasahiro Yamada return ret;
10226f820f3SMasahiro Yamada }
10326f820f3SMasahiro Yamada
uniphier_i2c_transmit(struct uniphier_i2c_priv * priv,uint addr,uint len,const u8 * buf,bool * stop)104804cf1c4SMasahiro Yamada static int uniphier_i2c_transmit(struct uniphier_i2c_priv *priv, uint addr,
10526f820f3SMasahiro Yamada uint len, const u8 *buf, bool *stop)
10626f820f3SMasahiro Yamada {
10726f820f3SMasahiro Yamada int ret;
10826f820f3SMasahiro Yamada
109804cf1c4SMasahiro Yamada dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len);
11026f820f3SMasahiro Yamada
111804cf1c4SMasahiro Yamada ret = send_byte(priv, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop);
11226f820f3SMasahiro Yamada if (ret < 0)
11326f820f3SMasahiro Yamada goto fail;
11426f820f3SMasahiro Yamada
11526f820f3SMasahiro Yamada while (len--) {
116804cf1c4SMasahiro Yamada ret = send_byte(priv, I2C_DTRM_NACK | *buf++, stop);
11726f820f3SMasahiro Yamada if (ret < 0)
11826f820f3SMasahiro Yamada goto fail;
11926f820f3SMasahiro Yamada }
12026f820f3SMasahiro Yamada
12126f820f3SMasahiro Yamada fail:
12226f820f3SMasahiro Yamada if (*stop)
123804cf1c4SMasahiro Yamada writel(I2C_DTRM_STO | I2C_DTRM_NACK, &priv->regs->dtrm);
12426f820f3SMasahiro Yamada
12526f820f3SMasahiro Yamada return ret;
12626f820f3SMasahiro Yamada }
12726f820f3SMasahiro Yamada
uniphier_i2c_receive(struct uniphier_i2c_priv * priv,uint addr,uint len,u8 * buf,bool * stop)128804cf1c4SMasahiro Yamada static int uniphier_i2c_receive(struct uniphier_i2c_priv *priv, uint addr,
12926f820f3SMasahiro Yamada uint len, u8 *buf, bool *stop)
13026f820f3SMasahiro Yamada {
13126f820f3SMasahiro Yamada int ret;
13226f820f3SMasahiro Yamada
133804cf1c4SMasahiro Yamada dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len);
13426f820f3SMasahiro Yamada
135804cf1c4SMasahiro Yamada ret = send_byte(priv, I2C_DTRM_STA | I2C_DTRM_NACK |
13626f820f3SMasahiro Yamada I2C_DTRM_RD | addr << 1, stop);
13726f820f3SMasahiro Yamada if (ret < 0)
13826f820f3SMasahiro Yamada goto fail;
13926f820f3SMasahiro Yamada
14026f820f3SMasahiro Yamada while (len--)
141804cf1c4SMasahiro Yamada *buf++ = send_and_recv_byte(priv, len ? 0 : I2C_DTRM_NACK);
14226f820f3SMasahiro Yamada
14326f820f3SMasahiro Yamada fail:
14426f820f3SMasahiro Yamada if (*stop)
145804cf1c4SMasahiro Yamada writel(I2C_DTRM_STO | I2C_DTRM_NACK, &priv->regs->dtrm);
14626f820f3SMasahiro Yamada
14726f820f3SMasahiro Yamada return ret;
14826f820f3SMasahiro Yamada }
14926f820f3SMasahiro Yamada
uniphier_i2c_xfer(struct udevice * bus,struct i2c_msg * msg,int nmsgs)15026f820f3SMasahiro Yamada static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
15126f820f3SMasahiro Yamada int nmsgs)
15226f820f3SMasahiro Yamada {
15326f820f3SMasahiro Yamada int ret = 0;
154804cf1c4SMasahiro Yamada struct uniphier_i2c_priv *priv = dev_get_priv(bus);
15526f820f3SMasahiro Yamada bool stop;
15626f820f3SMasahiro Yamada
15726f820f3SMasahiro Yamada for (; nmsgs > 0; nmsgs--, msg++) {
15826f820f3SMasahiro Yamada /* If next message is read, skip the stop condition */
15926f820f3SMasahiro Yamada stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true;
16026f820f3SMasahiro Yamada
16126f820f3SMasahiro Yamada if (msg->flags & I2C_M_RD)
162804cf1c4SMasahiro Yamada ret = uniphier_i2c_receive(priv, msg->addr, msg->len,
16326f820f3SMasahiro Yamada msg->buf, &stop);
16426f820f3SMasahiro Yamada else
165804cf1c4SMasahiro Yamada ret = uniphier_i2c_transmit(priv, msg->addr, msg->len,
16626f820f3SMasahiro Yamada msg->buf, &stop);
16726f820f3SMasahiro Yamada
16826f820f3SMasahiro Yamada if (ret < 0)
16926f820f3SMasahiro Yamada break;
17026f820f3SMasahiro Yamada }
17126f820f3SMasahiro Yamada
17226f820f3SMasahiro Yamada return ret;
17326f820f3SMasahiro Yamada }
17426f820f3SMasahiro Yamada
uniphier_i2c_set_bus_speed(struct udevice * bus,unsigned int speed)17526f820f3SMasahiro Yamada static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
17626f820f3SMasahiro Yamada {
177804cf1c4SMasahiro Yamada struct uniphier_i2c_priv *priv = dev_get_priv(bus);
17826f820f3SMasahiro Yamada
17926f820f3SMasahiro Yamada /* max supported frequency is 400 kHz */
18026f820f3SMasahiro Yamada if (speed > 400000)
18126f820f3SMasahiro Yamada return -EINVAL;
18226f820f3SMasahiro Yamada
18326f820f3SMasahiro Yamada /* bus reset: make sure the bus is idle when change the frequency */
18426f820f3SMasahiro Yamada writel(0x1, &priv->regs->brst);
18526f820f3SMasahiro Yamada
18626f820f3SMasahiro Yamada writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed),
18726f820f3SMasahiro Yamada &priv->regs->clk);
18826f820f3SMasahiro Yamada
18926f820f3SMasahiro Yamada writel(0x3, &priv->regs->brst);
19026f820f3SMasahiro Yamada
19126f820f3SMasahiro Yamada /*
19226f820f3SMasahiro Yamada * Theoretically, each byte can be transferred in
19326f820f3SMasahiro Yamada * 1000000 * 9 / speed usec. For safety, wait more than double.
19426f820f3SMasahiro Yamada */
19526f820f3SMasahiro Yamada priv->wait_us = 20000000 / speed;
19626f820f3SMasahiro Yamada
19726f820f3SMasahiro Yamada return 0;
19826f820f3SMasahiro Yamada }
19926f820f3SMasahiro Yamada
20026f820f3SMasahiro Yamada
20126f820f3SMasahiro Yamada static const struct dm_i2c_ops uniphier_i2c_ops = {
20226f820f3SMasahiro Yamada .xfer = uniphier_i2c_xfer,
20326f820f3SMasahiro Yamada .set_bus_speed = uniphier_i2c_set_bus_speed,
20426f820f3SMasahiro Yamada };
20526f820f3SMasahiro Yamada
20626f820f3SMasahiro Yamada static const struct udevice_id uniphier_i2c_of_match[] = {
2076462cdedSMasahiro Yamada { .compatible = "socionext,uniphier-i2c" },
2086462cdedSMasahiro Yamada { /* sentinel */ }
20926f820f3SMasahiro Yamada };
21026f820f3SMasahiro Yamada
21126f820f3SMasahiro Yamada U_BOOT_DRIVER(uniphier_i2c) = {
21226f820f3SMasahiro Yamada .name = "uniphier-i2c",
21326f820f3SMasahiro Yamada .id = UCLASS_I2C,
21426f820f3SMasahiro Yamada .of_match = uniphier_i2c_of_match,
21526f820f3SMasahiro Yamada .probe = uniphier_i2c_probe,
216804cf1c4SMasahiro Yamada .priv_auto_alloc_size = sizeof(struct uniphier_i2c_priv),
21726f820f3SMasahiro Yamada .ops = &uniphier_i2c_ops,
21826f820f3SMasahiro Yamada };
219