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Searched refs:im (Results 1 – 25 of 133) sorted by relevance

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/openbmc/u-boot/board/freescale/mpc8315erdb/
H A Dsdram.c43 volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
47 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
48 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
49 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
57 im->ddr.csbnds[0].csbnds = (msize - 1) >> 24; in fixed_sdram()
58 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
61 im->ddr.cs_config[1] = 0; in fixed_sdram()
63 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()
64 im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
65 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
/openbmc/u-boot/board/freescale/mpc8313erdb/
H A Dsdram.c47 volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
50 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
51 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
52 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
63 im->ddr.csbnds[0].csbnds = in fixed_sdram()
67 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
70 im->ddr.cs_config[1] = 0; in fixed_sdram()
72 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
73 im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
74 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
/openbmc/linux/net/sched/
H A Dem_ipt.c42 static int check_match(struct net *net, struct em_ipt_match *im, int mdata_len) in check_match() argument
52 mtpar.hook_mask = 1 << im->hook; in check_match()
53 mtpar.family = im->match->family; in check_match()
54 mtpar.match = im->match; in check_match()
56 mtpar.matchinfo = (void *)im->match_data; in check_match()
130 struct em_ipt_match *im = NULL; in em_ipt_change() local
160 im = kzalloc(sizeof(*im) + mdata_len, GFP_KERNEL); in em_ipt_change()
161 if (!im) { in em_ipt_change()
166 im->match = match; in em_ipt_change()
167 im->hook = nla_get_u32(tb[TCA_EM_IPT_HOOK]); in em_ipt_change()
[all …]
/openbmc/u-boot/board/mpc8308_p1m/
H A Dsdram.c27 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
31 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
33 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
34 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
36 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24); in fixed_sdram()
37 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
40 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
42 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
43 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
44 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
[all …]
/openbmc/u-boot/board/gdsys/mpc8308/
H A Dsdram.c32 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
36 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
38 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
39 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
41 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24); in fixed_sdram()
42 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
45 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
47 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
48 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
49 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
[all …]
/openbmc/u-boot/board/freescale/mpc8308rdb/
H A Dsdram.c31 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
35 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
37 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
38 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
40 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24); in fixed_sdram()
41 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
44 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
46 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()
47 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
48 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
[all …]
/openbmc/u-boot/board/freescale/mpc8349emds/
H A Dmpc8349emds.c52 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in dram_init() local
55 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
59 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
89 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
94 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
95 im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); in fixed_sdram()
101 im->ddr.csbnds[2].csbnds = CONFIG_SYS_DDR_CS2_BNDS; in fixed_sdram()
102 im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG; in fixed_sdram()
103 im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
104 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
/openbmc/u-boot/board/freescale/mpc8349itx/
H A Dmpc8349itx.c30 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
35 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
37 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
42 im->ddr.csbnds[0].csbnds = in fixed_sdram()
46 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
49 im->ddr.cs_config[1] = 0; in fixed_sdram()
50 im->ddr.cs_config[2] = 0; in fixed_sdram()
51 im->ddr.cs_config[3] = 0; in fixed_sdram()
53 debug("cs0_bnds = 0x%08x\n", im->ddr.csbnds[0].csbnds); in fixed_sdram()
54 debug("cs0_config = 0x%08x\n", im->ddr.cs_config[0]); in fixed_sdram()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dcpu_init.c48 void cpu_init_f (volatile immap_t * im) in cpu_init_f() argument
211 clrsetbits_be32(&im->arbiter.acr, acr_mask, acr_val); in cpu_init_f()
213 clrsetbits_be32(&im->sysconf.spcr, spcr_mask, spcr_val); in cpu_init_f()
215 clrsetbits_be32(&im->clk.sccr, sccr_mask, sccr_val); in cpu_init_f()
218 gd->arch.reset_status = __raw_readl(&im->reset.rsr); in cpu_init_f()
219 __raw_writel(~(RSR_RES), &im->reset.rsr); in cpu_init_f()
222 gd->arch.arbiter_event_attributes = __raw_readl(&im->arbiter.aeatr); in cpu_init_f()
223 gd->arch.arbiter_event_address = __raw_readl(&im->arbiter.aeadr); in cpu_init_f()
229 __raw_writel(RMR_CSRE & (1<<RMR_CSRE_SHIFT), &im->reset.rmr); in cpu_init_f()
234 clrsetbits_be32(&im->im_lbc.lcrr, lcrr_mask, lcrr_val); in cpu_init_f()
[all …]
H A Dspl_minimal.c18 void cpu_init_f (volatile immap_t * im) in cpu_init_f() argument
29 im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | in cpu_init_f()
35 im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) | in cpu_init_f()
41 im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) | in cpu_init_f()
46 im->sysconf.spcr |= SPCR_TBEN; in cpu_init_f()
50 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR; in cpu_init_f()
54 im->sysconf.obir = CONFIG_SYS_OBIR; in cpu_init_f()
72 im->sysconf.lblaw[0].bar = CONFIG_SYS_NAND_LBLAWBAR_PRELIM; in cpu_init_f()
73 im->sysconf.lblaw[0].ar = CONFIG_SYS_NAND_LBLAWAR_PRELIM; in cpu_init_f()
/openbmc/u-boot/board/ve8313/
H A Dve8313.c37 volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
40 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
42 out_be32(&im->sysconf.ddrlaw[0].ar, (LBLAWAR_EN | (msize_log2 - 1))); in fixed_sdram()
43 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
54 out_be32(&im->ddr.csbnds[0].csbnds, in fixed_sdram()
58 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
61 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
63 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CNTL); in fixed_sdram()
64 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
65 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dmpc83xx_gpio.c53 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in gpio_direction_input() local
65 clrbits_be32(&im->gpio[ctrlr].dir, line_mask); in gpio_direction_input()
73 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in gpio_direction_output() local
93 setbits_be32(&im->gpio[ctrlr].dir, line_mask); in gpio_direction_output()
101 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in gpio_get_value() local
114 return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; in gpio_get_value()
120 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in gpio_set_value() local
143 out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); in gpio_set_value()
151 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in mpc83xx_gpio_init_f() local
154 out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION); in mpc83xx_gpio_init_f()
[all …]
/openbmc/u-boot/board/freescale/mpc832xemds/
H A Dmpc832xemds.c94 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in dram_init() local
97 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
101 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
116 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
128 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
133 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
134 im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
135 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
136 im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
137 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
/openbmc/u-boot/board/ids/ids8313/
H A Dids8313.c53 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
59 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
61 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
62 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
71 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24); in fixed_sdram()
72 out_be32(&im->ddr.cs_config[0], config); in fixed_sdram()
75 out_be32(&im->ddr.cs_config[1], 0); in fixed_sdram()
76 out_be32(&im->ddr.cs_config[2], 0); in fixed_sdram()
77 out_be32(&im->ddr.cs_config[3], 0); in fixed_sdram()
79 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
[all …]
/openbmc/u-boot/board/freescale/mpc837xerdb/
H A Dmpc837xerdb.c66 immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in dram_init() local
69 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
94 immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
98 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
99 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
101 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
104 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()
107 im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
108 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
111 im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
[all …]
/openbmc/u-boot/board/freescale/mpc837xemds/
H A Dmpc837xemds.c65 struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; in board_mmc_init() local
75 clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD); in board_mmc_init()
76 clrsetbits_be32(&im->sysconf.sicrh, SICRH_GPIO2_E | SICRH_SPI, in board_mmc_init()
88 struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; in board_eth_init() local
89 u32 rcwh = in_be32(&im->reset.rcwh); in board_eth_init()
187 struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; in ft_tsec_fixup() local
188 u32 rcwh = in_be32(&im->reset.rcwh); in ft_tsec_fixup()
222 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in dram_init() local
225 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
251 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
[all …]
/openbmc/u-boot/board/sbc8349/
H A Dsbc8349.c41 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in dram_init() local
44 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
48 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
77 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
82 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
83 im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); in fixed_sdram()
92 im->ddr.csbnds[2].csbnds = in fixed_sdram()
96 im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG; in fixed_sdram()
99 im->ddr.cs_config[0] = 0; in fixed_sdram()
100 im->ddr.cs_config[1] = 0; in fixed_sdram()
[all …]
/openbmc/linux/net/ipv4/
H A Digmp.c156 static void igmpv3_add_delrec(struct in_device *in_dev, struct ip_mc_list *im,
158 static void igmpv3_del_delrec(struct in_device *in_dev, struct ip_mc_list *im);
167 static void ip_ma_put(struct ip_mc_list *im) in ip_ma_put() argument
169 if (refcount_dec_and_test(&im->refcnt)) { in ip_ma_put()
170 in_dev_put(im->interface); in ip_ma_put()
171 kfree_rcu(im, rcu); in ip_ma_put()
202 static void igmp_stop_timer(struct ip_mc_list *im) in igmp_stop_timer() argument
204 spin_lock_bh(&im->lock); in igmp_stop_timer()
205 if (del_timer(&im->timer)) in igmp_stop_timer()
206 refcount_dec(&im->refcnt); in igmp_stop_timer()
[all …]
/openbmc/u-boot/board/freescale/mpc8323erdb/
H A Dmpc8323erdb.c76 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in dram_init() local
79 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
83 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
98 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; in fixed_sdram() local
110 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
112 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
113 im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
114 im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
115 im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
116 im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
/openbmc/u-boot/board/keymile/km83xx/
H A Dkm83xx.c291 immap_t *im = (immap_t *)CONFIG_SYS_IMMR; in fixed_sdram() local
296 out_be32(&im->sysconf.ddrlaw[0].ar, (LAWAR_EN | 0x1e)); in fixed_sdram()
297 out_be32(&im->ddr.csbnds[0].csbnds, (CONFIG_SYS_DDR_CS0_BNDS) | 0x7f); in fixed_sdram()
298 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); in fixed_sdram()
299 out_be32(&im->ddr.timing_cfg_0, CONFIG_SYS_DDR_TIMING_0); in fixed_sdram()
300 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1); in fixed_sdram()
301 out_be32(&im->ddr.timing_cfg_2, CONFIG_SYS_DDR_TIMING_2); in fixed_sdram()
302 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3); in fixed_sdram()
303 out_be32(&im->ddr.sdram_cfg, CONFIG_SYS_DDR_SDRAM_CFG); in fixed_sdram()
304 out_be32(&im->ddr.sdram_cfg2, CONFIG_SYS_DDR_SDRAM_CFG2); in fixed_sdram()
[all …]
/openbmc/linux/kernel/bpf/
H A Dtrampoline.c254 static void bpf_tramp_image_free(struct bpf_tramp_image *im) in bpf_tramp_image_free() argument
256 bpf_image_ksym_del(&im->ksym); in bpf_tramp_image_free()
257 bpf_jit_free_exec(im->image); in bpf_tramp_image_free()
259 percpu_ref_exit(&im->pcref); in bpf_tramp_image_free()
260 kfree_rcu(im, rcu); in bpf_tramp_image_free()
265 struct bpf_tramp_image *im; in __bpf_tramp_image_put_deferred() local
267 im = container_of(work, struct bpf_tramp_image, work); in __bpf_tramp_image_put_deferred()
268 bpf_tramp_image_free(im); in __bpf_tramp_image_put_deferred()
274 struct bpf_tramp_image *im; in __bpf_tramp_image_put_rcu() local
276 im = container_of(rcu, struct bpf_tramp_image, rcu); in __bpf_tramp_image_put_rcu()
[all …]
/openbmc/u-boot/drivers/clk/
H A Dmpc83xx_clk.h275 static inline u32 get_spmr(immap_t *im) in get_spmr() argument
277 u32 res = in_be32(&im->clk.spmr); in get_spmr()
288 static inline u32 get_sccr(immap_t *im) in get_sccr() argument
290 u32 res = in_be32(&im->clk.sccr); in get_sccr()
301 static inline u32 get_lcrr(immap_t *im) in get_lcrr() argument
303 u32 res = in_be32(&im->im_lbc.lcrr); in get_lcrr()
314 static inline u32 get_pci_sync_in(immap_t *im) in get_pci_sync_in() argument
318 clkin_div = (get_spmr(im) & SPMR_CKID) >> SPMR_CKID_SHIFT; in get_pci_sync_in()
328 static inline u32 get_csb_clk(immap_t *im) in get_csb_clk() argument
332 spmf = (get_spmr(im) & SPMR_SPMF) >> SPMR_SPMF_SHIFT; in get_csb_clk()
[all …]
/openbmc/u-boot/board/tqc/tqm834x/
H A Dtqm834x.c50 static volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; variable
58 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in board_early_init_r()
75 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE; in dram_init()
76 im->sysconf.ddrlaw[0].ar = (LAWAR_EN | LAWAR_SIZE_2G); in dram_init()
93 im->ddr.sdram_cfg = (SDRAM_CFG_MEM_EN | in dram_init()
322 im->ddr.csbnds[cs].csbnds = 0x00000000; in set_cs_bounds()
324 im->ddr.csbnds[cs].csbnds = in set_cs_bounds()
339 im->ddr.cs_config[cs] = config; in set_cs_config()
348 im->ddr.sdram_clk_cntl = DDR_SDRAM_CLK_CNTL_SS_EN | in set_ddr_config()
353 im->ddr.timing_cfg_1 = in set_ddr_config()
[all …]
/openbmc/phosphor-ipmi-flash/bmc/log-handler/test/
H A Dlog_read_unittest.cpp41 createMockLogConfigs(blobNames, &im, &tm)); in SetUp()
46 std::unordered_map<std::string, ImageHandlerMock*> im; member in ipmi_flash::LogReadBlobTest
61 EXPECT_CALL(*im.at("blob0"), open(_, std::ios::in)).WillOnce(Return(true)); in TEST_F()
62 EXPECT_CALL(*im.at("blob0"), read(0, Ge(vector1.size()))) in TEST_F()
64 EXPECT_CALL(*im.at("blob0"), close()).Times(1); in TEST_F()
84 EXPECT_CALL(*im.at("blob0"), open(_, std::ios::in)).WillOnce(Return(true)); in TEST_F()
85 EXPECT_CALL(*im.at("blob0"), read(0, Ge(vector1.size()))) in TEST_F()
87 EXPECT_CALL(*im.at("blob0"), close()).Times(1); in TEST_F()
95 EXPECT_CALL(*im.at("blob0"), open(_, std::ios::in)).WillOnce(Return(true)); in TEST_F()
96 EXPECT_CALL(*im.at("blob0"), read(0, Ge(vector2.size()))) in TEST_F()
[all …]
/openbmc/phosphor-ipmi-flash/bmc/version-handler/test/
H A Dversion_read_unittest.cpp27 createMockVersionConfigs(blobNames, &im, &tm)); in SetUp()
32 std::unordered_map<std::string, ImageHandlerMock*> im; member in ipmi_flash::VersionReadBlobTest
47 EXPECT_CALL(*im.at("blob0"), open(_, std::ios::in)).WillOnce(Return(true)); in TEST_F()
48 EXPECT_CALL(*im.at("blob0"), read(0, Ge(vector1.size()))) in TEST_F()
50 EXPECT_CALL(*im.at("blob0"), close()).Times(1); in TEST_F()
70 EXPECT_CALL(*im.at("blob0"), open(_, std::ios::in)).WillOnce(Return(true)); in TEST_F()
71 EXPECT_CALL(*im.at("blob0"), read(0, Ge(vector1.size()))) in TEST_F()
73 EXPECT_CALL(*im.at("blob0"), close()).Times(1); in TEST_F()
81 EXPECT_CALL(*im.at("blob0"), open(_, std::ios::in)).WillOnce(Return(true)); in TEST_F()
82 EXPECT_CALL(*im.at("blob0"), read(0, Ge(vector2.size()))) in TEST_F()
[all …]

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