50 static volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;  variable
58 	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)  in board_early_init_r()
75 	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE;  in dram_init()
76 	im->sysconf.ddrlaw[0].ar = (LAWAR_EN | LAWAR_SIZE_2G);  in dram_init()
93 	im->ddr.sdram_cfg = (SDRAM_CFG_MEM_EN |  in dram_init()
322 		im->ddr.csbnds[cs].csbnds = 0x00000000;  in set_cs_bounds()
324 		im->ddr.csbnds[cs].csbnds =  in set_cs_bounds()
339 	im->ddr.cs_config[cs] = config;  in set_cs_config()
348 	im->ddr.sdram_clk_cntl = DDR_SDRAM_CLK_CNTL_SS_EN |  in set_ddr_config()
353 	im->ddr.timing_cfg_1 =  in set_ddr_config()
363 	im->ddr.timing_cfg_2 =  in set_ddr_config()
369 	im->ddr.sdram_cfg =  in set_ddr_config()
375 	im->ddr.sdram_mode =  in set_ddr_config()
385 	im->ddr.sdram_interval =  in set_ddr_config()
401 	if ((im->sysconf.spridr & SPRIDR_REVID) < 0x200) {  in set_ddr_config()
407 		u32 *reserved_p = (u32 *)((u8 *)im + 0x2f00);  in set_ddr_config()