| /openbmc/linux/Documentation/hwmon/ |
| H A D | max16065.rst | 11 Addresses scanned: -
15 http://datasheets.maxim-ic.com/en/ds/MAX16065-MAX16066.pdf
21 Addresses scanned: -
25 http://datasheets.maxim-ic.com/en/ds/MAX16067.pdf
31 Addresses scanned: -
35 http://datasheets.maxim-ic.com/en/ds/MAX16068.pdf
41 Addresses scanned: -
45 http://datasheets.maxim-ic.com/en/ds/MAX16070-MAX16071.pdf
47 Author: Guenter Roeck <linux@roeck-us.net>
51 -----------
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| H A D | tmp513.rst | 1 .. SPDX-License-Identifier: GPL-2.0
22 Eric Tremblay <etremblay@distech-controls.com>
25 -----------
28 The TMP512 (dual-channel) and TMP513 (triple-channel) are system monitors
29 that include remote sensors, a local temperature sensor, and a high-side current
30 shunt monitor. These system monitors have the capability of measuring remote
31 temperatures, on-chip temperatures, and system voltage/power/current
35 -40 to + 125 degrees with a resolution of 0.0625 degree C.
44 **temp[1-4]_input**
46 **temp[1-4]_crit**
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| /openbmc/linux/Documentation/driver-api/ |
| H A D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
18 The individual DRAM chips on a memory stick. These devices commonly
32 A physical connector on the motherboard that accepts a single memory
33 stick. Also called as "slot" on several datasheets.
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
50 of correcting more errors than on single mode.
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
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| /openbmc/linux/drivers/tty/serial/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
7 depends on HAS_IOMEM
11 depends on SERIAL_CORE
19 comment "Non-8250 serial port support"
23 depends on ARM_AMBA || COMPILE_TEST
33 bool "Support for console on AMBA serial port"
34 depends on SERIAL_AMBA_PL010=y
37 Say Y here if you wish to use an AMBA PrimeCell UART as the system
38 console (the system console is the device which receives all kernel
42 (/dev/tty0) will still be used as the system console by default, but
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| /openbmc/linux/drivers/rtc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 depends on !S390
20 be allowed to plug one or more RTCs to your system. You will
26 bool "Set system time from RTC on startup and resume"
29 If you say yes here, the system time (wall clock) will be set using
34 string "RTC used to set the system time"
35 depends on RTC_HCTOSYS
38 The RTC device that will be used to (re)initialize the system
39 clock, usually rtc0. Initialization is done when the system
44 This clock should be battery-backed, so that it reads the correct
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| /openbmc/linux/arch/arm/mach-vt8500/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
8 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
12 depends on ARCH_MULTI_V5
13 depends on CPU_LITTLE_ENDIAN
19 depends on ARCH_MULTI_V6
22 Support for WonderMedia WM8750 System-on-Chip.
26 depends on ARCH_MULTI_V7
29 Support for WonderMedia WM8850 System-on-Chip.
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| /openbmc/linux/tools/perf/pmu-events/arch/powerpc/power8/ |
| H A D | frontend.json | 47 "BriefDescription": "Number of I-ERAT reloads",
59 "BriefDescription": "IERAT Miss (Not implemented as DI on POWER6)",
71 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for an instru…
72 …"PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pum…
89 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
90 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
95 …eloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
96 …eloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di…
102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d…
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| H A D | other.json | 11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
17 …cles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong …
23 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for all data …
24 …"PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pum…
36 … got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump w…
41 …"BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a…
42 …urced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump w…
59 …"BriefDescription": "Initial and Final Pump Scope was system pump for all data types (demand load,…
60 …n": "Initial and Final Pump Scope and data sourced across this scope was system pump for all data …
65 …n": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) …
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| /openbmc/docs/designs/ |
| H A D | power-systems-memory-preserving-reboot.md | 1 # Memory preserving reboot and System Dump extraction flow on POWER Systems.
9 On POWER based servers, a hypervisor firmware manages and allocates resources to
10 the logical partitions running on the server. If this hypervisor encounters an
14 required for debugging the fault. Some hypervisors on the POWER based systems
15 don't have access to a non-volatile storage to store this content after a
16 failure. A warm reboot with preserving the main memory is needed on the POWER
18 explains the high-level flow of warm reboot and extraction of the resulting dump
23 - **Boot**: The process of initializing hardware components in a computer system
24 and loading the operating system.
26 - **Hostboot**: The firmware runs on the host processors and performs all
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| /openbmc/linux/tools/perf/pmu-events/arch/powerpc/power9/ |
| H A D | marked.json | 20 …was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data…
25 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam…
30 …"BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or mem…
60 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
70 …loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a mark…
95 …aded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a mark…
100 …loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a data…
120 …tion": "The processor's Instruction cache was reloaded from another chip's memory on the same Node…
130 …"BriefDescription": "The processor's data cache was reloaded from the local chip's Memory due to a…
145 …"BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a…
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| /openbmc/linux/drivers/irqchip/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "IRQ chip support"
6 depends on (OF_IRQ || ACPI_GENERIC_GSI)
10 depends on OF
16 depends on PM
21 depends on ARM_GIC
27 depends on PCI
48 depends on ARM_GIC_V3_ITS
49 depends on PCI
50 depends on PCI_MSI
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| /openbmc/linux/drivers/mfd/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
17 depends on PCI && (X86_32 || (X86 && COMPILE_TEST))
18 depends on !UML
24 bool "Altera Arria10 DevKit System Resource chip"
25 depends on ARCH_INTEL_SOCFPGA && SPI_MASTER=y && OF
29 Support for the Altera Arria10 DevKit MAX5 System Resource chip
35 bool "Altera SOCFPGA System Manager"
36 depends on ARCH_INTEL_SOCFPGA && OF
39 Select this to get System Manager support for all Altera branded
40 SOCFPGAs. The SOCFPGA System Manager handles all SOCFPGAs by
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| /openbmc/linux/drivers/thermal/tegra/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 depends on ARCH_TEGRA || COMPILE_TEST
8 Enable this option for integrated thermal management support on NVIDIA
9 Tegra systems-on-chip. The driver supports four thermal zones
16 depends on TEGRA_BPMP || COMPILE_TEST
18 Enable this option for support for sensing system temperature of NVIDIA
19 Tegra systems-on-chip with the BPMP coprocessor (Tegra186).
23 depends on ARCH_TEGRA_3x_SOC || COMPILE_TEST
26 system-on-chip.
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| /openbmc/u-boot/drivers/usb/host/ |
| H A D | Kconfig | 12 ---help---
21 Say Y or if your system has a Dual Role SuperSpeed
22 USB controller based on the DesignWare USB3 IP Core.
26 depends on DM_USB
30 USB controller based on the DesignWare USB3 IP Core.
35 depends on ARCH_MVEBU
38 Choose this option to add support for USB 3.0 driver on mvebu
43 bool "Support for PCI-based xHCI USB controller"
44 depends on DM_USB
47 Enables support for the PCI-based xHCI controller.
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| /openbmc/openpower-hw-diags/util/ |
| H A D | pdbg.hpp | 14 class Chip;
23 /** Chip target types. */
46 /** @return The target associated with the given chip. */
47 pdbg_target* getTrgt(const libhei::Chip& i_chip);
55 /** @return A string representing the given chip's devtree path. */
56 const char* getPath(const libhei::Chip& i_chip);
61 /** @return The absolute position of the given chip. */
62 uint32_t getChipPos(const libhei::Chip& i_chip);
64 /** @return The unit position of a target within a chip. */
70 /** @return The target type of the given chip. */
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| /openbmc/linux/drivers/fsi/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 depends on OF
11 FSI - the FRU Support Interface - is a simple bus for low-level
12 access to POWER-based hardware.
25 by one so that chip 0 will have /dev/scom1 and chip1 /dev/scom2
29 symlinks in /dev/fsi/by-path when this option is enabled.
32 tristate "GPIO-based FSI master"
33 depends on GPIOLIB
47 tristate "FSI master based on Aspeed ColdFire coprocessor"
48 depends on GPIOLIB
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| /openbmc/linux/Documentation/networking/device_drivers/atm/ |
| H A D | iphase.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 ATM (i)Chip IA Linux Driver Source
9 --------------------------------------------------------------------------------
13 --------------------------------------------------------------------------------
18 This is the README file for the Interphase PCI ATM (i)Chip IA Linux driver
23 - A single VPI (VPI value of 0) is supported.
24 - Supports 4K VCs for the server board (with 512K control memory) and 1K
26 - UBR, ABR and CBR service categories are supported.
27 - Only AAL5 is supported.
28 - Supports setting of PCR on the VCs.
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| /openbmc/phosphor-mrw-tools/ |
| H A D | Inventory.pm | 14 #Chips that are modeled as modules (card-chip together)
18 #for a system. The hash elements are:
49 for my $target (sort keys %{$targetObj->getAllTargets()}) {
53 if (!$targetObj->isBadAttribute($target, "TYPE")) {
54 $type = $targetObj->getAttribute($target, "TYPE");
57 if (!$targetObj->isBadAttribute($target, "RU_TYPE")) {
58 $ruType = $targetObj->getAttribute($target, "RU_TYPE");
73 #is a card-chip instance that plugs into a connector on the
74 #backplane/processor card. Since we already include the chip target
78 #For example, we'll already have .../module-0/proc-0 so we don't
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| /openbmc/linux/drivers/hwmon/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Hardware monitoring chip drivers configuration
8 depends on HAS_IOMEM
12 of a system. Most modern motherboards include such a device. It
17 sensors chip(s) below.
20 sensors-detect script from the lm_sensors package. Read
21 <file:Documentation/hwmon/userspace-tools.rst> for details.
32 bool "Hardware Monitoring Chip debugging messages"
34 Say Y here if you want the I2C chip drivers to produce a bunch of
35 debug messages to the system log. Select this if you are having
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| /openbmc/linux/drivers/usb/typec/mux/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 menu "USB Type-C Multiplexer/DeMultiplexer Switch support"
6 tristate "ON Semi FSA4480 Analog Audio Switch driver"
7 depends on I2C
10 Driver for the ON Semiconductor FSA4480 Analog Audio Switch, which
11 provides support for muxing analog audio and sideband signals on a
12 common USB Type-C connector.
16 tristate "Generic GPIO based SBU mux for USB Type-C applications"
18 Say Y or M if your system uses a GPIO based mux for managing the
19 connected state and the swapping of the SBU lines in a Type-C port.
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-event_source-devices-hv_24x7 | 3 Contact: Linux on PowerPC Developer List <linuxppc-dev@lists.ozlabs.org>
4 Description: Read-only. Attribute group to describe the magic bits
6 (See ABI/testing/sysfs-bus-event_source-devices-format).
12 chip = "config:16-31"
13 core = "config:16-31"
14 domain = "config:0-3"
15 lpar = "config:0-15"
16 offset = "config:32-63"
17 vcpu = "config:16-31"
21 PM_PB_CYC = "domain=1,offset=0x80,chip=?,lpar=0x0"
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| /openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | pmc.txt | 4 - compatible: "fsl,<chip>-pmc".
6 "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
7 compatible. "fsl,mpc8313-pmc" should also be listed for any chip
8 whose PMC is compatible, and implies deep-sleep capability.
10 "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
11 compatible. "fsl,mpc8536-pmc" should also be listed for any chip
12 whose PMC is compatible, and implies deep-sleep capability.
14 "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
15 compatible; all statements below that apply to "fsl,mpc8548-pmc" also
16 apply to "fsl,mpc8641d-pmc".
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| /openbmc/linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | aspeed-wdt.txt | 4 - compatible: must be one of:
5 - "aspeed,ast2400-wdt"
6 - "aspeed,ast2500-wdt"
7 - "aspeed,ast2600-wdt"
9 - reg: physical base address of the controller and length of memory mapped
14 - aspeed,reset-type = "cpu|soc|system|none"
16 Reset behavior - Whenever a timeout occurs the watchdog can be programmed
20 This is useful in situations where another watchdog engine on chip is
23 If 'aspeed,reset-type=' is not specified the default is to enable system
28 - cpu: Reset CPU on watchdog timeout
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| /openbmc/u-boot/arch/x86/ |
| H A D | Kconfig | 2 depends on X86
8 prompt "Run U-Boot in 32/64-bit mode"
11 U-Boot can be built as a 32-bit binary which runs in 32-bit mode
12 even on 64-bit machines. In this case SPL is not used, and U-Boot
13 runs directly from the reset vector (via 16-bit start-up).
15 Alternatively it can be run as a 64-bit binary, thus requiring a
16 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit
17 start-up) then jumps to U-Boot in 64-bit mode.
19 For now, 32-bit mode is recommended, as 64-bit is still
23 bool "32-bit"
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| /openbmc/phosphor-mrw-tools/docs/ |
| H A D | mrw-xml-requirements.md | 3 This document describes the data requirements that OpenBMC has on the machine
5 [Serverwiz2](https://www.github.com/open-power/serverwiz). The requirements in
11 ## System Inventory
13 The system inventory can be generated from the MRW XML. The inventory typically
14 contains all FRUs (field replaceable units), along with a few non-FRU entities,
15 like the BMC chip and processor cores.
19 - Set the `FRU_NAME` attribute of that target.
28 modeled in the MRW XML. For a system built with parts that already have existing
31 determined, depending on the part.
33 The following sections list the system dependent information that the device
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