Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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53287a89 |
| 10-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
- Enable RTC for Intel Tangier - Wrap the call to 8259 PIC with Kconfig options for old targets without 8259 - Warp the call to USB init with Kconfg options for
Merge git://git.denx.de/u-boot-x86
- Enable RTC for Intel Tangier - Wrap the call to 8259 PIC with Kconfig options for old targets without 8259 - Warp the call to USB init with Kconfg options for coreboot & EFI payload
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2677a15e |
| 29-Nov-2018 |
Bin Meng <bmeng.cn@gmail.com> |
x86: kconfig: Allow board defconfig file to disable 8259 and APIC
At present the Kconfig options (CONFIG_I8259_PIC and CONFIG_APIC) do not include a prompt message, which makes it impossible to be d
x86: kconfig: Allow board defconfig file to disable 8259 and APIC
At present the Kconfig options (CONFIG_I8259_PIC and CONFIG_APIC) do not include a prompt message, which makes it impossible to be disabled from a board defconfig file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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da4cfa6b |
| 18-Nov-2018 |
Hannes Schmelzer <oe5hpm@oevsv.at> |
x86: make the LAPIC / IOAPIC construct switchable with Kconfig
There are still systems running which do not have any LAPIC or even IOAPIC. Responsible MSRs for those do not exist and the systems are
x86: make the LAPIC / IOAPIC construct switchable with Kconfig
There are still systems running which do not have any LAPIC or even IOAPIC. Responsible MSRs for those do not exist and the systems are crashing on trying to setup LAPIC.
This commit makes the APIC stuff able to switch off for those boards which dont' have an LAPIC / IOAPIC.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Revision tags: v2018.07 |
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378b29cb |
| 18-Jun-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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4f1dacd4 |
| 12-Jun-2018 |
Bin Meng <bmeng.cn@gmail.com> |
x86: efi: Refactor the directory of EFI app and payload support
At present the EFI application and payload support codes in the x86 directory is distributed in a hybrid way. For example, the Kconfig
x86: efi: Refactor the directory of EFI app and payload support
At present the EFI application and payload support codes in the x86 directory is distributed in a hybrid way. For example, the Kconfig options for both app and payload are in arch/x86/lib/efi/Kconfig, but the source codes in the same directory get built only for CONFIG_EFI_STUB.
This refactors the codes by consolidating all the EFI support codes into arch/x86/cpu/efi, just like other x86 targets.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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66398944 |
| 13-Jun-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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fcfc8a82 |
| 10-Jun-2018 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Conditionally build the pinctrl_ich6 driver
The pinctrl_ich6 driver is currently unconditionally built for all x86 boards. Let's use a Kconfig option to control the build.
Signed-off-by: Bin M
x86: Conditionally build the pinctrl_ich6 driver
The pinctrl_ich6 driver is currently unconditionally built for all x86 boards. Let's use a Kconfig option to control the build.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2018.03, v2018.01, v2017.11 |
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d6a0c78a |
| 16-Oct-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
pylibfdt: compile pylibfdt only when dtoc/binman is necessary
Currently, pylibfdt is always compiled if swig is installed on your machine. It is really annoying because most of targets (excepts x86
pylibfdt: compile pylibfdt only when dtoc/binman is necessary
Currently, pylibfdt is always compiled if swig is installed on your machine. It is really annoying because most of targets (excepts x86, sunxi, rockchip) do not use dtoc or binman.
"checkbinman" and "checkdtoc" are wrong. It is odd that the final build stage checks if we have built necessary tools. If your platform depends on dtoc/binman, you must be able to build pylibfdt. If swig is not installed, it should fail immediately.
I added PYLIBFDT, DTOC, BINMAN entries to Kconfig. They should be property select:ed by platforms that need them. Kbuild will descend into scripts/dtc/pylibfdt/ only when CONFIG_PYLIBFDT is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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ae6ac0a0 |
| 27-Oct-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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fb2c5309 |
| 18-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
Revert "x86: fsp: Configure SPI opcode registers before SPI is locked down"
This reverts commit 1e6ebee667da47fd3a87839a239a7574c66f5659.
It's not appropriate to call the Intel SPI driver specific
Revert "x86: fsp: Configure SPI opcode registers before SPI is locked down"
This reverts commit 1e6ebee667da47fd3a87839a239a7574c66f5659.
It's not appropriate to call the Intel SPI driver specific stuff in the FSP codes. We may add a simple DTS property "intel,spi-lock-down" and let the Intel SPI driver call these stuff instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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aa9c5956 |
| 18-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Fix ACPI resume dependency to MRC cache
In an S3 resume path, MRC cache is mandatory. Enforce the dependency in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Gla
x86: Fix ACPI resume dependency to MRC cache
In an S3 resume path, MRC cache is mandatory. Enforce the dependency in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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0def58f7 |
| 19-Oct-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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3322a8e1 |
| 12-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Turn off running VGA ROM during S3 resume
This is only needed when graphics console is used. For kernel with native graphics driver, this can be turned off to speed up.
Change this option's de
x86: Turn off running VGA ROM during S3 resume
This is only needed when graphics console is used. For kernel with native graphics driver, this can be turned off to speed up.
Change this option's default to n in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
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c07f3820 |
| 17-Sep-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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de9ac9a1 |
| 16-Aug-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Add Intel Braswell SoC support
This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset.
Similar to its predecessor BayTrail, there are some work to do to enab
x86: Add Intel Braswell SoC support
This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset.
Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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5df91f1c |
| 16-Aug-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: dm: video: Add a framebuffer driver that utilizes VBT
When a VBT is given to an FSP that supports graphics initialization, the FSP will produce a graphics info HOB that contains all necessary i
x86: dm: video: Add a framebuffer driver that utilizes VBT
When a VBT is given to an FSP that supports graphics initialization, the FSP will produce a graphics info HOB that contains all necessary information for the linear frame buffer of the integrated graphics device. This adds a DM video driver for it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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ae3ca125 |
| 16-Aug-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Add Video BIOS Table (VBT) related Kconfig options
This adds Kconfig options for Video BIOS Table which is normally required if you are using an Intel FSP firmware that is complaint with spec 1
x86: Add Video BIOS Table (VBT) related Kconfig options
This adds Kconfig options for Video BIOS Table which is normally required if you are using an Intel FSP firmware that is complaint with spec 1.1 or later to initialize the integrated graphics device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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0031af9c |
| 26-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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2ddb1a17 |
| 17-Aug-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED to Kconfig
This converts CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED to a Kconfig option.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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1e6ebee6 |
| 16-Aug-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Configure SPI opcode registers before SPI is locked down
Some Intel FSP (like Braswell) does SPI lock-down during the call to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
x86: fsp: Configure SPI opcode registers before SPI is locked down
Some Intel FSP (like Braswell) does SPI lock-down during the call to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, it's bootloader's responsibility to configure the SPI controller's opcode registers properly otherwise SPI controller driver doesn't know how to communicate with the SPI flash device.
This introduces a Kconfig option CONFIG_FSP_LOCKDOWN_SPI for such FSPs. When it is on, U-Boot will configure the SPI opcode registers before the lock-down.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
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07d77838 |
| 01-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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c3df28f6 |
| 28-Jul-2017 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Make table address selectable
Some firmwares might have another window for generated tables.
So, introduce two configuration options to select start address and maximum length for the generate
x86: Make table address selectable
Some firmwares might have another window for generated tables.
So, introduce two configuration options to select start address and maximum length for the generated tables.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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e71de54a |
| 06-Jul-2017 |
Felipe Balbi <felipe.balbi@linux.intel.com> |
x86: Add Intel Tangier support
Add Intel Tangier SoC support.
Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.
The patch is
x86: Add Intel Tangier support
Add Intel Tangier SoC support.
Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.
The patch is based on work done by the following people (in alphabetical order): Aiden Park <aiden.park@intel.com> Dukjoon Jeon <dukjoon.jeon@intel.com> eric.park <eric.park@intel.com> Fabien Chereau <fabien.chereau@intel.com> Scott D Phillips <scott.d.phillips@intel.com> Sebastien Colleur <sebastienx.colleur@intel.com> Steve Sakoman <steve.sakoman@intel.com> Vincent Tinelli <vincent.tinelli@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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ae1b9399 |
| 17-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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68769ebc |
| 21-Apr-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: pci: Allow conditionally run VGA rom in S3
Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can bypass executing VGA roms in S3.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewe
x86: pci: Allow conditionally run VGA rom in S3
Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can bypass executing VGA roms in S3.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
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