1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2c94fb639SRandy Dunlapmenu "IRQ chip support" 3c94fb639SRandy Dunlap 4f6e916b8SThomas Petazzoniconfig IRQCHIP 5f6e916b8SThomas Petazzoni def_bool y 6612d5494SHuacai Chen depends on (OF_IRQ || ACPI_GENERIC_GSI) 7f6e916b8SThomas Petazzoni 881243e44SRob Herringconfig ARM_GIC 981243e44SRob Herring bool 10dee23403SMarc Zyngier depends on OF 119a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 120e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1381243e44SRob Herring 149c8edddfSJon Hunterconfig ARM_GIC_PM 159c8edddfSJon Hunter bool 169c8edddfSJon Hunter depends on PM 179c8edddfSJon Hunter select ARM_GIC 189c8edddfSJon Hunter 19a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 20a27d21e0SLinus Walleij int 2170265523SJiangfeng Xiao depends on ARM_GIC 22a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 23a27d21e0SLinus Walleij default 1 24a27d21e0SLinus Walleij 25853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 26853a33ceSSuravee Suthikulpanit bool 273ee80364SArnd Bergmann depends on PCI 283ee80364SArnd Bergmann select ARM_GIC 293ee80364SArnd Bergmann select PCI_MSI 30853a33ceSSuravee Suthikulpanit 3181243e44SRob Herringconfig GIC_NON_BANKED 3281243e44SRob Herring bool 3381243e44SRob Herring 34021f6537SMarc Zyngierconfig ARM_GIC_V3 35021f6537SMarc Zyngier bool 36443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 37e3825ba1SMarc Zyngier select PARTITION_PERCPU 380e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 3935727af2SShanker Donthineni select HAVE_ARM_SMCCC_DISCOVERY 40021f6537SMarc Zyngier 4119812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4219812729SMarc Zyngier bool 4313e7accbSThomas Gleixner select GENERIC_MSI_IRQ 4429f41139SMarc Zyngier default ARM_GIC_V3 4529f41139SMarc Zyngier 4629f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4729f41139SMarc Zyngier bool 4829f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 493ee80364SArnd Bergmann depends on PCI 503ee80364SArnd Bergmann depends on PCI_MSI 5129f41139SMarc Zyngier default ARM_GIC_V3_ITS 52292ec080SUwe Kleine-König 537afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 547afe031cSBogdan Purcareata bool 557afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 567afe031cSBogdan Purcareata depends on FSL_MC_BUS 577afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 587afe031cSBogdan Purcareata 5944430ec0SRob Herringconfig ARM_NVIC 6044430ec0SRob Herring bool 612d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 6244430ec0SRob Herring select GENERIC_IRQ_CHIP 6344430ec0SRob Herring 6444430ec0SRob Herringconfig ARM_VIC 6544430ec0SRob Herring bool 6644430ec0SRob Herring select IRQ_DOMAIN 6744430ec0SRob Herring 6844430ec0SRob Herringconfig ARM_VIC_NR 6944430ec0SRob Herring int 7044430ec0SRob Herring default 4 if ARCH_S5PV210 7144430ec0SRob Herring default 2 7244430ec0SRob Herring depends on ARM_VIC 7344430ec0SRob Herring help 7444430ec0SRob Herring The maximum number of VICs available in the system, for 7544430ec0SRob Herring power management. 7644430ec0SRob Herring 77fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 78fed6d336SThomas Petazzoni bool 79fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 803ee80364SArnd Bergmann select PCI_MSI if PCI 810e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 82fed6d336SThomas Petazzoni 83e6b78f2cSAntoine Tenartconfig ALPINE_MSI 84e6b78f2cSAntoine Tenart bool 853ee80364SArnd Bergmann depends on PCI 863ee80364SArnd Bergmann select PCI_MSI 87e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 88e6b78f2cSAntoine Tenart 891eb77c3bSTalel Shenharconfig AL_FIC 901eb77c3bSTalel Shenhar bool "Amazon's Annapurna Labs Fabric Interrupt Controller" 919869f37aSJean Delvare depends on OF 92*35e0cd77SBaoquan He depends on HAS_IOMEM 931eb77c3bSTalel Shenhar select GENERIC_IRQ_CHIP 941eb77c3bSTalel Shenhar select IRQ_DOMAIN 951eb77c3bSTalel Shenhar help 961eb77c3bSTalel Shenhar Support Amazon's Annapurna Labs Fabric Interrupt Controller. 971eb77c3bSTalel Shenhar 98b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 99b1479ebbSBoris BREZILLON bool 100b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 101b1479ebbSBoris BREZILLON select IRQ_DOMAIN 102b1479ebbSBoris BREZILLON select SPARSE_IRQ 103b1479ebbSBoris BREZILLON 104b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 105b1479ebbSBoris BREZILLON bool 106b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 107b1479ebbSBoris BREZILLON select IRQ_DOMAIN 108b1479ebbSBoris BREZILLON select SPARSE_IRQ 109b1479ebbSBoris BREZILLON 1100509cfdeSRalf Baechleconfig I8259 1110509cfdeSRalf Baechle bool 1120509cfdeSRalf Baechle select IRQ_DOMAIN 1130509cfdeSRalf Baechle 114c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 115c7c42ec2SSimon Arlott bool 116c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 117c7c42ec2SSimon Arlott select IRQ_DOMAIN 1180e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 119c7c42ec2SSimon Arlott 1205f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 121c057c799SFlorian Fainelli tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" 122c057c799SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 123c057c799SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 1245f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1255f7f0317SKevin Cernekee select IRQ_DOMAIN 1260e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1275f7f0317SKevin Cernekee 128a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 1293ac268d5SFlorian Fainelli tristate "Broadcom STB 7120-style L2 interrupt controller driver" 1303ac268d5SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 1313ac268d5SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 132a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 133a4fcbb86SKevin Cernekee select IRQ_DOMAIN 134a4fcbb86SKevin Cernekee 1357f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 13651d9db5cSFlorian Fainelli tristate "Broadcom STB generic L2 interrupt controller driver" 13751d9db5cSFlorian Fainelli depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 13851d9db5cSFlorian Fainelli default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 1397f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1407f646e92SFlorian Fainelli select IRQ_DOMAIN 1417f646e92SFlorian Fainelli 1420fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC 1430fc3d74cSBartosz Golaszewski bool 1440fc3d74cSBartosz Golaszewski select GENERIC_IRQ_CHIP 1450fc3d74cSBartosz Golaszewski select IRQ_DOMAIN 1460fc3d74cSBartosz Golaszewski 147350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 148350d71b9SSebastian Hesselbarth bool 149e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 15054a38440SZhen Lei select IRQ_DOMAIN_HIERARCHY 151350d71b9SSebastian Hesselbarth 1526ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1536ee532e2SLinus Walleij bool 1546ee532e2SLinus Walleij select IRQ_DOMAIN 1556ee532e2SLinus Walleij select SPARSE_IRQ 1566ee532e2SLinus Walleij 1579a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1589a7c4abdSMaJun bool 1599a7c4abdSMaJun select ARM_GIC_V3 1609a7c4abdSMaJun select ARM_GIC_V3_ITS 1619a7c4abdSMaJun 162b6ef9161SJames Hoganconfig IMGPDC_IRQ 163b6ef9161SJames Hogan bool 164b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 165b6ef9161SJames Hogan select IRQ_DOMAIN 166b6ef9161SJames Hogan 1675b978c10SLinus Walleijconfig IXP4XX_IRQ 1685b978c10SLinus Walleij bool 1695b978c10SLinus Walleij select IRQ_DOMAIN 1705b978c10SLinus Walleij select SPARSE_IRQ 1715b978c10SLinus Walleij 172da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ 173da0abe1aSRichard Fitzgerald tristate 174da0abe1aSRichard Fitzgerald 17567e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 17667e38cf2SRalf Baechle bool 17767e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1780f5209feSSamuel Holland select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING 17967e38cf2SRalf Baechle select IRQ_DOMAIN 1800e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 18167e38cf2SRalf Baechle 182afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 183afc98d90SAlexander Shiyan bool 184afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 185afc98d90SAlexander Shiyan select IRQ_DOMAIN 186afc98d90SAlexander Shiyan select SPARSE_IRQ 187afc98d90SAlexander Shiyan default y 188afc98d90SAlexander Shiyan 1899b54470aSStafford Horneconfig OMPIC 1909b54470aSStafford Horne bool 1919b54470aSStafford Horne 1924db8e6d2SStefan Kristianssonconfig OR1K_PIC 1934db8e6d2SStefan Kristiansson bool 1944db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1954db8e6d2SStefan Kristiansson 1968598066cSFelipe Balbiconfig OMAP_IRQCHIP 1978598066cSFelipe Balbi bool 1988598066cSFelipe Balbi select GENERIC_IRQ_CHIP 1998598066cSFelipe Balbi select IRQ_DOMAIN 2008598066cSFelipe Balbi 2019dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 2029dbd90f1SSebastian Hesselbarth bool 2039dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 2049dbd90f1SSebastian Hesselbarth 205aaa8666aSCristian Birsanconfig PIC32_EVIC 206aaa8666aSCristian Birsan bool 207aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 208aaa8666aSCristian Birsan select IRQ_DOMAIN 209aaa8666aSCristian Birsan 210981b58f6SRich Felkerconfig JCORE_AIC 2113602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 2123602ffdeSRich Felker depends on OF 213981b58f6SRich Felker select IRQ_DOMAIN 214981b58f6SRich Felker help 215981b58f6SRich Felker Support for the J-Core integrated AIC. 216981b58f6SRich Felker 217d852e62aSManivannan Sadhasivamconfig RDA_INTC 218d852e62aSManivannan Sadhasivam bool 219d852e62aSManivannan Sadhasivam select IRQ_DOMAIN 220d852e62aSManivannan Sadhasivam 22144358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 22202d7e041SGeert Uytterhoeven bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 22344358048SMagnus Damm select IRQ_DOMAIN 22402d7e041SGeert Uytterhoeven help 22502d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 22602d7e041SGeert Uytterhoeven interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 22744358048SMagnus Damm 228fbc83b7fSMagnus Dammconfig RENESAS_IRQC 22972d44c0cSLad Prabhakar bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 23099c221dfSMagnus Damm select GENERIC_IRQ_CHIP 231fbc83b7fSMagnus Damm select IRQ_DOMAIN 23202d7e041SGeert Uytterhoeven help 23302d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 23472d44c0cSLad Prabhakar devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 235fbc83b7fSMagnus Damm 236a644ccb8SGeert Uytterhoevenconfig RENESAS_RZA1_IRQC 23702d7e041SGeert Uytterhoeven bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST 238a644ccb8SGeert Uytterhoeven select IRQ_DOMAIN_HIERARCHY 23902d7e041SGeert Uytterhoeven help 24002d7e041SGeert Uytterhoeven Enable support for the Renesas RZ/A1 Interrupt Controller, to use up 24102d7e041SGeert Uytterhoeven to 8 external interrupts with configurable sense select. 242a644ccb8SGeert Uytterhoeven 2433fed0955SLad Prabhakarconfig RENESAS_RZG2L_IRQC 2443fed0955SLad Prabhakar bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST 2453fed0955SLad Prabhakar select GENERIC_IRQ_CHIP 2463fed0955SLad Prabhakar select IRQ_DOMAIN_HIERARCHY 2473fed0955SLad Prabhakar help 2483fed0955SLad Prabhakar Enable support for the Renesas RZ/G2L (and alike SoC) Interrupt Controller 2493fed0955SLad Prabhakar for external devices. 2503fed0955SLad Prabhakar 25103ac990eSMichael Walleconfig SL28CPLD_INTC 25203ac990eSMichael Walle bool "Kontron sl28cpld IRQ controller" 25303ac990eSMichael Walle depends on MFD_SL28CPLD=y || COMPILE_TEST 25403ac990eSMichael Walle select REGMAP_IRQ 25503ac990eSMichael Walle help 25603ac990eSMichael Walle Interrupt controller driver for the board management controller 25703ac990eSMichael Walle found on the Kontron sl28 CPLD. 25803ac990eSMichael Walle 25907088484SLee Jonesconfig ST_IRQCHIP 26007088484SLee Jones bool 26107088484SLee Jones select REGMAP 26207088484SLee Jones select MFD_SYSCON 26307088484SLee Jones help 26407088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 26507088484SLee Jones 266d421fd6dSSamuel Hollandconfig SUN4I_INTC 267d421fd6dSSamuel Holland bool 268d421fd6dSSamuel Holland 269d421fd6dSSamuel Hollandconfig SUN6I_R_INTC 270d421fd6dSSamuel Holland bool 271d421fd6dSSamuel Holland select IRQ_DOMAIN_HIERARCHY 272d421fd6dSSamuel Holland select IRQ_FASTEOI_HIERARCHY_HANDLERS 273d421fd6dSSamuel Holland 274d421fd6dSSamuel Hollandconfig SUNXI_NMI_INTC 275d421fd6dSSamuel Holland bool 276d421fd6dSSamuel Holland select GENERIC_IRQ_CHIP 277d421fd6dSSamuel Holland 278b06eb017SChristian Ruppertconfig TB10X_IRQC 279b06eb017SChristian Ruppert bool 280b06eb017SChristian Ruppert select IRQ_DOMAIN 281b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 282b06eb017SChristian Ruppert 283d01f8633SDamien Riegelconfig TS4800_IRQ 284d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 285d01f8633SDamien Riegel select IRQ_DOMAIN 2860df337cfSRichard Weinberger depends on HAS_IOMEM 287d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 288d01f8633SDamien Riegel help 289d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 290d01f8633SDamien Riegel 2912389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2922389d501SLinus Walleij bool 2932389d501SLinus Walleij select IRQ_DOMAIN 2942389d501SLinus Walleij 2952389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2962389d501SLinus Walleij int 2972389d501SLinus Walleij default 4 2982389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 29926a8e96aSMax Filippov 30026a8e96aSMax Filippovconfig XTENSA_MX 30126a8e96aSMax Filippov bool 30226a8e96aSMax Filippov select IRQ_DOMAIN 3030e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 30496ca848eSSricharan R 3050547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 306debf69cfSRobert Hancock bool "Xilinx Interrupt Controller IP" 307fd31000dSJamie Iles depends on OF_ADDRESS 3080547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 309debf69cfSRobert Hancock help 310debf69cfSRobert Hancock Support for the Xilinx Interrupt Controller IP core. 311debf69cfSRobert Hancock This is used as a primary controller with MicroBlaze and can also 312debf69cfSRobert Hancock be used as a secondary chained controller on other platforms. 3130547dc78SZubair Lutfullah Kakakhel 31496ca848eSSricharan Rconfig IRQ_CROSSBAR 31596ca848eSSricharan R bool 31696ca848eSSricharan R help 317f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 31896ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 31996ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 32096ca848eSSricharan R routed to one of the free irqchip interrupt lines. 32189323f8cSGrygorii Strashko 32289323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 32389323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 32489323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 32589323f8cSGrygorii Strashko help 32689323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 32789323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 3288a19b8f1SAndrew Bresticker 3298a19b8f1SAndrew Brestickerconfig MIPS_GIC 3308a19b8f1SAndrew Bresticker bool 3318190cc57SSamuel Holland select GENERIC_IRQ_IPI if SMP 3328190cc57SSamuel Holland select IRQ_DOMAIN_HIERARCHY 3338a19b8f1SAndrew Bresticker select MIPS_CM 3348a764482SYoshinori Sato 33544e08e70SPaul Burtonconfig INGENIC_IRQ 33644e08e70SPaul Burton bool 33744e08e70SPaul Burton depends on MACH_INGENIC 33844e08e70SPaul Burton default y 33978c10e55SLinus Torvalds 3409536eba0SPaul Cercueilconfig INGENIC_TCU_IRQ 3419536eba0SPaul Cercueil bool "Ingenic JZ47xx TCU interrupt controller" 3429536eba0SPaul Cercueil default MACH_INGENIC 3439536eba0SPaul Cercueil depends on MIPS || COMPILE_TEST 3449536eba0SPaul Cercueil select MFD_SYSCON 3458084499bSYueHaibing select GENERIC_IRQ_CHIP 3469536eba0SPaul Cercueil help 3479536eba0SPaul Cercueil Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic 3489536eba0SPaul Cercueil JZ47xx SoCs. 3499536eba0SPaul Cercueil 3509536eba0SPaul Cercueil If unsure, say N. 3519536eba0SPaul Cercueil 352e324c4dcSShenwei Wangconfig IMX_GPCV2 353e324c4dcSShenwei Wang bool 354e324c4dcSShenwei Wang select IRQ_DOMAIN 355e324c4dcSShenwei Wang help 356e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 3577e4ac676SOleksij Rempel 3587e4ac676SOleksij Rempelconfig IRQ_MXS 3597e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 3607e4ac676SOleksij Rempel select IRQ_DOMAIN 3617e4ac676SOleksij Rempel select STMP_DEVICE 362c27f29bbSThomas Petazzoni 36319d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 36419d99164SAlexandre Belloni bool 36519d99164SAlexandre Belloni select IRQ_DOMAIN 36619d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 36719d99164SAlexandre Belloni 368a68a63cbSThomas Petazzoniconfig MVEBU_GICP 369a68a63cbSThomas Petazzoni bool 370a68a63cbSThomas Petazzoni 371e0de91a9SThomas Petazzoniconfig MVEBU_ICU 372e0de91a9SThomas Petazzoni bool 373e0de91a9SThomas Petazzoni 374c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 375c27f29bbSThomas Petazzoni bool 37613e7accbSThomas Gleixner select GENERIC_MSI_IRQ 3779e2c986cSMarc Zyngier 378a109893bSThomas Petazzoniconfig MVEBU_PIC 379a109893bSThomas Petazzoni bool 380a109893bSThomas Petazzoni 38161ce8d8dSMiquel Raynalconfig MVEBU_SEI 38261ce8d8dSMiquel Raynal bool 38361ce8d8dSMiquel Raynal 3840dcd9f87SRasmus Villemoesconfig LS_EXTIRQ 3850dcd9f87SRasmus Villemoes def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3860dcd9f87SRasmus Villemoes select MFD_SYSCON 3870dcd9f87SRasmus Villemoes 388b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 389b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3909c1a7bfcSLukas Bulwahn depends on PCI_MSI 391b8f3ebe6SMinghuan Lian 3929e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3939e2c986cSMarc Zyngier bool 3940efacbbaSLinus Torvalds 395e0720416SAlexandre TORGUEconfig STM32_EXTI 396e0720416SAlexandre TORGUE bool 397e0720416SAlexandre TORGUE select IRQ_DOMAIN 3980e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 399f20cc9b0SAgustin Vega-Frias 400f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 401f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 402f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 403f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 404f20cc9b0SAgustin Vega-Frias help 405f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 406f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 4075ed34d3aSMasahiro Yamada 4085ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 4095ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 4105ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 4115ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 4125ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 4135ed34d3aSMasahiro Yamada help 4145ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 415c94fb639SRandy Dunlap 416215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 417a947aa00SNeil Armstrong tristate "Meson GPIO Interrupt Multiplexer" 418a947aa00SNeil Armstrong depends on ARCH_MESON || COMPILE_TEST 419a947aa00SNeil Armstrong default ARCH_MESON 420215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 421215f4cc0SJerome Brunet help 422215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 423215f4cc0SJerome Brunet 4244235ff50SMiodrag Dinicconfig GOLDFISH_PIC 4254235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 4264235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 427969ac78dSRandy Dunlap select GENERIC_IRQ_CHIP 4284235ff50SMiodrag Dinic select IRQ_DOMAIN 4294235ff50SMiodrag Dinic help 4304235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 4314235ff50SMiodrag Dinic for Goldfish based virtual platforms. 4324235ff50SMiodrag Dinic 433f55c73aeSArchana Sathyakumarconfig QCOM_PDC 4344acd8a4bSSaravana Kannan tristate "QCOM PDC" 435f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 436f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 437f55c73aeSArchana Sathyakumar help 438f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 439f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 440f55c73aeSArchana Sathyakumar 441a6199bb5SShawn Guoconfig QCOM_MPM 442a6199bb5SShawn Guo tristate "QCOM MPM" 443a6199bb5SShawn Guo depends on ARCH_QCOM 444fa4dcc88SYueHaibing depends on MAILBOX 445a6199bb5SShawn Guo select IRQ_DOMAIN_HIERARCHY 446a6199bb5SShawn Guo help 447a6199bb5SShawn Guo MSM Power Manager driver to manage and configure wakeup 448a6199bb5SShawn Guo IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 449a6199bb5SShawn Guo 450d8a5f5f7SGuo Renconfig CSKY_MPINTC 451be1abc5bSGuo Ren bool 452d8a5f5f7SGuo Ren depends on CSKY 453d8a5f5f7SGuo Ren help 454d8a5f5f7SGuo Ren Say yes here to enable C-SKY SMP interrupt controller driver used 455d8a5f5f7SGuo Ren for C-SKY SMP system. 456656b42deSRandy Dunlap In fact it's not mmio map in hardware and it uses ld/st to visit the 457d8a5f5f7SGuo Ren controller's register inside CPU. 458d8a5f5f7SGuo Ren 459edff1b48SGuo Renconfig CSKY_APB_INTC 460edff1b48SGuo Ren bool "C-SKY APB Interrupt Controller" 461edff1b48SGuo Ren depends on CSKY 462edff1b48SGuo Ren help 463edff1b48SGuo Ren Say yes here to enable C-SKY APB interrupt controller driver used 464656b42deSRandy Dunlap by C-SKY single core SOC system. It uses mmio map apb-bus to visit 465edff1b48SGuo Ren the controller's register. 466edff1b48SGuo Ren 4670136afa0SLucas Stachconfig IMX_IRQSTEER 4680136afa0SLucas Stach bool "i.MX IRQSTEER support" 4690136afa0SLucas Stach depends on ARCH_MXC || COMPILE_TEST 4700136afa0SLucas Stach default ARCH_MXC 4710136afa0SLucas Stach select IRQ_DOMAIN 4720136afa0SLucas Stach help 4730136afa0SLucas Stach Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 4740136afa0SLucas Stach 4752fbb1396SJoakim Zhangconfig IMX_INTMUX 476a890caebSGeert Uytterhoeven bool "i.MX INTMUX support" if COMPILE_TEST 477a890caebSGeert Uytterhoeven default y if ARCH_MXC 4782fbb1396SJoakim Zhang select IRQ_DOMAIN 4792fbb1396SJoakim Zhang help 4802fbb1396SJoakim Zhang Support for the i.MX INTMUX interrupt multiplexer. 4812fbb1396SJoakim Zhang 48270afdab9SFrank Liconfig IMX_MU_MSI 48370afdab9SFrank Li tristate "i.MX MU used as MSI controller" 48470afdab9SFrank Li depends on OF && HAS_IOMEM 4856c9f7434SGeert Uytterhoeven depends on ARCH_MXC || COMPILE_TEST 48670afdab9SFrank Li default m if ARCH_MXC 48770afdab9SFrank Li select IRQ_DOMAIN 48870afdab9SFrank Li select IRQ_DOMAIN_HIERARCHY 48913e7accbSThomas Gleixner select GENERIC_MSI_IRQ 49070afdab9SFrank Li help 4916c9f7434SGeert Uytterhoeven Provide a driver for the i.MX Messaging Unit block used as a 4926c9f7434SGeert Uytterhoeven CPU-to-CPU MSI controller. This requires a specially crafted DT 4936c9f7434SGeert Uytterhoeven to make use of this driver. 49470afdab9SFrank Li 49570afdab9SFrank Li If unsure, say N 49670afdab9SFrank Li 4979e543e22SJiaxun Yangconfig LS1X_IRQ 4989e543e22SJiaxun Yang bool "Loongson-1 Interrupt Controller" 4999e543e22SJiaxun Yang depends on MACH_LOONGSON32 5009e543e22SJiaxun Yang default y 5019e543e22SJiaxun Yang select IRQ_DOMAIN 5029e543e22SJiaxun Yang select GENERIC_IRQ_CHIP 5039e543e22SJiaxun Yang help 5049e543e22SJiaxun Yang Support for the Loongson-1 platform Interrupt Controller. 5059e543e22SJiaxun Yang 506cd844b07SLokesh Vutlaconfig TI_SCI_INTR_IRQCHIP 507cd844b07SLokesh Vutla bool 508cd844b07SLokesh Vutla depends on TI_SCI_PROTOCOL 509cd844b07SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 510cd844b07SLokesh Vutla help 511cd844b07SLokesh Vutla This enables the irqchip driver support for K3 Interrupt router 512cd844b07SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 513cd844b07SLokesh Vutla If you wish to use interrupt router irq resources managed by the 514cd844b07SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 515cd844b07SLokesh Vutla 5169f1463b8SLokesh Vutlaconfig TI_SCI_INTA_IRQCHIP 5179f1463b8SLokesh Vutla bool 5189f1463b8SLokesh Vutla depends on TI_SCI_PROTOCOL 5199f1463b8SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 520f011df61SLokesh Vutla select TI_SCI_INTA_MSI_DOMAIN 5219f1463b8SLokesh Vutla help 5229f1463b8SLokesh Vutla This enables the irqchip driver support for K3 Interrupt aggregator 5239f1463b8SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 5249f1463b8SLokesh Vutla If you wish to use interrupt aggregator irq resources managed by the 5259f1463b8SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 5269f1463b8SLokesh Vutla 52704e2d1e0SGrzegorz Jaszczykconfig TI_PRUSS_INTC 528b8e594faSSuman Anna tristate 529b8e594faSSuman Anna depends on TI_PRUSS 530b8e594faSSuman Anna default TI_PRUSS 53104e2d1e0SGrzegorz Jaszczyk select IRQ_DOMAIN 53204e2d1e0SGrzegorz Jaszczyk help 53304e2d1e0SGrzegorz Jaszczyk This enables support for the PRU-ICSS Local Interrupt Controller 53404e2d1e0SGrzegorz Jaszczyk present within a PRU-ICSS subsystem present on various TI SoCs. 53504e2d1e0SGrzegorz Jaszczyk The PRUSS INTC enables various interrupts to be routed to multiple 53604e2d1e0SGrzegorz Jaszczyk different processors within the SoC. 53704e2d1e0SGrzegorz Jaszczyk 5386b7ce892SAnup Patelconfig RISCV_INTC 539d8fb1307SConor Dooley bool 5406b7ce892SAnup Patel depends on RISCV 541832f15f4SAnup Patel select IRQ_DOMAIN_HIERARCHY 5426b7ce892SAnup Patel 5438237f8bcSChristoph Hellwigconfig SIFIVE_PLIC 544fdb1742aSConor Dooley bool 5458237f8bcSChristoph Hellwig depends on RISCV 546466008f9SYash Shah select IRQ_DOMAIN_HIERARCHY 547de078949SSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 54801493855SJonathan Neuschäfer 549b74416dbSHyunki Kooconfig EXYNOS_IRQ_COMBINER 550b74416dbSHyunki Koo bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST 551b74416dbSHyunki Koo depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST 552b74416dbSHyunki Koo help 553b74416dbSHyunki Koo Say yes here to add support for the IRQ combiner devices embedded 554b74416dbSHyunki Koo in Samsung Exynos chips. 555b74416dbSHyunki Koo 556b2d3e335SHuacai Chenconfig IRQ_LOONGARCH_CPU 557b2d3e335SHuacai Chen bool 558b2d3e335SHuacai Chen select GENERIC_IRQ_CHIP 559b2d3e335SHuacai Chen select IRQ_DOMAIN 560b2d3e335SHuacai Chen select GENERIC_IRQ_EFFECTIVE_AFF_MASK 56170f7b6c0SHuacai Chen select LOONGSON_HTVEC 5628d5356f9SHuacai Chen select LOONGSON_LIOINTC 5638d5356f9SHuacai Chen select LOONGSON_EIOINTC 5648d5356f9SHuacai Chen select LOONGSON_PCH_PIC 5658d5356f9SHuacai Chen select LOONGSON_PCH_MSI 5668d5356f9SHuacai Chen select LOONGSON_PCH_LPC 567b2d3e335SHuacai Chen help 568b2d3e335SHuacai Chen Support for the LoongArch CPU Interrupt Controller. For details of 569b2d3e335SHuacai Chen irq chip hierarchy on LoongArch platforms please read the document 570b2d3e335SHuacai Chen Documentation/arch/loongarch/irq-chip-model.rst. 571b2d3e335SHuacai Chen 572dbb15226SJiaxun Yangconfig LOONGSON_LIOINTC 573dbb15226SJiaxun Yang bool "Loongson Local I/O Interrupt Controller" 574dbb15226SJiaxun Yang depends on MACH_LOONGSON64 575dbb15226SJiaxun Yang default y 576dbb15226SJiaxun Yang select IRQ_DOMAIN 577dbb15226SJiaxun Yang select GENERIC_IRQ_CHIP 578dbb15226SJiaxun Yang help 579dbb15226SJiaxun Yang Support for the Loongson Local I/O Interrupt Controller. 580dbb15226SJiaxun Yang 581dd281e1aSHuacai Chenconfig LOONGSON_EIOINTC 582dd281e1aSHuacai Chen bool "Loongson Extend I/O Interrupt Controller" 583dd281e1aSHuacai Chen depends on LOONGARCH 584dd281e1aSHuacai Chen depends on MACH_LOONGSON64 585dd281e1aSHuacai Chen default MACH_LOONGSON64 586dd281e1aSHuacai Chen select IRQ_DOMAIN_HIERARCHY 587dd281e1aSHuacai Chen select GENERIC_IRQ_CHIP 588dd281e1aSHuacai Chen help 589dd281e1aSHuacai Chen Support for the Loongson3 Extend I/O Interrupt Vector Controller. 590dd281e1aSHuacai Chen 591a93f1d90SJiaxun Yangconfig LOONGSON_HTPIC 592a93f1d90SJiaxun Yang bool "Loongson3 HyperTransport PIC Controller" 593987a3e03SHuacai Chen depends on MACH_LOONGSON64 && MIPS 594a93f1d90SJiaxun Yang default y 595a93f1d90SJiaxun Yang select IRQ_DOMAIN 596a93f1d90SJiaxun Yang select GENERIC_IRQ_CHIP 597a93f1d90SJiaxun Yang help 598a93f1d90SJiaxun Yang Support for the Loongson-3 HyperTransport PIC Controller. 599a93f1d90SJiaxun Yang 600818e915fSJiaxun Yangconfig LOONGSON_HTVEC 601987a3e03SHuacai Chen bool "Loongson HyperTransport Interrupt Vector Controller" 602d77aeb5dSIngo Molnar depends on MACH_LOONGSON64 603818e915fSJiaxun Yang default MACH_LOONGSON64 604818e915fSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 605818e915fSJiaxun Yang help 606987a3e03SHuacai Chen Support for the Loongson HyperTransport Interrupt Vector Controller. 607818e915fSJiaxun Yang 608ef8c01ebSJiaxun Yangconfig LOONGSON_PCH_PIC 609ef8c01ebSJiaxun Yang bool "Loongson PCH PIC Controller" 610bcdd75c5SHuacai Chen depends on MACH_LOONGSON64 611ef8c01ebSJiaxun Yang default MACH_LOONGSON64 612ef8c01ebSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 613ef8c01ebSJiaxun Yang select IRQ_FASTEOI_HIERARCHY_HANDLERS 614ef8c01ebSJiaxun Yang help 615ef8c01ebSJiaxun Yang Support for the Loongson PCH PIC Controller. 616ef8c01ebSJiaxun Yang 617632dcc2cSJiaxun Yangconfig LOONGSON_PCH_MSI 618a23df9a4SJiaxun Yang bool "Loongson PCH MSI Controller" 61902308732SHuacai Chen depends on MACH_LOONGSON64 620632dcc2cSJiaxun Yang depends on PCI 621632dcc2cSJiaxun Yang default MACH_LOONGSON64 622632dcc2cSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 623632dcc2cSJiaxun Yang select PCI_MSI 624632dcc2cSJiaxun Yang help 625632dcc2cSJiaxun Yang Support for the Loongson PCH MSI Controller. 626632dcc2cSJiaxun Yang 627ee73f14eSHuacai Chenconfig LOONGSON_PCH_LPC 628ee73f14eSHuacai Chen bool "Loongson PCH LPC Controller" 629e7ccba77SJianmin Lv depends on LOONGARCH 630ee73f14eSHuacai Chen depends on MACH_LOONGSON64 631e7ccba77SJianmin Lv default MACH_LOONGSON64 632ee73f14eSHuacai Chen select IRQ_DOMAIN_HIERARCHY 633ee73f14eSHuacai Chen help 634ee73f14eSHuacai Chen Support for the Loongson PCH LPC Controller. 635ee73f14eSHuacai Chen 636ad4c938cSMark-PK Tsaiconfig MST_IRQ 637ad4c938cSMark-PK Tsai bool "MStar Interrupt Controller" 63861b0648dSGeert Uytterhoeven depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST 639ad4c938cSMark-PK Tsai default ARCH_MEDIATEK 640ad4c938cSMark-PK Tsai select IRQ_DOMAIN 641ad4c938cSMark-PK Tsai select IRQ_DOMAIN_HIERARCHY 642ad4c938cSMark-PK Tsai help 643ad4c938cSMark-PK Tsai Support MStar Interrupt Controller. 644ad4c938cSMark-PK Tsai 645fead4dd4SJonathan Neuschäferconfig WPCM450_AIC 646fead4dd4SJonathan Neuschäfer bool "Nuvoton WPCM450 Advanced Interrupt Controller" 64794bc9420SMarc Zyngier depends on ARCH_WPCM450 648fead4dd4SJonathan Neuschäfer help 649fead4dd4SJonathan Neuschäfer Support for the interrupt controller in the Nuvoton WPCM450 BMC SoC. 650fead4dd4SJonathan Neuschäfer 651529ea368SThomas Bogendoerferconfig IRQ_IDT3243X 652529ea368SThomas Bogendoerfer bool 653529ea368SThomas Bogendoerfer select GENERIC_IRQ_CHIP 654529ea368SThomas Bogendoerfer select IRQ_DOMAIN 655529ea368SThomas Bogendoerfer 65676cde263SHector Martinconfig APPLE_AIC 65776cde263SHector Martin bool "Apple Interrupt Controller (AIC)" 65876cde263SHector Martin depends on ARM64 6595b44955dSGeert Uytterhoeven depends on ARCH_APPLE || COMPILE_TEST 660c19f8971SMarc Zyngier select GENERIC_IRQ_IPI_MUX 66176cde263SHector Martin help 66276cde263SHector Martin Support for the Apple Interrupt Controller found on Apple Silicon SoCs, 66376cde263SHector Martin such as the M1. 66476cde263SHector Martin 66500fa3461SClaudiu Bezneaconfig MCHP_EIC 66600fa3461SClaudiu Beznea bool "Microchip External Interrupt Controller" 66700fa3461SClaudiu Beznea depends on ARCH_AT91 || COMPILE_TEST 66800fa3461SClaudiu Beznea select IRQ_DOMAIN 66900fa3461SClaudiu Beznea select IRQ_DOMAIN_HIERARCHY 67000fa3461SClaudiu Beznea help 67100fa3461SClaudiu Beznea Support for Microchip External Interrupt Controller. 67200fa3461SClaudiu Beznea 673f7189d93SQin Jianconfig SUNPLUS_SP7021_INTC 674f7189d93SQin Jian bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST 675f7189d93SQin Jian default SOC_SP7021 676f7189d93SQin Jian help 677f7189d93SQin Jian Support for the Sunplus SP7021 Interrupt Controller IP core. 678f7189d93SQin Jian SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a 679f7189d93SQin Jian chained controller, routing all interrupt source in P-Chip to 680f7189d93SQin Jian the primary controller on C-Chip. 681f7189d93SQin Jian 68201493855SJonathan Neuschäferendmenu 683